2ce70215a8
Not very many overall changes. Main ones include
1. Support for powerpc, arm32 and vax
2. Makefile.gcc can now be included by anything which depends on gcc versions.
If the version installed isn't 2.95.3 it'll add itself as a BUILD_DEPENDS.
(XXX: any of the makefile's in pkgsrc should be checked and change to use
this)
3. Remove special PLIST.NetBSD-sparc as it's no longer needed
4. Change post-extract loop to pick up any arch files from FILESDIR without
having to hardcode all the archs
5. Remove arch restrictions as this should work on any arch supported by the
main source tree as of 03/28/02
6. Add PKGREVISION as this clearly isn't stock 2.95.3 (it doesn't change
gcc --version so version checks won't care).
158 lines
5.1 KiB
C
158 lines
5.1 KiB
C
/* NetBSD/arm (RiscBSD) version.
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Copyright (C) 1993, 1994, 1997, 1998 Free Software Foundation, Inc.
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Contributed by Mark Brinicombe (amb@physig.ph.kcl.ac.uk)
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This file is part of GNU CC.
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GNU CC is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2, or (at your option)
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any later version.
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GNU CC is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with GNU CC; see the file COPYING. If not, write to
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the Free Software Foundation, 59 Temple Place - Suite 330,
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Boston, MA 02111-1307, USA. */
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/* Human-readable target name for version string. */
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#define TARGET_VERSION fputs (" (ARM NetBSD/ELF)", stderr);
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/*#undef ASM_DECLARE_FUNCTION_NAME*/
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/* ARM6 family default cpu. */
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#define SUBTARGET_CPU_DEFAULT TARGET_CPU_arm6
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#define TARGET_DEFAULT \
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(ARM_FLAG_APCS_32 \
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| ARM_FLAG_SOFT_FLOAT \
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| ARM_FLAG_ATPCS_STACK_ALIGN \
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| ARM_FLAG_SHORT_BYTE)
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/* APCS-32 is the default for ELF anyway. */
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/* Unsigned chars are the default anyway. */
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#include "arm/elf.h"
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/* We use VFP format for doubles. */
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/* XXX should be run-time configurable */
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#undef FLOAT_WORDS_BIG_ENDIAN
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#define FLOAT_WORDS_BIG_ENDIAN (TARGET_HARD_FLOAT || TARGET_BIG_END)
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/* This gets redefined in config/netbsd.h. */
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#undef TARGET_MEM_FUNCTIONS
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/* How large values are returned */
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/* We override the default here because the default is to follow the
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APCS rules and we want to follow the (simpler) ATPCS rules. */
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#undef RETURN_IN_MEMORY
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#define RETURN_IN_MEMORY(TYPE) \
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(AGGREGATE_TYPE_P (TYPE) && int_size_in_bytes (TYPE) > 4)
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#define NETBSD_ELF
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#include <netbsd.h>
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/* Override standard NetBSD asm spec. What do they know? */
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#undef ASM_SPEC
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/* Don't bother telling the assembler the CPU type -- assume the compiler
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won't generate bogus code and anyone using asm() knows what they're
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doing. */
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#define ASM_SPEC "%{mbig-endian:-EB} \
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%{mapcs-26:-mapcs-26} %{!mapcs-26:-mapcs-32} \
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%{mapcs-float:-mapcs-float} \
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%{mthumb-interwork:-mthumb-interwork} \
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%{fpic:-k} %{fPIC:-k}"
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/* Some defines for CPP. */
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#undef CPP_PREDEFINES
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#define CPP_PREDEFINES "\
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-D__arm__ -D__NetBSD__ -D__ELF__ \
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-Asystem(unix) -Asystem(NetBSD) -Acpu(arm) -Amachine(arm)"
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/* Define _POSIX_SOURCE if necessary. */
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#undef CPP_SPEC
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#define CPP_SPEC "\
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%(cpp_cpu_arch) %(cpp_apcs_pc) %(cpp_float) %(cpp_endian) \
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%{posix:-D_POSIX_SOURCE} \
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"
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/* Because TARGET_DEFAULT sets ARM_FLAG_SOFT_FLOAT */
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#undef CPP_FLOAT_DEFAULT_SPEC
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#define CPP_FLOAT_DEFAULT_SPEC "-D__SOFTFP__ -D__VFP_FP__"
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/* Because we use VFP-format floats in the soft-float case */
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#undef CPP_FLOAT_SPEC
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#define CPP_FLOAT_SPEC "\
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%{msoft-float:\
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%{mhard-float:%e-msoft-float and -mhard_float may not be used together} \
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-D__SOFTFP__ -D__VFP_FP__} \
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%{!mhard-float:%{!msoft-float:%(cpp_float_default)}} \
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"
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#undef SIZE_TYPE
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#define SIZE_TYPE "long unsigned int"
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#undef PTRDIFF_TYPE
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#define PTRDIFF_TYPE "long int"
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#undef WCHAR_TYPE
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#define WCHAR_TYPE "int"
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#undef WCHAR_UNSIGNED
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#define WCHAR_UNSIGNED 0
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#undef WCHAR_TYPE_SIZE
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#define WCHAR_TYPE_SIZE 32
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#define HANDLE_SYSV_PRAGMA
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/* We don't have any limit on the length as out debugger is GDB. */
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#undef DBX_CONTIN_LENGTH
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/* NetBSD does its profiling differently to the Acorn compiler. We
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don't need a word following the mcount call; and to skip it
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requires either an assembly stub or use of fomit-frame-pointer when
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compiling the profiling functions. */
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#undef FUNCTION_PROFILER
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#define FUNCTION_PROFILER(STREAM,LABELNO) \
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{ \
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fprintf(STREAM, "\tmov\t%sip, %slr\n", REGISTER_PREFIX, REGISTER_PREFIX); \
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fprintf(STREAM, "\tbl\t__mcount\n"); \
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}
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/* On the ARM `@' introduces a comment, so we must use something else
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for .type directives. */
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#undef TYPE_OPERAND_FMT
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#define TYPE_OPERAND_FMT "%%%s"
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/* VERY BIG NOTE : Change of structure alignment for RiscBSD.
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There are consequences you should be aware of...
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Normally GCC/arm uses a structure alignment of 32 for compatibility
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with armcc. This means that structures are padded to a word
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boundary. Historically, NetBSD/arm has used an alignment of 8, and ARM
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seem to be moving that way in their toolchain so we'll keep it.
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This has several side effects that should be considered.
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1. Structures will only be aligned to the size of the largest member.
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i.e. structures containing only bytes will be byte aligned.
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structures containing shorts will be half word alinged.
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structures containing ints will be word aligned.
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This means structures should be padded to a word boundary if
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alignment of 32 is required for byte structures etc.
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2. A potential performance penalty may exist if strings are no longer
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word aligned. GCC will not be able to use word load/stores to copy
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short strings.
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*/
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#undef STRUCTURE_SIZE_BOUNDARY
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#define STRUCTURE_SIZE_BOUNDARY 8
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#define DEFAULT_SHORT_ENUMS 1
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