75 lines
1.3 KiB
Makefile
75 lines
1.3 KiB
Makefile
# $NetBSD: Makefile,v 1.96 2018/03/17 22:20:13 mef Exp $
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#
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COMMENT= CAD tools
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SUBDIR+= MyHDL-gplcver
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SUBDIR+= MyHDL-iverilog
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SUBDIR+= adms
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SUBDIR+= atlc
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SUBDIR+= boolean
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SUBDIR+= cascade
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SUBDIR+= cgi-wcalc
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SUBDIR+= covered
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SUBDIR+= dinotrace
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SUBDIR+= dinotrace-mode
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SUBDIR+= diylc
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SUBDIR+= eagle
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SUBDIR+= electric
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SUBDIR+= fastcap
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SUBDIR+= fasthenry
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SUBDIR+= felt
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SUBDIR+= freehdl
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SUBDIR+= gdsreader
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SUBDIR+= geda
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SUBDIR+= gerbv
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SUBDIR+= ghdl
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SUBDIR+= gnetman
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SUBDIR+= gnucap
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SUBDIR+= gplcver
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SUBDIR+= gsmc
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SUBDIR+= gtk1-wcalc
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SUBDIR+= gtk2-wcalc
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SUBDIR+= gtkwave
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SUBDIR+= iverilog
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SUBDIR+= kicad
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SUBDIR+= kicad-doc
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SUBDIR+= kicad-footprints
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SUBDIR+= kicad-i18n
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SUBDIR+= kicad-lib
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SUBDIR+= klayout
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SUBDIR+= librecad
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SUBDIR+= libwcalc
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SUBDIR+= magic
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SUBDIR+= mcalc
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SUBDIR+= mex-wcalc
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SUBDIR+= mpac
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SUBDIR+= nelma
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SUBDIR+= ng-spice
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SUBDIR+= ntesla
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SUBDIR+= oce
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SUBDIR+= openscad
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SUBDIR+= p5-gds2
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SUBDIR+= pcb
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SUBDIR+= py-MyHDL
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SUBDIR+= py-gds
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SUBDIR+= py-gdscad
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SUBDIR+= py-simpy
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SUBDIR+= qcad
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SUBDIR+= qcad-partlibrary
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SUBDIR+= sci-wcalc
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SUBDIR+= solvespace
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SUBDIR+= spice
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SUBDIR+= spiceprm
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SUBDIR+= stdio-wcalc
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SUBDIR+= tkgate
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SUBDIR+= tnt-mmtl
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SUBDIR+= transcalc
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SUBDIR+= verilog-mode
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SUBDIR+= veriwell
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SUBDIR+= wcalc
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SUBDIR+= wcalc-docs
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SUBDIR+= xchiplogo
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SUBDIR+= xcircuit
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.include "../mk/misc/category.mk"
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