198b016345
It's a rename of cad/verilog to a better name. Updated DESCR for new package: Icarus Verilog is intended to compile ALL of the Verilog HDL as described in the IEEE-1364 standard. Of course, it's not quite there yet. It does currently handle a mix of structural and behavioral constructs. Icarus Verilog is not aimed at being a simulator in the traditional sense, but a compiler that generates code employed by back-end tools. No objections to rename from <gdt>
25 lines
725 B
Text
25 lines
725 B
Text
$NetBSD: patch-ad,v 1.1 2016/10/08 23:01:45 kamil Exp $
|
|
|
|
make sure no one sneaks a -O* in on us via one of these variables
|
|
set in the environment
|
|
|
|
--- Makefile.in.orig 2013-08-20 04:10:31.000000000 +0900
|
|
+++ Makefile.in 2013-12-20 11:35:09.000000000 +0900
|
|
@@ -222,6 +222,17 @@
|
|
|
|
lexor.o: lexor.cc parse.h
|
|
|
|
+# make sure no one sneaks a -O* in on us via one of these variables
|
|
+# set in the environment
|
|
+CXX_NOOPT=$(CXX:-O%=)
|
|
+CPPFLAGS_NOOPT=$(CPPFLAGS:-O%=)
|
|
+CXXFLAGS_NOOPT=$(CXXFLAGS:-O%=)
|
|
+
|
|
+parse.o: parse.cc
|
|
+ @[ -d dep ] || mkdir dep
|
|
+ $(CXX_NOOPT) $(CPPFLAGS_NOOPT) $(CXXFLAGS_NOOPT) -MD -c $< -o $*.o
|
|
+ mv $*.d dep/$*.d
|
|
+
|
|
parse.o: parse.cc
|
|
|
|
# Build this in two steps to avoid parallel build issues (see pr3462585)
|