e734091698
many changes since the last snapshot. Mostly they involve expanded VVP support. The VVP target now passes >200 of the tests from the test suite. While not as complete as the VVM target, VVP is getting closer and its _much_ _much_ faster.
24 lines
709 B
Makefile
24 lines
709 B
Makefile
# $NetBSD: Makefile,v 1.18 2001/05/21 22:25:19 dmcmahill Exp $
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#
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DISTNAME= verilog-20010520
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PKGNAME= verilog-current-20010520
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CATEGORIES= cad
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MASTER_SITES= ftp://icarus.com/pub/eda/verilog/snapshots/
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MAINTAINER= dmcmahill@netbsd.org
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HOMEPAGE= http://icarus.com/eda/verilog/index.html
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COMMENT= Verilog simulation and synthesis tool (development snapshot version)
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BUILD_DEPENDS+= bison-*:../../devel/bison
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BUILD_DEPENDS+= gperf-2.7.2:../../devel/gperf
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DEPENDS+= ipal-current>=20001210:../../cad/ipal-current
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CONFLICTS+= verilog-[0-9]*
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GNU_CONFIGURE= yes
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USE_GMAKE= yes
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CPPFLAGS+= -I${LOCALBASE}/include
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CONFIGURE_ENV+= CPPFLAGS="${CPPFLAGS}" LDFLAGS+="${LDFLAGS}"
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.include "../../mk/bsd.pkg.mk"
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