mirror of
https://github.com/bunkerity/bunkerized-nginx
synced 2023-12-13 21:30:18 +01:00
Merge commit 'd75296b5a55889c4425f2b2274b50eabc5b96b3e' into dev
This commit is contained in:
commit
a09c899dee
18 changed files with 124 additions and 166 deletions
|
@ -9,9 +9,9 @@
|
|||
"git_repository": [
|
||||
{
|
||||
"id": "luajit",
|
||||
"name": "LuaJIT v2.1-20231021",
|
||||
"name": "LuaJIT v2.1-20231006",
|
||||
"url": "https://github.com/openresty/luajit2.git",
|
||||
"commit": "aa038d2599f3caec014ebf0ad98d9f8a68aefa2c"
|
||||
"commit": "492cfdd0d829e21abbf8ef8761aa48a3daf5a73f"
|
||||
},
|
||||
{
|
||||
"id": "modsecurity",
|
||||
|
|
3
src/deps/src/luajit/doc/running.html
vendored
3
src/deps/src/luajit/doc/running.html
vendored
|
@ -120,8 +120,7 @@ file name:
|
|||
</p>
|
||||
<ul>
|
||||
<li><tt>c</tt> — C source file, exported bytecode data.</li>
|
||||
<li><tt>cc</tt> — C++ source file, exported bytecode data.</li>
|
||||
<li><tt>h</tt> — C/C++ header file, static bytecode data.</li>
|
||||
<li><tt>h</tt> — C header file, static bytecode data.</li>
|
||||
<li><tt>obj</tt> or <tt>o</tt> — Object file, exported bytecode data
|
||||
(OS- and architecture-specific).</li>
|
||||
<li><tt>raw</tt> or any other extension — Raw bytecode file (portable).
|
||||
|
|
8
src/deps/src/luajit/dynasm/dasm_arm64.lua
vendored
8
src/deps/src/luajit/dynasm/dasm_arm64.lua
vendored
|
@ -549,7 +549,7 @@ end
|
|||
local function parse_load_pair(params, nparams, n, op)
|
||||
if params[n+2] then werror("too many operands") end
|
||||
local pn, p2 = params[n], params[n+1]
|
||||
local scale = 2 + shr(op, 31 - band(shr(op, 26), 1))
|
||||
local scale = shr(op, 30) == 0 and 2 or 3
|
||||
local p1, wb = match(pn, "^%[%s*(.-)%s*%](!?)$")
|
||||
if not p1 then
|
||||
if not p2 then
|
||||
|
@ -806,8 +806,8 @@ map_op = {
|
|||
["ldrsw_*"] = "98000000DxB|b8800000DxL",
|
||||
-- NOTE: ldur etc. are handled by ldr et al.
|
||||
|
||||
["stp_*"] = "28000000DAwP|a8000000DAxP|2c000000DAsP|6c000000DAdP|ac000000DAqP",
|
||||
["ldp_*"] = "28400000DAwP|a8400000DAxP|2c400000DAsP|6c400000DAdP|ac400000DAqP",
|
||||
["stp_*"] = "28000000DAwP|a8000000DAxP|2c000000DAsP|6c000000DAdP",
|
||||
["ldp_*"] = "28400000DAwP|a8400000DAxP|2c400000DAsP|6c400000DAdP",
|
||||
["ldpsw_*"] = "68400000DAxP",
|
||||
|
||||
-- Branches.
|
||||
|
@ -942,7 +942,7 @@ local function parse_template(params, template, nparams, pos)
|
|||
werror("bad register type")
|
||||
end
|
||||
parse_reg_type = false
|
||||
elseif p == "x" or p == "w" or p == "d" or p == "s" or p == "q" then
|
||||
elseif p == "x" or p == "w" or p == "d" or p == "s" then
|
||||
if parse_reg_type ~= p then
|
||||
werror("register size mismatch")
|
||||
end
|
||||
|
|
3
src/deps/src/luajit/src/host/buildvm_peobj.c
vendored
3
src/deps/src/luajit/src/host/buildvm_peobj.c
vendored
|
@ -373,12 +373,11 @@ void emit_peobj(BuildCtx *ctx)
|
|||
|
||||
/* Unwind codes for .text section with handler. */
|
||||
p = uwc;
|
||||
CADD_FP(192); /* +2 */
|
||||
CSAVE_REGS(19, 28, 176); /* +5*2 */
|
||||
CSAVE_FREGS(8, 15, 96); /* +4*2 */
|
||||
CSAVE_FPLR(192); /* +1 */
|
||||
CALLOC_S(208); /* +1 */
|
||||
CEND_ALIGN; /* +1 +1 -> 24 */
|
||||
CEND_ALIGN; /* +1 +3 -> 24 */
|
||||
|
||||
u32 = ((24u >> 2) << 27) | (1u << 20) | (fcofs >> 2);
|
||||
owrite(ctx, &u32, 4);
|
||||
|
|
4
src/deps/src/luajit/src/jit/bcsave.lua
vendored
4
src/deps/src/luajit/src/jit/bcsave.lua
vendored
|
@ -39,7 +39,7 @@ Save LuaJIT bytecode: luajit -b[options] input output
|
|||
-- Stop handling options.
|
||||
- Use stdin as input and/or stdout as output.
|
||||
|
||||
File types: c cc h obj o raw (default)
|
||||
File types: c h obj o raw (default)
|
||||
]]
|
||||
os.exit(1)
|
||||
end
|
||||
|
@ -82,7 +82,7 @@ end
|
|||
------------------------------------------------------------------------------
|
||||
|
||||
local map_type = {
|
||||
raw = "raw", c = "c", cc = "c", h = "h", o = "obj", obj = "obj",
|
||||
raw = "raw", c = "c", h = "h", o = "obj", obj = "obj",
|
||||
}
|
||||
|
||||
local map_arch = {
|
||||
|
|
2
src/deps/src/luajit/src/jit/dis_arm64.lua
vendored
2
src/deps/src/luajit/src/jit/dis_arm64.lua
vendored
|
@ -948,7 +948,7 @@ local function disass_ins(ctx)
|
|||
elseif p == "U" then
|
||||
local rn = map_regs.x[band(rshift(op, 5), 31)]
|
||||
local sz = band(rshift(op, 30), 3)
|
||||
local imm12 = lshift(rshift(lshift(op, 10), 20), sz)
|
||||
local imm12 = lshift(arshift(lshift(op, 10), 20), sz)
|
||||
if imm12 ~= 0 then
|
||||
x = "["..rn..", #"..imm12.."]"
|
||||
else
|
||||
|
|
14
src/deps/src/luajit/src/lj_arch.h
vendored
14
src/deps/src/luajit/src/lj_arch.h
vendored
|
@ -538,6 +538,15 @@
|
|||
#error "No support for ILP32 model on ARM64"
|
||||
#undef LJ_TARGET_ARM64
|
||||
#endif
|
||||
#elif LJ_TARGET_PPC
|
||||
#if defined(_LITTLE_ENDIAN) && (!defined(_BYTE_ORDER) || (_BYTE_ORDER == _LITTLE_ENDIAN))
|
||||
#error "No support for little-endian PPC32"
|
||||
#undef LJ_TARGET_PPC
|
||||
#endif
|
||||
#if defined(__NO_FPRS__) && !defined(_SOFT_FLOAT)
|
||||
#error "No support for PPC/e500, use LuaJIT 2.0"
|
||||
#undef LJ_TARGET_PPC
|
||||
#endif
|
||||
#elif LJ_TARGET_MIPS32
|
||||
#if !((defined(_MIPS_SIM_ABI32) && _MIPS_SIM == _MIPS_SIM_ABI32) || (defined(_ABIO32) && _MIPS_SIM == _ABIO32))
|
||||
#error "Only o32 ABI supported for MIPS32"
|
||||
|
@ -697,10 +706,6 @@ extern void *LJ_WIN_LOADLIBA(const char *path);
|
|||
#endif
|
||||
#endif
|
||||
|
||||
#if LUAJIT_TARGET == LUAJIT_ARCH_PPC && LJ_ARCH_ENDIAN == LUAJIT_LE
|
||||
#define LJ_NO_UNWIND 0
|
||||
#define LJ_UNWIND_EXT 0
|
||||
#else
|
||||
#if defined(LUAJIT_NO_UNWIND) || __GNU_COMPACT_EH__ || defined(__symbian__) || LJ_TARGET_IOS || LJ_TARGET_PS3 || LJ_TARGET_PS4 || LJ_TARGET_PS5
|
||||
#define LJ_NO_UNWIND 1
|
||||
#endif
|
||||
|
@ -710,7 +715,6 @@ extern void *LJ_WIN_LOADLIBA(const char *path);
|
|||
#else
|
||||
#define LJ_UNWIND_EXT 0
|
||||
#endif
|
||||
#endif //#if LUAJIT_TARGET == LUAJIT_ARCH_PPC && LJ_ARCH_ENDIAN == LUAJIT_LE
|
||||
|
||||
#if LJ_UNWIND_EXT && LJ_HASJIT && !LJ_TARGET_ARM && !(LJ_ABI_WIN && LJ_TARGET_X86)
|
||||
#define LJ_UNWIND_JIT 1
|
||||
|
|
2
src/deps/src/luajit/src/lj_asm_arm.h
vendored
2
src/deps/src/luajit/src/lj_asm_arm.h
vendored
|
@ -2255,7 +2255,7 @@ static Reg asm_setup_call_slots(ASMState *as, IRIns *ir, const CCallInfo *ci)
|
|||
}
|
||||
if (nslots > as->evenspill) /* Leave room for args in stack slots. */
|
||||
as->evenspill = nslots;
|
||||
return REGSP_HINT(irt_isfp(ir->t) ? RID_FPRET : RID_RET);
|
||||
return REGSP_HINT(RID_RET);
|
||||
}
|
||||
|
||||
static void asm_setup_target(ASMState *as)
|
||||
|
|
2
src/deps/src/luajit/src/lj_asm_arm64.h
vendored
2
src/deps/src/luajit/src/lj_asm_arm64.h
vendored
|
@ -2040,7 +2040,7 @@ static Reg asm_setup_call_slots(ASMState *as, IRIns *ir, const CCallInfo *ci)
|
|||
as->evenspill = nslots;
|
||||
}
|
||||
#endif
|
||||
return REGSP_HINT(irt_isfp(ir->t) ? RID_FPRET : RID_RET);
|
||||
return REGSP_HINT(RID_RET);
|
||||
}
|
||||
|
||||
static void asm_setup_target(ASMState *as)
|
||||
|
|
4
src/deps/src/luajit/src/lj_carith.c
vendored
4
src/deps/src/luajit/src/lj_carith.c
vendored
|
@ -44,13 +44,9 @@ static int carith_checkarg(lua_State *L, CTState *cts, CDArith *ca)
|
|||
p = (uint8_t *)cdata_getptr(p, ct->size);
|
||||
if (ctype_isref(ct->info)) ct = ctype_rawchild(cts, ct);
|
||||
} else if (ctype_isfunc(ct->info)) {
|
||||
CTypeID id0 = i ? ctype_typeid(cts, ca->ct[0]) : 0;
|
||||
p = (uint8_t *)*(void **)p;
|
||||
ct = ctype_get(cts,
|
||||
lj_ctype_intern(cts, CTINFO(CT_PTR, CTALIGN_PTR|id), CTSIZE_PTR));
|
||||
if (i) { /* cts->tab may have been reallocated. */
|
||||
ca->ct[0] = ctype_get(cts, id0);
|
||||
}
|
||||
}
|
||||
if (ctype_isenum(ct->info)) ct = ctype_child(cts, ct);
|
||||
ca->ct[i] = ct;
|
||||
|
|
2
src/deps/src/luajit/src/lj_ccall.c
vendored
2
src/deps/src/luajit/src/lj_ccall.c
vendored
|
@ -1393,7 +1393,7 @@ int lj_ccall_func(lua_State *L, GCcdata *cd)
|
|||
ct = ctype_rawchild(cts, ct);
|
||||
}
|
||||
if (ctype_isfunc(ct->info)) {
|
||||
CCallState cc = {0};
|
||||
CCallState cc;
|
||||
int gcsteps, ret;
|
||||
cc.func = (void (*)(void))cdata_getptr(cdataptr(cd), sz);
|
||||
gcsteps = ccall_set_args(L, cts, ct, &cc);
|
||||
|
|
1
src/deps/src/luajit/src/lj_ccall.h
vendored
1
src/deps/src/luajit/src/lj_ccall.h
vendored
|
@ -181,7 +181,6 @@ typedef union FPRArg {
|
|||
(CCALL_NARG_GPR > CCALL_NRET_GPR ? CCALL_NARG_GPR : CCALL_NRET_GPR)
|
||||
#define CCALL_NUM_FPR \
|
||||
(CCALL_NARG_FPR > CCALL_NRET_FPR ? CCALL_NARG_FPR : CCALL_NRET_FPR)
|
||||
#define CCALL_MAXSTACK 32
|
||||
|
||||
/* Check against constants in lj_ctype.h. */
|
||||
LJ_STATIC_ASSERT(CCALL_NUM_GPR <= CCALL_MAX_GPR);
|
||||
|
|
6
src/deps/src/luajit/src/lj_ctype.h
vendored
6
src/deps/src/luajit/src/lj_ctype.h
vendored
|
@ -276,8 +276,6 @@ typedef struct CTState {
|
|||
#define CTTYDEFP(_)
|
||||
#endif
|
||||
|
||||
#define CTF_LONG_IF8 (CTF_LONG * (sizeof(long) == 8))
|
||||
|
||||
/* Common types. */
|
||||
#define CTTYDEF(_) \
|
||||
_(NONE, 0, CT_ATTRIB, CTATTRIB(CTA_BAD)) \
|
||||
|
@ -291,8 +289,8 @@ typedef struct CTState {
|
|||
_(UINT16, 2, CT_NUM, CTF_UNSIGNED|CTALIGN(1)) \
|
||||
_(INT32, 4, CT_NUM, CTALIGN(2)) \
|
||||
_(UINT32, 4, CT_NUM, CTF_UNSIGNED|CTALIGN(2)) \
|
||||
_(INT64, 8, CT_NUM, CTF_LONG_IF8|CTALIGN(3)) \
|
||||
_(UINT64, 8, CT_NUM, CTF_UNSIGNED|CTF_LONG_IF8|CTALIGN(3)) \
|
||||
_(INT64, 8, CT_NUM, CTF_LONG|CTALIGN(3)) \
|
||||
_(UINT64, 8, CT_NUM, CTF_UNSIGNED|CTF_LONG|CTALIGN(3)) \
|
||||
_(FLOAT, 4, CT_NUM, CTF_FP|CTALIGN(2)) \
|
||||
_(DOUBLE, 8, CT_NUM, CTF_FP|CTALIGN(3)) \
|
||||
_(COMPLEX_FLOAT, 8, CT_ARRAY, CTF_COMPLEX|CTALIGN(2)|CTID_FLOAT) \
|
||||
|
|
36
src/deps/src/luajit/src/lj_emit_arm64.h
vendored
36
src/deps/src/luajit/src/lj_emit_arm64.h
vendored
|
@ -193,32 +193,6 @@ static int emit_kdelta(ASMState *as, Reg rd, uint64_t k, int is64)
|
|||
return 0; /* Failed. */
|
||||
}
|
||||
|
||||
#define glofs(as, k) \
|
||||
((intptr_t)((uintptr_t)(k) - (uintptr_t)&J2GG(as->J)->g))
|
||||
#define mcpofs(as, k) \
|
||||
((intptr_t)((uintptr_t)(k) - (uintptr_t)(as->mcp - 1)))
|
||||
#define checkmcpofs(as, k) \
|
||||
(A64F_S_OK(mcpofs(as, k)>>2, 19))
|
||||
|
||||
/* Try to form a const as ADR or ADRP or ADRP + ADD. */
|
||||
static int emit_kadrp(ASMState *as, Reg rd, uint64_t k)
|
||||
{
|
||||
A64Ins ai = A64I_ADR;
|
||||
int64_t ofs = mcpofs(as, k);
|
||||
if (!A64F_S_OK((uint64_t)ofs, 21)) {
|
||||
uint64_t kpage = k & ~0xfffull;
|
||||
MCode *adrp = as->mcp - 1 - (k != kpage);
|
||||
ofs = (int64_t)(kpage - ((uint64_t)adrp & ~0xfffull)) >> 12;
|
||||
if (!A64F_S_OK(ofs, 21))
|
||||
return 0; /* Failed. */
|
||||
if (k != kpage)
|
||||
emit_dn(as, (A64I_ADDx^A64I_K12)|A64F_U12(k - kpage), rd, rd);
|
||||
ai = A64I_ADRP;
|
||||
}
|
||||
emit_d(as, ai|(((uint32_t)ofs&3)<<29)|A64F_S19(ofs>>2), rd);
|
||||
return 1;
|
||||
}
|
||||
|
||||
static void emit_loadk(ASMState *as, Reg rd, uint64_t u64)
|
||||
{
|
||||
int zeros = 0, ones = 0, neg, lshift = 0;
|
||||
|
@ -239,9 +213,6 @@ static void emit_loadk(ASMState *as, Reg rd, uint64_t u64)
|
|||
if (emit_kdelta(as, rd, u64, is64)) {
|
||||
return;
|
||||
}
|
||||
if (emit_kadrp(as, rd, u64)) { /* Either 1 or 2 ins. */
|
||||
return;
|
||||
}
|
||||
}
|
||||
if (neg) {
|
||||
u64 = ~u64;
|
||||
|
@ -269,6 +240,13 @@ static void emit_loadk(ASMState *as, Reg rd, uint64_t u64)
|
|||
/* Load a 64 bit constant into a GPR. */
|
||||
#define emit_loadu64(as, rd, i) emit_loadk(as, rd, i)
|
||||
|
||||
#define glofs(as, k) \
|
||||
((intptr_t)((uintptr_t)(k) - (uintptr_t)&J2GG(as->J)->g))
|
||||
#define mcpofs(as, k) \
|
||||
((intptr_t)((uintptr_t)(k) - (uintptr_t)(as->mcp - 1)))
|
||||
#define checkmcpofs(as, k) \
|
||||
(A64F_S_OK(mcpofs(as, k)>>2, 19))
|
||||
|
||||
static Reg ra_allock(ASMState *as, intptr_t k, RegSet allow);
|
||||
|
||||
/* Get/set from constant pointer. */
|
||||
|
|
3
src/deps/src/luajit/src/lj_parse.c
vendored
3
src/deps/src/luajit/src/lj_parse.c
vendored
|
@ -1752,8 +1752,7 @@ static void expr_table(LexState *ls, ExpDesc *e)
|
|||
expr(ls, &val);
|
||||
if (expr_isk(&key) && key.k != VKNIL &&
|
||||
(key.k == VKSTR || expr_isk_nojump(&val))) {
|
||||
TValue k = {0};
|
||||
TValue *v;
|
||||
TValue k, *v;
|
||||
if (!t) { /* Create template table on demand. */
|
||||
BCReg kidx;
|
||||
t = lj_tab_new(fs->L, needarr ? narr : 0, hsize2hbits(nhash));
|
||||
|
|
2
src/deps/src/luajit/src/lj_target_arm64.h
vendored
2
src/deps/src/luajit/src/lj_target_arm64.h
vendored
|
@ -234,8 +234,6 @@ typedef enum A64Ins {
|
|||
A64I_MOVZx = 0xd2800000,
|
||||
A64I_MOVNw = 0x12800000,
|
||||
A64I_MOVNx = 0x92800000,
|
||||
A64I_ADR = 0x10000000,
|
||||
A64I_ADRP = 0x90000000,
|
||||
|
||||
A64I_LDRB = 0x39400000,
|
||||
A64I_LDRH = 0x79400000,
|
||||
|
|
154
src/deps/src/luajit/src/vm_arm64.dasc
vendored
154
src/deps/src/luajit/src/vm_arm64.dasc
vendored
|
@ -291,17 +291,8 @@
|
|||
| blo target
|
||||
|.endmacro
|
||||
|
|
||||
|.macro init_constants
|
||||
| movn TISNIL, #0
|
||||
| movz TISNUM, #(LJ_TISNUM>>1)&0xffff, lsl #48
|
||||
| movz TISNUMhi, #(LJ_TISNUM>>1)&0xffff, lsl #16
|
||||
|.endmacro
|
||||
|
|
||||
|.macro mov_false, reg; movn reg, #0x8000, lsl #32; .endmacro
|
||||
|.macro mov_true, reg; movn reg, #0x0001, lsl #48; .endmacro
|
||||
|.macro mov_nil, reg; mov reg, TISNIL; .endmacro
|
||||
|.macro cmp_nil, reg; cmp reg, TISNIL; .endmacro
|
||||
|.macro add_TISNUM, dst, src; add dst, src, TISNUM; .endmacro
|
||||
|
|
||||
#define GL_J(field) (GG_G2J + (int)offsetof(jit_State, field))
|
||||
|
|
||||
|
@ -439,7 +430,6 @@ static void build_subroutines(BuildCtx *ctx)
|
|||
|
|
||||
|->vm_unwind_c: // Unwind C stack, return from vm_pcall.
|
||||
| // (void *cframe, int errcode)
|
||||
| add fp, CARG1, # SAVE_FP_LR_
|
||||
| mov sp, CARG1
|
||||
| mov CRET1, CARG2
|
||||
| ldr L, SAVE_L
|
||||
|
@ -451,10 +441,11 @@ static void build_subroutines(BuildCtx *ctx)
|
|||
|
|
||||
|->vm_unwind_ff: // Unwind C stack, return from ff pcall.
|
||||
| // (void *cframe)
|
||||
| add fp, CARG1, # SAVE_FP_LR_
|
||||
| mov sp, CARG1
|
||||
| and sp, CARG1, #CFRAME_RAWMASK
|
||||
| ldr L, SAVE_L
|
||||
| init_constants
|
||||
| movz TISNUM, #(LJ_TISNUM>>1)&0xffff, lsl #48
|
||||
| movz TISNUMhi, #(LJ_TISNUM>>1)&0xffff, lsl #16
|
||||
| movn TISNIL, #0
|
||||
| ldr GL, L->glref // Setup pointer to global state.
|
||||
|->vm_unwind_ff_eh: // Landing pad for external unwinder.
|
||||
| mov RC, #16 // 2 results: false + error message.
|
||||
|
@ -519,9 +510,11 @@ static void build_subroutines(BuildCtx *ctx)
|
|||
| str L, GL->cur_L
|
||||
| mov RA, BASE
|
||||
| ldp BASE, CARG1, L->base
|
||||
| init_constants
|
||||
| movz TISNUM, #(LJ_TISNUM>>1)&0xffff, lsl #48
|
||||
| movz TISNUMhi, #(LJ_TISNUM>>1)&0xffff, lsl #16
|
||||
| ldr PC, [BASE, FRAME_PC]
|
||||
| strb wzr, L->status
|
||||
| movn TISNIL, #0
|
||||
| sub RC, CARG1, BASE
|
||||
| ands CARG1, PC, #FRAME_TYPE
|
||||
| add RC, RC, #8
|
||||
|
@ -557,8 +550,10 @@ static void build_subroutines(BuildCtx *ctx)
|
|||
|3: // Entry point for vm_cpcall/vm_resume (BASE = base, PC = ftype).
|
||||
| str L, GL->cur_L
|
||||
| ldp RB, CARG1, L->base // RB = old base (for vmeta_call).
|
||||
| movz TISNUM, #(LJ_TISNUM>>1)&0xffff, lsl #48
|
||||
| movz TISNUMhi, #(LJ_TISNUM>>1)&0xffff, lsl #16
|
||||
| add PC, PC, BASE
|
||||
| init_constants
|
||||
| movn TISNIL, #0
|
||||
| sub PC, PC, RB // PC = frame delta + frame type
|
||||
| sub NARGS8:RC, CARG1, BASE
|
||||
| st_vmstate ST_INTERP
|
||||
|
@ -667,7 +662,7 @@ static void build_subroutines(BuildCtx *ctx)
|
|||
| b >1
|
||||
|
|
||||
|->vmeta_tgetb: // RB = table, RC = index
|
||||
| add_TISNUM RC, RC
|
||||
| add RC, RC, TISNUM
|
||||
| add CARG2, BASE, RB, lsl #3
|
||||
| add CARG3, sp, TMPDofs
|
||||
| str RC, TMPD
|
||||
|
@ -702,7 +697,7 @@ static void build_subroutines(BuildCtx *ctx)
|
|||
| sxtw CARG2, TMP1w
|
||||
| bl extern lj_tab_getinth // (GCtab *t, int32_t key)
|
||||
| // Returns cTValue * or NULL.
|
||||
| mov_nil TMP0
|
||||
| mov TMP0, TISNIL
|
||||
| cbz CRET1, ->BC_TGETR_Z
|
||||
| ldr TMP0, [CRET1]
|
||||
| b ->BC_TGETR_Z
|
||||
|
@ -725,7 +720,7 @@ static void build_subroutines(BuildCtx *ctx)
|
|||
| b >1
|
||||
|
|
||||
|->vmeta_tsetb: // RB = table, RC = index
|
||||
| add_TISNUM RC, RC
|
||||
| add RC, RC, TISNUM
|
||||
| add CARG2, BASE, RB, lsl #3
|
||||
| add CARG3, sp, TMPDofs
|
||||
| str RC, TMPD
|
||||
|
@ -1039,7 +1034,7 @@ static void build_subroutines(BuildCtx *ctx)
|
|||
|1: // Field metatable must be at same offset for GCtab and GCudata!
|
||||
| ldr TAB:RB, TAB:CARG1->metatable
|
||||
|2:
|
||||
| mov_nil CARG1
|
||||
| mov CARG1, TISNIL
|
||||
| ldr STR:RC, GL->gcroot[GCROOT_MMNAME+MM_metatable]
|
||||
| cbz TAB:RB, ->fff_restv
|
||||
| ldr TMP1w, TAB:RB->hmask
|
||||
|
@ -1061,7 +1056,7 @@ static void build_subroutines(BuildCtx *ctx)
|
|||
| movk CARG1, #(LJ_TTAB>>1)&0xffff, lsl #48
|
||||
| b ->fff_restv
|
||||
|5:
|
||||
| cmp_nil TMP0
|
||||
| cmp TMP0, TISNIL
|
||||
| bne ->fff_restv
|
||||
| b <4
|
||||
|
|
||||
|
@ -1161,8 +1156,8 @@ static void build_subroutines(BuildCtx *ctx)
|
|||
| cbnz TAB:CARG2, ->fff_fallback
|
||||
#endif
|
||||
| mov RC, #(3+1)*8
|
||||
| stp CFUNC:CARG4, CARG1, [BASE, #-16]
|
||||
| str TISNIL, [BASE]
|
||||
| stp CARG1, TISNIL, [BASE, #-8]
|
||||
| str CFUNC:CARG4, [BASE, #-16]
|
||||
| b ->fff_res
|
||||
|
|
||||
|.ffunc_2 ipairs_aux
|
||||
|
@ -1174,14 +1169,14 @@ static void build_subroutines(BuildCtx *ctx)
|
|||
| add CARG2w, CARG2w, #1
|
||||
| cmp CARG2w, TMP1w
|
||||
| ldr PC, [BASE, FRAME_PC]
|
||||
| add_TISNUM TMP2, CARG2
|
||||
| add TMP2, CARG2, TISNUM
|
||||
| mov RC, #(0+1)*8
|
||||
| str TMP2, [BASE, #-16]
|
||||
| bhs >2 // Not in array part?
|
||||
| ldr TMP0, [CARG3, CARG2, lsl #3]
|
||||
|1:
|
||||
| mov TMP1, #(2+1)*8
|
||||
| cmp_nil TMP0
|
||||
| cmp TMP0, TISNIL
|
||||
| str TMP0, [BASE, #-8]
|
||||
| csel RC, RC, TMP1, eq
|
||||
| b ->fff_res
|
||||
|
@ -1204,8 +1199,8 @@ static void build_subroutines(BuildCtx *ctx)
|
|||
| cbnz TAB:CARG2, ->fff_fallback
|
||||
#endif
|
||||
| mov RC, #(3+1)*8
|
||||
| stp CFUNC:CARG4, CARG1, [BASE, #-16]
|
||||
| str TISNUM, [BASE]
|
||||
| stp CARG1, TISNUM, [BASE, #-8]
|
||||
| str CFUNC:CARG4, [BASE, #-16]
|
||||
| b ->fff_res
|
||||
|
|
||||
|//-- Base library: catch errors ----------------------------------------
|
||||
|
@ -1395,7 +1390,7 @@ static void build_subroutines(BuildCtx *ctx)
|
|||
| eor CARG2w, CARG1w, CARG1w, asr #31
|
||||
| movz CARG3, #0x41e0, lsl #48 // 2^31.
|
||||
| subs CARG1w, CARG2w, CARG1w, asr #31
|
||||
| add_TISNUM CARG1, CARG1
|
||||
| add CARG1, CARG1, TISNUM
|
||||
| csel CARG1, CARG1, CARG3, pl
|
||||
| // Fallthrough.
|
||||
|
|
||||
|
@ -1486,7 +1481,7 @@ static void build_subroutines(BuildCtx *ctx)
|
|||
| ldr PC, [BASE, FRAME_PC]
|
||||
| str d0, [BASE, #-16]
|
||||
| mov RC, #(2+1)*8
|
||||
| add_TISNUM CARG2, CARG2
|
||||
| add CARG2, CARG2, TISNUM
|
||||
| str CARG2, [BASE, #-8]
|
||||
| b ->fff_res
|
||||
|
|
||||
|
@ -1552,7 +1547,7 @@ static void build_subroutines(BuildCtx *ctx)
|
|||
| bne ->fff_fallback
|
||||
| ldrb TMP0w, STR:CARG1[1] // Access is always ok (NUL at end).
|
||||
| ldr CARG3w, STR:CARG1->len
|
||||
| add_TISNUM TMP0, TMP0
|
||||
| add TMP0, TMP0, TISNUM
|
||||
| str TMP0, [BASE, #-16]
|
||||
| mov RC, #(0+1)*8
|
||||
| cbz CARG3, ->fff_res
|
||||
|
@ -1698,17 +1693,17 @@ static void build_subroutines(BuildCtx *ctx)
|
|||
|.ffunc_bit tobit
|
||||
| mov TMP0w, CARG1w
|
||||
|9: // Label reused by .ffunc_bit_op users.
|
||||
| add_TISNUM CARG1, TMP0
|
||||
| add CARG1, TMP0, TISNUM
|
||||
| b ->fff_restv
|
||||
|
|
||||
|.ffunc_bit bswap
|
||||
| rev TMP0w, CARG1w
|
||||
| add_TISNUM CARG1, TMP0
|
||||
| add CARG1, TMP0, TISNUM
|
||||
| b ->fff_restv
|
||||
|
|
||||
|.ffunc_bit bnot
|
||||
| mvn TMP0w, CARG1w
|
||||
| add_TISNUM CARG1, TMP0
|
||||
| add CARG1, TMP0, TISNUM
|
||||
| b ->fff_restv
|
||||
|
|
||||
|.macro .ffunc_bit_sh, name, ins, shmod
|
||||
|
@ -1729,7 +1724,7 @@ static void build_subroutines(BuildCtx *ctx)
|
|||
| checkint CARG1, ->vm_tobit_fb
|
||||
|2:
|
||||
| ins TMP0w, CARG1w, TMP1w
|
||||
| add_TISNUM CARG1, TMP0
|
||||
| add CARG1, TMP0, TISNUM
|
||||
| b ->fff_restv
|
||||
|.endmacro
|
||||
|
|
||||
|
@ -1918,7 +1913,8 @@ static void build_subroutines(BuildCtx *ctx)
|
|||
| and CARG3, CARG3, #LJ_GCVMASK
|
||||
| beq >2
|
||||
|1: // Move results down.
|
||||
| ldr CARG1, [RA], #8
|
||||
| ldr CARG1, [RA]
|
||||
| add RA, RA, #8
|
||||
| subs RB, RB, #8
|
||||
| str CARG1, [BASE, RC, lsl #3]
|
||||
| add RC, RC, #1
|
||||
|
@ -2033,7 +2029,9 @@ static void build_subroutines(BuildCtx *ctx)
|
|||
|.if JIT
|
||||
| ldr L, SAVE_L
|
||||
|1:
|
||||
| init_constants
|
||||
| movz TISNUM, #(LJ_TISNUM>>1)&0xffff, lsl #48
|
||||
| movz TISNUMhi, #(LJ_TISNUM>>1)&0xffff, lsl #16
|
||||
| movn TISNIL, #0
|
||||
| cmn CARG1w, #LUA_ERRERR
|
||||
| bhs >9 // Check for error from exit.
|
||||
| ldr LFUNC:CARG2, [BASE, FRAME_FUNC]
|
||||
|
@ -2212,7 +2210,9 @@ static void build_subroutines(BuildCtx *ctx)
|
|||
| bl extern lj_ccallback_enter // (CTState *cts, void *cf)
|
||||
| // Returns lua_State *.
|
||||
| ldp BASE, RC, L:CRET1->base
|
||||
| init_constants
|
||||
| movz TISNUM, #(LJ_TISNUM>>1)&0xffff, lsl #48
|
||||
| movz TISNUMhi, #(LJ_TISNUM>>1)&0xffff, lsl #16
|
||||
| movn TISNIL, #0
|
||||
| mov L, CRET1
|
||||
| ldr LFUNC:CARG3, [BASE, FRAME_FUNC]
|
||||
| sub RC, RC, BASE
|
||||
|
@ -2591,7 +2591,7 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop)
|
|||
| bne >5
|
||||
| negs TMP0w, TMP0w
|
||||
| movz CARG3, #0x41e0, lsl #48 // 2^31.
|
||||
| add_TISNUM TMP0, TMP0
|
||||
| add TMP0, TMP0, TISNUM
|
||||
| csel TMP0, TMP0, CARG3, vc
|
||||
|5:
|
||||
| str TMP0, [BASE, RA, lsl #3]
|
||||
|
@ -2606,7 +2606,7 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop)
|
|||
| bne >2
|
||||
| ldr CARG1w, STR:CARG1->len
|
||||
|1:
|
||||
| add_TISNUM CARG1, CARG1
|
||||
| add CARG1, CARG1, TISNUM
|
||||
| str CARG1, [BASE, RA, lsl #3]
|
||||
| ins_next
|
||||
|
|
||||
|
@ -2714,7 +2714,7 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop)
|
|||
| intins CARG1w, CARG1w, CARG2w
|
||||
| ins_arithfallback bvs
|
||||
|.endif
|
||||
| add_TISNUM CARG1, CARG1
|
||||
| add CARG1, CARG1, TISNUM
|
||||
| str CARG1, [BASE, RA, lsl #3]
|
||||
|4:
|
||||
| ins_next
|
||||
|
@ -2807,7 +2807,7 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop)
|
|||
case BC_KSHORT:
|
||||
| // RA = dst, RC = int16_literal
|
||||
| sxth RCw, RCw
|
||||
| add_TISNUM TMP0, RC
|
||||
| add TMP0, RC, TISNUM
|
||||
| str TMP0, [BASE, RA, lsl #3]
|
||||
| ins_next
|
||||
break;
|
||||
|
@ -3030,7 +3030,7 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop)
|
|||
| cmp TMP1w, CARG1w // In array part?
|
||||
| bhs ->vmeta_tgetv
|
||||
| ldr TMP0, [CARG3]
|
||||
| cmp_nil TMP0
|
||||
| cmp TMP0, TISNIL
|
||||
| beq >5
|
||||
|1:
|
||||
| str TMP0, [BASE, RA, lsl #3]
|
||||
|
@ -3073,7 +3073,7 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop)
|
|||
| ldr NODE:CARG3, NODE:CARG3->next
|
||||
| cmp CARG1, CARG4
|
||||
| bne >4
|
||||
| cmp_nil TMP0
|
||||
| cmp TMP0, TISNIL
|
||||
| beq >5
|
||||
|3:
|
||||
| str TMP0, [BASE, RA, lsl #3]
|
||||
|
@ -3082,7 +3082,7 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop)
|
|||
|4: // Follow hash chain.
|
||||
| cbnz NODE:CARG3, <1
|
||||
| // End of hash chain: key not found, nil result.
|
||||
| mov_nil TMP0
|
||||
| mov TMP0, TISNIL
|
||||
|
|
||||
|5: // Check for __index if table value is nil.
|
||||
| ldr TAB:CARG1, TAB:CARG2->metatable
|
||||
|
@ -3103,7 +3103,7 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop)
|
|||
| cmp RCw, CARG1w // In array part?
|
||||
| bhs ->vmeta_tgetb
|
||||
| ldr TMP0, [CARG3]
|
||||
| cmp_nil TMP0
|
||||
| cmp TMP0, TISNIL
|
||||
| beq >5
|
||||
|1:
|
||||
| str TMP0, [BASE, RA, lsl #3]
|
||||
|
@ -3150,7 +3150,7 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop)
|
|||
| ldr TMP1, [CARG3]
|
||||
| ldr TMP0, [BASE, RA, lsl #3]
|
||||
| ldrb TMP2w, TAB:CARG2->marked
|
||||
| cmp_nil TMP1 // Previous value is nil?
|
||||
| cmp TMP1, TISNIL // Previous value is nil?
|
||||
| beq >5
|
||||
|1:
|
||||
| str TMP0, [CARG3]
|
||||
|
@ -3202,7 +3202,7 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop)
|
|||
| cmp CARG1, CARG4
|
||||
| bne >5
|
||||
| ldr TMP0, [BASE, RA, lsl #3]
|
||||
| cmp_nil TMP1 // Previous value is nil?
|
||||
| cmp TMP1, TISNIL // Previous value is nil?
|
||||
| beq >4
|
||||
|2:
|
||||
| str TMP0, NODE:CARG3->val
|
||||
|
@ -3261,7 +3261,7 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop)
|
|||
| ldr TMP1, [CARG3]
|
||||
| ldr TMP0, [BASE, RA, lsl #3]
|
||||
| ldrb TMP2w, TAB:CARG2->marked
|
||||
| cmp_nil TMP1 // Previous value is nil?
|
||||
| cmp TMP1, TISNIL // Previous value is nil?
|
||||
| beq >5
|
||||
|1:
|
||||
| str TMP0, [CARG3]
|
||||
|
@ -3360,8 +3360,9 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop)
|
|||
|->BC_CALL_Z:
|
||||
| mov RB, BASE // Save old BASE for vmeta_call.
|
||||
| add BASE, BASE, RA, lsl #3
|
||||
| ldr CARG3, [BASE], #16
|
||||
| ldr CARG3, [BASE]
|
||||
| sub NARGS8:RC, NARGS8:RC, #8
|
||||
| add BASE, BASE, #16
|
||||
| checkfunc CARG3, ->vmeta_call
|
||||
| ins_call
|
||||
break;
|
||||
|
@ -3377,8 +3378,9 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop)
|
|||
| // RA = base, (RB = 0,) RC = (nargs+1)*8
|
||||
|->BC_CALLT1_Z:
|
||||
| add RA, BASE, RA, lsl #3
|
||||
| ldr TMP1, [RA], #16
|
||||
| ldr TMP1, [RA]
|
||||
| sub NARGS8:RC, NARGS8:RC, #8
|
||||
| add RA, RA, #16
|
||||
| checktp CARG3, TMP1, LJ_TFUNC, ->vmeta_callt
|
||||
| ldr PC, [BASE, FRAME_PC]
|
||||
|->BC_CALLT2_Z:
|
||||
|
@ -3458,10 +3460,10 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop)
|
|||
| add CARG3, CARG2, CARG1, lsl #3
|
||||
| bhs >5 // Index points after array part?
|
||||
| ldr TMP0, [CARG3]
|
||||
| cmp_nil TMP0
|
||||
| cmp TMP0, TISNIL
|
||||
| cinc CARG1, CARG1, eq // Skip holes in array part.
|
||||
| beq <1
|
||||
| add_TISNUM CARG1, CARG1
|
||||
| add CARG1, CARG1, TISNUM
|
||||
| stp CARG1, TMP0, [RA]
|
||||
| add CARG1, CARG1, #1
|
||||
|3:
|
||||
|
@ -3479,7 +3481,7 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop)
|
|||
| add NODE:CARG3, NODE:RB, CARG1, lsl #3 // node = tab->node + idx*3*8
|
||||
| bhi <4
|
||||
| ldp TMP0, CARG1, NODE:CARG3->val
|
||||
| cmp_nil TMP0
|
||||
| cmp TMP0, TISNIL
|
||||
| add RC, RC, #1
|
||||
| beq <6 // Skip holes in hash part.
|
||||
| stp CARG1, TMP0, [RA]
|
||||
|
@ -3497,8 +3499,8 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop)
|
|||
| checkfunc CFUNC:CARG1, >5
|
||||
| asr TMP0, TAB:CARG3, #47
|
||||
| ldrb TMP1w, CFUNC:CARG1->ffid
|
||||
| cmp_nil CARG4
|
||||
| ccmn TMP0, #-LJ_TTAB, #0, eq
|
||||
| cmn TMP0, #-LJ_TTAB
|
||||
| ccmp CARG4, TISNIL, #0, eq
|
||||
| ccmp TMP1w, #FF_next_N, #0, eq
|
||||
| bne >5
|
||||
| mov TMP0w, #0xfffe7fff // LJ_KEYINDEX
|
||||
|
@ -3538,51 +3540,51 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop)
|
|||
| and RC, RC, #255
|
||||
| // RA = base, RB = (nresults+1), RC = numparams
|
||||
| ldr TMP1, [BASE, FRAME_PC]
|
||||
| add TMP0, BASE, RC, lsl #3
|
||||
| add RC, BASE, RA, lsl #3 // RC = destination
|
||||
| add TMP0, TMP0, #FRAME_VARG
|
||||
| add TMP2, RC, RB, lsl #3
|
||||
| sub RA, TMP0, TMP1 // RA = vbase
|
||||
| // Note: RA may now be even _above_ BASE if nargs was < numparams.
|
||||
| add RC, BASE, RC, lsl #3
|
||||
| add RA, BASE, RA, lsl #3
|
||||
| add RC, RC, #FRAME_VARG
|
||||
| add TMP2, RA, RB, lsl #3
|
||||
| sub RC, RC, TMP1 // RC = vbase
|
||||
| // Note: RC may now be even _above_ BASE if nargs was < numparams.
|
||||
| sub TMP3, BASE, #16 // TMP3 = vtop
|
||||
| cbz RB, >5
|
||||
| sub TMP2, TMP2, #16
|
||||
|1: // Copy vararg slots to destination slots.
|
||||
| cmp RA, TMP3
|
||||
| ldr TMP0, [RA], #8
|
||||
| csinv TMP0, TMP0, xzr, lo // TISNIL = ~xzr
|
||||
| cmp RC, TMP2
|
||||
| str TMP0, [RC], #8
|
||||
| cmp RC, TMP3
|
||||
| ldr TMP0, [RC], #8
|
||||
| csel TMP0, TMP0, TISNIL, lo
|
||||
| cmp RA, TMP2
|
||||
| str TMP0, [RA], #8
|
||||
| blo <1
|
||||
|2:
|
||||
| ins_next
|
||||
|
|
||||
|5: // Copy all varargs.
|
||||
| ldr TMP0, L->maxstack
|
||||
| subs TMP2, TMP3, RA
|
||||
| subs TMP2, TMP3, RC
|
||||
| csel RB, xzr, TMP2, le // MULTRES = (max(vtop-vbase,0)+1)*8
|
||||
| add RB, RB, #8
|
||||
| add TMP1, RC, TMP2
|
||||
| add TMP1, RA, TMP2
|
||||
| str RBw, SAVE_MULTRES
|
||||
| ble <2 // Nothing to copy.
|
||||
| cmp TMP1, TMP0
|
||||
| bhi >7
|
||||
|6:
|
||||
| ldr TMP0, [RA], #8
|
||||
| str TMP0, [RC], #8
|
||||
| cmp RA, TMP3
|
||||
| ldr TMP0, [RC], #8
|
||||
| str TMP0, [RA], #8
|
||||
| cmp RC, TMP3
|
||||
| blo <6
|
||||
| b <2
|
||||
|
|
||||
|7: // Grow stack for varargs.
|
||||
| lsr CARG2, TMP2, #3
|
||||
| stp BASE, RC, L->base
|
||||
| stp BASE, RA, L->base
|
||||
| mov CARG1, L
|
||||
| sub RA, RA, BASE // Need delta, because BASE may change.
|
||||
| sub RC, RC, BASE // Need delta, because BASE may change.
|
||||
| str PC, SAVE_PC
|
||||
| bl extern lj_state_growstack // (lua_State *L, int n)
|
||||
| ldp BASE, RC, L->base
|
||||
| add RA, BASE, RA
|
||||
| ldp BASE, RA, L->base
|
||||
| add RC, BASE, RC
|
||||
| sub TMP3, BASE, #16
|
||||
| b <6
|
||||
break;
|
||||
|
@ -3726,7 +3728,7 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop)
|
|||
} else {
|
||||
| adds CARG1w, CARG1w, CARG3w
|
||||
| bvs >2
|
||||
| add_TISNUM TMP0, CARG1
|
||||
| add TMP0, CARG1, TISNUM
|
||||
| tbnz CARG3w, #31, >4
|
||||
| cmp CARG1w, CARG2w
|
||||
}
|
||||
|
@ -3805,7 +3807,7 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop)
|
|||
| // RA = base, RC = target
|
||||
| ldr CARG1, [BASE, RA, lsl #3]
|
||||
| add TMP1, BASE, RA, lsl #3
|
||||
| cmp_nil CARG1
|
||||
| cmp CARG1, TISNIL
|
||||
| beq >1 // Stop if iterator returned nil.
|
||||
if (op == BC_JITERL) {
|
||||
| str CARG1, [TMP1, #-8]
|
||||
|
|
40
src/deps/src/luajit/src/vm_ppc.dasc
vendored
40
src/deps/src/luajit/src/vm_ppc.dasc
vendored
|
@ -977,11 +977,8 @@ static void build_subroutines(BuildCtx *ctx)
|
|||
|.if FFI
|
||||
| cmplwi TMP0, 1
|
||||
|.endif
|
||||
|// PC value corrected to avoid segfault
|
||||
| lwz PC, FRAME_CONTPC(RB) // Restore PC from [cont|PC].
|
||||
| addi BASEP4, BASE, 4
|
||||
| addi TMP2, RD, WORD_HI-8
|
||||
| lwz TMP1, LFUNC:TMP1->pc
|
||||
| lwz PC, -16(RB) // Restore PC from [cont|PC].
|
||||
| subi TMP2, RD, 8
|
||||
| stwx TISNIL, RA, TMP2 // Ensure one valid arg.
|
||||
|.if P64
|
||||
| ld TMP3, 0(DISPATCH)
|
||||
|
@ -989,9 +986,7 @@ static void build_subroutines(BuildCtx *ctx)
|
|||
|.if FFI
|
||||
| ble >1
|
||||
|.endif
|
||||
|.if P64
|
||||
| add TMP0, TMP0, TMP3
|
||||
|.endif
|
||||
| lwz TMP1, LFUNC:TMP1->pc
|
||||
| lwz KBASE, PC2PROTO(k)(TMP1)
|
||||
| // BASE = base, RA = resultptr, RB = meta base
|
||||
| mtctr TMP0
|
||||
|
@ -1720,23 +1715,14 @@ static void build_subroutines(BuildCtx *ctx)
|
|||
|
|
||||
|//-- Base library: iterators -------------------------------------------
|
||||
|
|
||||
|.ffunc next
|
||||
| cmplwi NARGS8:RC, 8
|
||||
| lwz TAB:CARG1, WORD_LO(BASE)
|
||||
| blt ->fff_fallback
|
||||
|.if ENDIAN_LE
|
||||
| add TMP1, BASE, NARGS8:RC
|
||||
| stw TISNIL, WORD_HI(TMP1) // Set missing 2nd arg to nil.
|
||||
|.else
|
||||
| stwx TISNIL, BASE, NARGS8:RC // Set missing 2nd arg to nil.
|
||||
|.endif
|
||||
|.ffunc_1 next
|
||||
| stwx TISNIL, BASE, NARGS8:RC // Set missing 2nd arg to nil.
|
||||
| checktab CARG3
|
||||
| lwz PC, FRAME_PC(BASE)
|
||||
| stp BASE, L->base // Add frame since C call can throw.
|
||||
| stp BASE, L->top // Dummy frame length is ok.
|
||||
| bne ->fff_fallback
|
||||
| la CARG2, 8(BASE)
|
||||
| la CARG3, -8(BASE)
|
||||
| stw PC, SAVE_PC
|
||||
| bl extern lj_tab_next // (GCtab *t, cTValue *key,TValue *o)
|
||||
| bl extern lj_tab_next // (GCtab *t, cTValue *key, TValue *o)
|
||||
| // Returns 1=found, 0=end, -1=error.
|
||||
| cmpwi CRET1, 0
|
||||
| la RA, -8(BASE)
|
||||
|
@ -3553,7 +3539,7 @@ static void build_subroutines(BuildCtx *ctx)
|
|||
| .endif
|
||||
| cmpwi cr1, CARG3, 0
|
||||
| mr TMP2, sp
|
||||
| addic. CARG2, CARG2, -PSIZE
|
||||
| addic. CARG2, CARG2, -4
|
||||
| .if GPR64
|
||||
| stdux sp, sp, TMP1
|
||||
| .else
|
||||
|
@ -5694,10 +5680,10 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop)
|
|||
| crand 4*cr0+eq, 4*cr0+eq, 4*cr7+eq
|
||||
| add TMP3, PC, TMP0
|
||||
| bne cr0, >5
|
||||
| lus TMP1, 0xfffe
|
||||
| ori TMP1, TMP1, 0x7fff
|
||||
| stw ZERO, WORD_LO-8(RA) // Initialize control var.
|
||||
| stw TMP1, WORD_HI-8(RA)
|
||||
| lus TMP1, (LJ_KEYINDEX >> 16)
|
||||
| ori TMP1, TMP1, (LJ_KEYINDEX & 0xffff)
|
||||
| stw ZERO, -4(RA) // Initialize control var.
|
||||
| stw TMP1, -8(RA)
|
||||
| addis PC, TMP3, -(BCBIAS_J*4 >> 16)
|
||||
|1:
|
||||
| ins_next
|
||||
|
|
Loading…
Reference in a new issue