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@ -7,8 +7,7 @@ x86
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- variable instruction size (usually 2-3 bytes)
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- little endian
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- partially "open"
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patented anymore
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- 16, 32, 64 bit
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- 16, 32, 64 bit versions
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- supports (usually as extension) float, SIMD, MMX, SSE, ...
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- modes:
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- real: 20b segmented addr. (~1 Mib RAM), no mem. protection
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@ -78,7 +77,7 @@ ARM (advanced RISC machines)
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--------------------------------------------------------------------------------
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- family of instruction sets (ARMv1, ARMv2, ARMv3, ...)
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- mainly for embedded, simple, low energy sonsumption and heat
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- arch.: register-register
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- arch.: load-store
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- "proprietary"
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- fixed instr. length (32b), BUT there is also a Thumb subset that encodes
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instrs. as 16b (smaller code but fewer instructions), and Thumb2 (variable
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