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#
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# General architecture dependent options
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#
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config KEXEC_CORE
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bool
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config OPROFILE
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tristate "OProfile system profiling"
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depends on PROFILING
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depends on HAVE_OPROFILE
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select RING_BUFFER
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select RING_BUFFER_ALLOW_SWAP
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help
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OProfile is a profiling system capable of profiling the
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whole system, include the kernel, kernel modules, libraries,
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and applications.
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If unsure, say N.
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config OPROFILE_EVENT_MULTIPLEX
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bool "OProfile multiplexing support (EXPERIMENTAL)"
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default n
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depends on OPROFILE && X86
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help
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The number of hardware counters is limited. The multiplexing
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feature enables OProfile to gather more events than counters
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are provided by the hardware. This is realized by switching
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between events at an user specified time interval.
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If unsure, say N.
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config HAVE_OPROFILE
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bool
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config OPROFILE_NMI_TIMER
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def_bool y
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depends on PERF_EVENTS && HAVE_PERF_EVENTS_NMI && !PPC64
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config KPROBES
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bool "Kprobes"
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depends on MODULES
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depends on HAVE_KPROBES
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select KALLSYMS
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help
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Kprobes allows you to trap at almost any kernel address and
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execute a callback function. register_kprobe() establishes
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a probepoint and specifies the callback. Kprobes is useful
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for kernel debugging, non-intrusive instrumentation and testing.
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If in doubt, say "N".
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config JUMP_LABEL
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bool "Optimize very unlikely/likely branches"
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depends on HAVE_ARCH_JUMP_LABEL
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help
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This option enables a transparent branch optimization that
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makes certain almost-always-true or almost-always-false branch
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conditions even cheaper to execute within the kernel.
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Certain performance-sensitive kernel code, such as trace points,
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scheduler functionality, networking code and KVM have such
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branches and include support for this optimization technique.
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If it is detected that the compiler has support for "asm goto",
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the kernel will compile such branches with just a nop
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instruction. When the condition flag is toggled to true, the
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nop will be converted to a jump instruction to execute the
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conditional block of instructions.
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This technique lowers overhead and stress on the branch prediction
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of the processor and generally makes the kernel faster. The update
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of the condition is slower, but those are always very rare.
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( On 32-bit x86, the necessary options added to the compiler
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flags may increase the size of the kernel slightly. )
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config STATIC_KEYS_SELFTEST
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bool "Static key selftest"
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depends on JUMP_LABEL
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help
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Boot time self-test of the branch patching code.
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config OPTPROBES
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def_bool y
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depends on KPROBES && HAVE_OPTPROBES
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depends on !PREEMPT
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config KPROBES_ON_FTRACE
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def_bool y
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depends on KPROBES && HAVE_KPROBES_ON_FTRACE
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depends on DYNAMIC_FTRACE_WITH_REGS
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help
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If function tracer is enabled and the arch supports full
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passing of pt_regs to function tracing, then kprobes can
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optimize on top of function tracing.
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config UPROBES
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def_bool n
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help
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Uprobes is the user-space counterpart to kprobes: they
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enable instrumentation applications (such as 'perf probe')
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to establish unintrusive probes in user-space binaries and
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libraries, by executing handler functions when the probes
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are hit by user-space applications.
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( These probes come in the form of single-byte breakpoints,
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managed by the kernel and kept transparent to the probed
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application. )
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config HAVE_64BIT_ALIGNED_ACCESS
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def_bool 64BIT && !HAVE_EFFICIENT_UNALIGNED_ACCESS
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help
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Some architectures require 64 bit accesses to be 64 bit
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aligned, which also requires structs containing 64 bit values
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to be 64 bit aligned too. This includes some 32 bit
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architectures which can do 64 bit accesses, as well as 64 bit
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architectures without unaligned access.
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This symbol should be selected by an architecture if 64 bit
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accesses are required to be 64 bit aligned in this way even
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though it is not a 64 bit architecture.
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See Documentation/unaligned-memory-access.txt for more
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information on the topic of unaligned memory accesses.
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config HAVE_EFFICIENT_UNALIGNED_ACCESS
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bool
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help
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Some architectures are unable to perform unaligned accesses
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without the use of get_unaligned/put_unaligned. Others are
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unable to perform such accesses efficiently (e.g. trap on
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unaligned access and require fixing it up in the exception
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handler.)
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This symbol should be selected by an architecture if it can
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perform unaligned accesses efficiently to allow different
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code paths to be selected for these cases. Some network
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drivers, for example, could opt to not fix up alignment
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problems with received packets if doing so would not help
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much.
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See Documentation/unaligned-memory-access.txt for more
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information on the topic of unaligned memory accesses.
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config ARCH_USE_BUILTIN_BSWAP
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bool
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help
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Modern versions of GCC (since 4.4) have builtin functions
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for handling byte-swapping. Using these, instead of the old
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inline assembler that the architecture code provides in the
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__arch_bswapXX() macros, allows the compiler to see what's
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happening and offers more opportunity for optimisation. In
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particular, the compiler will be able to combine the byteswap
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with a nearby load or store and use load-and-swap or
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store-and-swap instructions if the architecture has them. It
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should almost *never* result in code which is worse than the
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hand-coded assembler in <asm/swab.h>. But just in case it
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does, the use of the builtins is optional.
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Any architecture with load-and-swap or store-and-swap
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instructions should set this. And it shouldn't hurt to set it
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on architectures that don't have such instructions.
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config KRETPROBES
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def_bool y
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depends on KPROBES && HAVE_KRETPROBES
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config USER_RETURN_NOTIFIER
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bool
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depends on HAVE_USER_RETURN_NOTIFIER
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help
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Provide a kernel-internal notification when a cpu is about to
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switch to user mode.
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config HAVE_IOREMAP_PROT
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bool
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config HAVE_KPROBES
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bool
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config HAVE_KRETPROBES
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bool
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config HAVE_OPTPROBES
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bool
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config HAVE_KPROBES_ON_FTRACE
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bool
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config HAVE_NMI_WATCHDOG
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bool
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#
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# An arch should select this if it provides all these things:
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#
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# task_pt_regs() in asm/processor.h or asm/ptrace.h
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# arch_has_single_step() if there is hardware single-step support
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# arch_has_block_step() if there is hardware block-step support
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# asm/syscall.h supplying asm-generic/syscall.h interface
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# linux/regset.h user_regset interfaces
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# CORE_DUMP_USE_REGSET #define'd in linux/elf.h
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# TIF_SYSCALL_TRACE calls tracehook_report_syscall_{entry,exit}
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# TIF_NOTIFY_RESUME calls tracehook_notify_resume()
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# signal delivery calls tracehook_signal_handler()
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#
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config HAVE_ARCH_TRACEHOOK
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bool
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config HAVE_DMA_ATTRS
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bool
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config HAVE_DMA_CONTIGUOUS
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bool
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config GENERIC_SMP_IDLE_THREAD
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bool
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config GENERIC_IDLE_POLL_SETUP
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bool
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# Select if arch init_task initializer is different to init/init_task.c
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config ARCH_INIT_TASK
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bool
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# Select if arch has its private alloc_task_struct() function
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config ARCH_TASK_STRUCT_ALLOCATOR
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bool
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# Select if arch has its private alloc_thread_stack() function
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config ARCH_THREAD_STACK_ALLOCATOR
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bool
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# Select if arch wants to size task_struct dynamically via arch_task_struct_size:
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config ARCH_WANTS_DYNAMIC_TASK_STRUCT
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bool
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config HAVE_REGS_AND_STACK_ACCESS_API
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bool
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help
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This symbol should be selected by an architecure if it supports
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the API needed to access registers and stack entries from pt_regs,
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declared in asm/ptrace.h
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For example the kprobes-based event tracer needs this API.
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config HAVE_CLK
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bool
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help
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The <linux/clk.h> calls support software clock gating and
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thus are a key power management tool on many systems.
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config HAVE_DMA_API_DEBUG
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bool
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config HAVE_HW_BREAKPOINT
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bool
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depends on PERF_EVENTS
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config HAVE_MIXED_BREAKPOINTS_REGS
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bool
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depends on HAVE_HW_BREAKPOINT
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help
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Depending on the arch implementation of hardware breakpoints,
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some of them have separate registers for data and instruction
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breakpoints addresses, others have mixed registers to store
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them but define the access type in a control register.
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Select this option if your arch implements breakpoints under the
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latter fashion.
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config HAVE_USER_RETURN_NOTIFIER
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bool
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config HAVE_PERF_EVENTS_NMI
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bool
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help
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System hardware can generate an NMI using the perf event
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subsystem. Also has support for calculating CPU cycle events
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to determine how many clock cycles in a given period.
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config HAVE_PERF_REGS
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bool
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help
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Support selective register dumps for perf events. This includes
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bit-mapping of each registers and a unique architecture id.
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config HAVE_PERF_USER_STACK_DUMP
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bool
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help
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Support user stack dumps for perf event samples. This needs
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access to the user stack pointer which is not unified across
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architectures.
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config HAVE_ARCH_JUMP_LABEL
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bool
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config HAVE_RCU_TABLE_FREE
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bool
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config ARCH_HAVE_NMI_SAFE_CMPXCHG
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bool
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config HAVE_ALIGNED_STRUCT_PAGE
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bool
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help
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||||
This makes sure that struct pages are double word aligned and that
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e.g. the SLUB allocator can perform double word atomic operations
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on a struct page for better performance. However selecting this
|
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might increase the size of a struct page by a word.
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config HAVE_CMPXCHG_LOCAL
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bool
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config HAVE_CMPXCHG_DOUBLE
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bool
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config ARCH_WANT_IPC_PARSE_VERSION
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bool
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config ARCH_WANT_COMPAT_IPC_PARSE_VERSION
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bool
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config ARCH_WANT_OLD_COMPAT_IPC
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select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
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bool
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config HAVE_ARCH_SECCOMP_FILTER
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bool
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help
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||||
An arch should select this symbol if it provides all of these things:
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- syscall_get_arch()
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- syscall_get_arguments()
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- syscall_rollback()
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- syscall_set_return_value()
|
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- SIGSYS siginfo_t support
|
||||
- secure_computing is called from a ptrace_event()-safe context
|
||||
- secure_computing return value is checked and a return value of -1
|
||||
results in the system call being skipped immediately.
|
||||
- seccomp syscall wired up
|
||||
|
||||
For best performance, an arch should use seccomp_phase1 and
|
||||
seccomp_phase2 directly. It should call seccomp_phase1 for all
|
||||
syscalls if TIF_SECCOMP is set, but seccomp_phase1 does not
|
||||
need to be called from a ptrace-safe context. It must then
|
||||
call seccomp_phase2 if seccomp_phase1 returns anything other
|
||||
than SECCOMP_PHASE1_OK or SECCOMP_PHASE1_SKIP.
|
||||
|
||||
As an additional optimization, an arch may provide seccomp_data
|
||||
directly to seccomp_phase1; this avoids multiple calls
|
||||
to the syscall_xyz helpers for every syscall.
|
||||
|
||||
config SECCOMP_FILTER
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||||
def_bool y
|
||||
depends on HAVE_ARCH_SECCOMP_FILTER && SECCOMP && NET
|
||||
help
|
||||
Enable tasks to build secure computing environments defined
|
||||
in terms of Berkeley Packet Filter programs which implement
|
||||
task-defined system call filtering polices.
|
||||
|
||||
See Documentation/prctl/seccomp_filter.txt for details.
|
||||
|
||||
config HAVE_CC_STACKPROTECTOR
|
||||
bool
|
||||
help
|
||||
An arch should select this symbol if:
|
||||
- its compiler supports the -fstack-protector option
|
||||
- it has implemented a stack canary (e.g. __stack_chk_guard)
|
||||
|
||||
config CC_STACKPROTECTOR
|
||||
def_bool n
|
||||
help
|
||||
Set when a stack-protector mode is enabled, so that the build
|
||||
can enable kernel-side support for the GCC feature.
|
||||
|
||||
choice
|
||||
prompt "Stack Protector buffer overflow detection"
|
||||
depends on HAVE_CC_STACKPROTECTOR
|
||||
default CC_STACKPROTECTOR_NONE
|
||||
help
|
||||
This option turns on the "stack-protector" GCC feature. This
|
||||
feature puts, at the beginning of functions, a canary value on
|
||||
the stack just before the return address, and validates
|
||||
the value just before actually returning. Stack based buffer
|
||||
overflows (that need to overwrite this return address) now also
|
||||
overwrite the canary, which gets detected and the attack is then
|
||||
neutralized via a kernel panic.
|
||||
|
||||
config CC_STACKPROTECTOR_NONE
|
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bool "None"
|
||||
help
|
||||
Disable "stack-protector" GCC feature.
|
||||
|
||||
config CC_STACKPROTECTOR_REGULAR
|
||||
bool "Regular"
|
||||
select CC_STACKPROTECTOR
|
||||
help
|
||||
Functions will have the stack-protector canary logic added if they
|
||||
have an 8-byte or larger character array on the stack.
|
||||
|
||||
This feature requires gcc version 4.2 or above, or a distribution
|
||||
gcc with the feature backported ("-fstack-protector").
|
||||
|
||||
On an x86 "defconfig" build, this feature adds canary checks to
|
||||
about 3% of all kernel functions, which increases kernel code size
|
||||
by about 0.3%.
|
||||
|
||||
config CC_STACKPROTECTOR_STRONG
|
||||
bool "Strong"
|
||||
select CC_STACKPROTECTOR
|
||||
help
|
||||
Functions will have the stack-protector canary logic added in any
|
||||
of the following conditions:
|
||||
|
||||
- local variable's address used as part of the right hand side of an
|
||||
assignment or function argument
|
||||
- local variable is an array (or union containing an array),
|
||||
regardless of array type or length
|
||||
- uses register local variables
|
||||
|
||||
This feature requires gcc version 4.9 or above, or a distribution
|
||||
gcc with the feature backported ("-fstack-protector-strong").
|
||||
|
||||
On an x86 "defconfig" build, this feature adds canary checks to
|
||||
about 20% of all kernel functions, which increases the kernel code
|
||||
size by about 2%.
|
||||
|
||||
endchoice
|
||||
|
||||
config HAVE_ARCH_WITHIN_STACK_FRAMES
|
||||
bool
|
||||
help
|
||||
An architecture should select this if it can walk the kernel stack
|
||||
frames to determine if an object is part of either the arguments
|
||||
or local variables (i.e. that it excludes saved return addresses,
|
||||
and similar) by implementing an inline arch_within_stack_frames(),
|
||||
which is used by CONFIG_HARDENED_USERCOPY.
|
||||
|
||||
config HAVE_CONTEXT_TRACKING
|
||||
bool
|
||||
help
|
||||
Provide kernel/user boundaries probes necessary for subsystems
|
||||
that need it, such as userspace RCU extended quiescent state.
|
||||
Syscalls need to be wrapped inside user_exit()-user_enter() through
|
||||
the slow path using TIF_NOHZ flag. Exceptions handlers must be
|
||||
wrapped as well. Irqs are already protected inside
|
||||
rcu_irq_enter/rcu_irq_exit() but preemption or signal handling on
|
||||
irq exit still need to be protected.
|
||||
|
||||
config HAVE_VIRT_CPU_ACCOUNTING
|
||||
bool
|
||||
|
||||
config HAVE_VIRT_CPU_ACCOUNTING_GEN
|
||||
bool
|
||||
default y if 64BIT
|
||||
help
|
||||
With VIRT_CPU_ACCOUNTING_GEN, cputime_t becomes 64-bit.
|
||||
Before enabling this option, arch code must be audited
|
||||
to ensure there are no races in concurrent read/write of
|
||||
cputime_t. For example, reading/writing 64-bit cputime_t on
|
||||
some 32-bit arches may require multiple accesses, so proper
|
||||
locking is needed to protect against concurrent accesses.
|
||||
|
||||
|
||||
config HAVE_IRQ_TIME_ACCOUNTING
|
||||
bool
|
||||
help
|
||||
Archs need to ensure they use a high enough resolution clock to
|
||||
support irq time accounting and then call enable_sched_clock_irqtime().
|
||||
|
||||
config HAVE_ARCH_TRANSPARENT_HUGEPAGE
|
||||
bool
|
||||
|
||||
config HAVE_ARCH_HUGE_VMAP
|
||||
bool
|
||||
|
||||
config HAVE_ARCH_SOFT_DIRTY
|
||||
bool
|
||||
|
||||
config HAVE_MOD_ARCH_SPECIFIC
|
||||
bool
|
||||
help
|
||||
The arch uses struct mod_arch_specific to store data. Many arches
|
||||
just need a simple module loader without arch specific data - those
|
||||
should not enable this.
|
||||
|
||||
config MODULES_USE_ELF_RELA
|
||||
bool
|
||||
help
|
||||
Modules only use ELF RELA relocations. Modules with ELF REL
|
||||
relocations will give an error.
|
||||
|
||||
config MODULES_USE_ELF_REL
|
||||
bool
|
||||
help
|
||||
Modules only use ELF REL relocations. Modules with ELF RELA
|
||||
relocations will give an error.
|
||||
|
||||
config HAVE_UNDERSCORE_SYMBOL_PREFIX
|
||||
bool
|
||||
help
|
||||
Some architectures generate an _ in front of C symbols; things like
|
||||
module loading and assembly files need to know about this.
|
||||
|
||||
config HAVE_IRQ_EXIT_ON_IRQ_STACK
|
||||
bool
|
||||
help
|
||||
Architecture doesn't only execute the irq handler on the irq stack
|
||||
but also irq_exit(). This way we can process softirqs on this irq
|
||||
stack instead of switching to a new one when we call __do_softirq()
|
||||
in the end of an hardirq.
|
||||
This spares a stack switch and improves cache usage on softirq
|
||||
processing.
|
||||
|
||||
config PGTABLE_LEVELS
|
||||
int
|
||||
default 2
|
||||
|
||||
config ARCH_HAS_ELF_RANDOMIZE
|
||||
bool
|
||||
help
|
||||
An architecture supports choosing randomized locations for
|
||||
stack, mmap, brk, and ET_DYN. Defined functions:
|
||||
- arch_mmap_rnd()
|
||||
- arch_randomize_brk()
|
||||
|
||||
config HAVE_COPY_THREAD_TLS
|
||||
bool
|
||||
help
|
||||
Architecture provides copy_thread_tls to accept tls argument via
|
||||
normal C parameter passing, rather than extracting the syscall
|
||||
argument from pt_regs.
|
||||
|
||||
config HAVE_ARCH_MMAP_RND_BITS
|
||||
bool
|
||||
help
|
||||
An arch should select this symbol if it supports setting a variable
|
||||
number of bits for use in establishing the base address for mmap
|
||||
allocations, has MMU enabled and provides values for both:
|
||||
- ARCH_MMAP_RND_BITS_MIN
|
||||
- ARCH_MMAP_RND_BITS_MAX
|
||||
|
||||
config HAVE_EXIT_THREAD
|
||||
bool
|
||||
help
|
||||
An architecture implements exit_thread.
|
||||
|
||||
config ARCH_MMAP_RND_BITS_MIN
|
||||
int
|
||||
|
||||
config ARCH_MMAP_RND_BITS_MAX
|
||||
int
|
||||
|
||||
config ARCH_MMAP_RND_BITS_DEFAULT
|
||||
int
|
||||
|
||||
config ARCH_MMAP_RND_BITS
|
||||
int "Number of bits to use for ASLR of mmap base address" if EXPERT
|
||||
range ARCH_MMAP_RND_BITS_MIN ARCH_MMAP_RND_BITS_MAX
|
||||
default ARCH_MMAP_RND_BITS_DEFAULT if ARCH_MMAP_RND_BITS_DEFAULT
|
||||
default ARCH_MMAP_RND_BITS_MIN
|
||||
depends on HAVE_ARCH_MMAP_RND_BITS
|
||||
help
|
||||
This value can be used to select the number of bits to use to
|
||||
determine the random offset to the base address of vma regions
|
||||
resulting from mmap allocations. This value will be bounded
|
||||
by the architecture's minimum and maximum supported values.
|
||||
|
||||
This value can be changed after boot using the
|
||||
/proc/sys/vm/mmap_rnd_bits tunable
|
||||
|
||||
config HAVE_ARCH_MMAP_RND_COMPAT_BITS
|
||||
bool
|
||||
help
|
||||
An arch should select this symbol if it supports running applications
|
||||
in compatibility mode, supports setting a variable number of bits for
|
||||
use in establishing the base address for mmap allocations, has MMU
|
||||
enabled and provides values for both:
|
||||
- ARCH_MMAP_RND_COMPAT_BITS_MIN
|
||||
- ARCH_MMAP_RND_COMPAT_BITS_MAX
|
||||
|
||||
config ARCH_MMAP_RND_COMPAT_BITS_MIN
|
||||
int
|
||||
|
||||
config ARCH_MMAP_RND_COMPAT_BITS_MAX
|
||||
int
|
||||
|
||||
config ARCH_MMAP_RND_COMPAT_BITS_DEFAULT
|
||||
int
|
||||
|
||||
config ARCH_MMAP_RND_COMPAT_BITS
|
||||
int "Number of bits to use for ASLR of mmap base address for compatible applications" if EXPERT
|
||||
range ARCH_MMAP_RND_COMPAT_BITS_MIN ARCH_MMAP_RND_COMPAT_BITS_MAX
|
||||
default ARCH_MMAP_RND_COMPAT_BITS_DEFAULT if ARCH_MMAP_RND_COMPAT_BITS_DEFAULT
|
||||
default ARCH_MMAP_RND_COMPAT_BITS_MIN
|
||||
depends on HAVE_ARCH_MMAP_RND_COMPAT_BITS
|
||||
help
|
||||
This value can be used to select the number of bits to use to
|
||||
determine the random offset to the base address of vma regions
|
||||
resulting from mmap allocations for compatible applications This
|
||||
value will be bounded by the architecture's minimum and maximum
|
||||
supported values.
|
||||
|
||||
This value can be changed after boot using the
|
||||
/proc/sys/vm/mmap_rnd_compat_bits tunable
|
||||
|
||||
#
|
||||
# ABI hall of shame
|
||||
#
|
||||
config CLONE_BACKWARDS
|
||||
bool
|
||||
help
|
||||
Architecture has tls passed as the 4th argument of clone(2),
|
||||
not the 5th one.
|
||||
|
||||
config CLONE_BACKWARDS2
|
||||
bool
|
||||
help
|
||||
Architecture has the first two arguments of clone(2) swapped.
|
||||
|
||||
config CLONE_BACKWARDS3
|
||||
bool
|
||||
help
|
||||
Architecture has tls passed as the 3rd argument of clone(2),
|
||||
not the 5th one.
|
||||
|
||||
config ODD_RT_SIGACTION
|
||||
bool
|
||||
help
|
||||
Architecture has unusual rt_sigaction(2) arguments
|
||||
|
||||
config OLD_SIGSUSPEND
|
||||
bool
|
||||
help
|
||||
Architecture has old sigsuspend(2) syscall, of one-argument variety
|
||||
|
||||
config OLD_SIGSUSPEND3
|
||||
bool
|
||||
help
|
||||
Even weirder antique ABI - three-argument sigsuspend(2)
|
||||
|
||||
config OLD_SIGACTION
|
||||
bool
|
||||
help
|
||||
Architecture has old sigaction(2) syscall. Nope, not the same
|
||||
as OLD_SIGSUSPEND | OLD_SIGSUSPEND3 - alpha has sigsuspend(2),
|
||||
but fairly different variant of sigaction(2), thanks to OSF/1
|
||||
compatibility...
|
||||
|
||||
config COMPAT_OLD_SIGACTION
|
||||
bool
|
||||
|
||||
source "kernel/gcov/Kconfig"
|
|
@ -0,0 +1,287 @@
|
|||
config AVR32
|
||||
def_bool y
|
||||
# With EXPERT=n, we get lots of stuff automatically selected
|
||||
# that we usually don't need on AVR32.
|
||||
select EXPERT
|
||||
select HAVE_CLK
|
||||
select HAVE_EXIT_THREAD
|
||||
select HAVE_OPROFILE
|
||||
select HAVE_KPROBES
|
||||
select VIRT_TO_BUS
|
||||
select GENERIC_IRQ_PROBE
|
||||
select GENERIC_ATOMIC64
|
||||
select HARDIRQS_SW_RESEND
|
||||
select GENERIC_IRQ_SHOW
|
||||
select ARCH_HAVE_CUSTOM_GPIO_H
|
||||
select ARCH_WANT_IPC_PARSE_VERSION
|
||||
select ARCH_HAVE_NMI_SAFE_CMPXCHG
|
||||
select GENERIC_CLOCKEVENTS
|
||||
select HAVE_MOD_ARCH_SPECIFIC
|
||||
select MODULES_USE_ELF_RELA
|
||||
help
|
||||
AVR32 is a high-performance 32-bit RISC microprocessor core,
|
||||
designed for cost-sensitive embedded applications, with particular
|
||||
emphasis on low power consumption and high code density.
|
||||
|
||||
There is an AVR32 Linux project with a web page at
|
||||
http://avr32linux.org/.
|
||||
|
||||
config STACKTRACE_SUPPORT
|
||||
def_bool y
|
||||
|
||||
config LOCKDEP_SUPPORT
|
||||
def_bool y
|
||||
|
||||
config TRACE_IRQFLAGS_SUPPORT
|
||||
def_bool y
|
||||
|
||||
config RWSEM_GENERIC_SPINLOCK
|
||||
def_bool y
|
||||
|
||||
config RWSEM_XCHGADD_ALGORITHM
|
||||
def_bool n
|
||||
|
||||
config ARCH_HAS_ILOG2_U32
|
||||
def_bool n
|
||||
|
||||
config ARCH_HAS_ILOG2_U64
|
||||
def_bool n
|
||||
|
||||
config GENERIC_HWEIGHT
|
||||
def_bool y
|
||||
|
||||
config GENERIC_CALIBRATE_DELAY
|
||||
def_bool y
|
||||
|
||||
config GENERIC_BUG
|
||||
def_bool y
|
||||
depends on BUG
|
||||
|
||||
source "init/Kconfig"
|
||||
|
||||
source "kernel/Kconfig.freezer"
|
||||
|
||||
menu "System Type and features"
|
||||
|
||||
config SUBARCH_AVR32B
|
||||
bool
|
||||
config MMU
|
||||
bool
|
||||
config PERFORMANCE_COUNTERS
|
||||
bool
|
||||
|
||||
config PLATFORM_AT32AP
|
||||
bool
|
||||
select SUBARCH_AVR32B
|
||||
select MMU
|
||||
select PERFORMANCE_COUNTERS
|
||||
select ARCH_REQUIRE_GPIOLIB
|
||||
select GENERIC_ALLOCATOR
|
||||
select HAVE_FB_ATMEL
|
||||
|
||||
#
|
||||
# CPU types
|
||||
#
|
||||
|
||||
# AP7000 derivatives
|
||||
config CPU_AT32AP700X
|
||||
bool
|
||||
select PLATFORM_AT32AP
|
||||
config CPU_AT32AP7000
|
||||
bool
|
||||
select CPU_AT32AP700X
|
||||
config CPU_AT32AP7001
|
||||
bool
|
||||
select CPU_AT32AP700X
|
||||
config CPU_AT32AP7002
|
||||
bool
|
||||
select CPU_AT32AP700X
|
||||
|
||||
# AP700X boards
|
||||
config BOARD_ATNGW100_COMMON
|
||||
bool
|
||||
select CPU_AT32AP7000
|
||||
|
||||
choice
|
||||
prompt "AVR32 board type"
|
||||
default BOARD_ATSTK1000
|
||||
|
||||
config BOARD_ATSTK1000
|
||||
bool "ATSTK1000 evaluation board"
|
||||
|
||||
config BOARD_ATNGW100_MKI
|
||||
bool "ATNGW100 Network Gateway"
|
||||
select BOARD_ATNGW100_COMMON
|
||||
|
||||
config BOARD_ATNGW100_MKII
|
||||
bool "ATNGW100 mkII Network Gateway"
|
||||
select BOARD_ATNGW100_COMMON
|
||||
|
||||
config BOARD_HAMMERHEAD
|
||||
bool "Hammerhead board"
|
||||
select CPU_AT32AP7000
|
||||
select USB_ARCH_HAS_HCD
|
||||
help
|
||||
The Hammerhead platform is built around an AVR32 32-bit microcontroller from Atmel.
|
||||
It offers versatile peripherals, such as ethernet, usb device, usb host etc.
|
||||
|
||||
The board also incorporates a power supply and is a Power over Ethernet (PoE) Powered
|
||||
Device (PD).
|
||||
|
||||
Additionally, a Cyclone III FPGA from Altera is integrated on the board. The FPGA is
|
||||
mapped into the 32-bit AVR memory bus. The FPGA offers two DDR2 SDRAM interfaces, which
|
||||
will cover even the most exceptional need of memory bandwidth. Together with the onboard
|
||||
video decoder the board is ready for video processing.
|
||||
|
||||
For more information see: http://www.miromico.ch/index.php/hammerhead.html
|
||||
|
||||
config BOARD_FAVR_32
|
||||
bool "Favr-32 LCD-board"
|
||||
select CPU_AT32AP7000
|
||||
|
||||
config BOARD_MERISC
|
||||
bool "Merisc board"
|
||||
select CPU_AT32AP7000
|
||||
help
|
||||
Merisc is the family name for a range of AVR32-based boards.
|
||||
|
||||
The boards are designed to be used in a man-machine
|
||||
interfacing environment, utilizing a touch-based graphical
|
||||
user interface. They host a vast range of I/O peripherals as
|
||||
well as a large SDRAM & Flash memory bank.
|
||||
|
||||
For more information see: http://www.martinsson.se/merisc
|
||||
|
||||
config BOARD_MIMC200
|
||||
bool "MIMC200 CPU board"
|
||||
select CPU_AT32AP7000
|
||||
endchoice
|
||||
|
||||
source "arch/avr32/boards/atstk1000/Kconfig"
|
||||
source "arch/avr32/boards/atngw100/Kconfig"
|
||||
source "arch/avr32/boards/hammerhead/Kconfig"
|
||||
source "arch/avr32/boards/favr-32/Kconfig"
|
||||
source "arch/avr32/boards/merisc/Kconfig"
|
||||
|
||||
choice
|
||||
prompt "Boot loader type"
|
||||
default LOADER_U_BOOT
|
||||
|
||||
config LOADER_U_BOOT
|
||||
bool "U-Boot (or similar) bootloader"
|
||||
endchoice
|
||||
|
||||
source "arch/avr32/mach-at32ap/Kconfig"
|
||||
|
||||
config LOAD_ADDRESS
|
||||
hex
|
||||
default 0x10000000 if LOADER_U_BOOT=y && CPU_AT32AP700X=y
|
||||
|
||||
config ENTRY_ADDRESS
|
||||
hex
|
||||
default 0x90000000 if LOADER_U_BOOT=y && CPU_AT32AP700X=y
|
||||
|
||||
config PHYS_OFFSET
|
||||
hex
|
||||
default 0x10000000 if CPU_AT32AP700X=y
|
||||
|
||||
source "kernel/Kconfig.preempt"
|
||||
|
||||
config QUICKLIST
|
||||
def_bool y
|
||||
|
||||
config ARCH_HAVE_MEMORY_PRESENT
|
||||
def_bool n
|
||||
|
||||
config NEED_NODE_MEMMAP_SIZE
|
||||
def_bool n
|
||||
|
||||
config ARCH_FLATMEM_ENABLE
|
||||
def_bool y
|
||||
|
||||
config ARCH_DISCONTIGMEM_ENABLE
|
||||
def_bool n
|
||||
|
||||
config ARCH_SPARSEMEM_ENABLE
|
||||
def_bool n
|
||||
|
||||
config NODES_SHIFT
|
||||
int
|
||||
default "2"
|
||||
depends on NEED_MULTIPLE_NODES
|
||||
|
||||
source "mm/Kconfig"
|
||||
|
||||
config OWNERSHIP_TRACE
|
||||
bool "Ownership trace support"
|
||||
default y
|
||||
help
|
||||
Say Y to generate an Ownership Trace message on every context switch,
|
||||
enabling Nexus-compliant debuggers to keep track of the PID of the
|
||||
currently executing task.
|
||||
|
||||
config NMI_DEBUGGING
|
||||
bool "NMI Debugging"
|
||||
default n
|
||||
help
|
||||
Say Y here and pass the nmi_debug command-line parameter to
|
||||
the kernel to turn on NMI debugging. Depending on the value
|
||||
of the nmi_debug option, various pieces of information will
|
||||
be dumped to the console when a Non-Maskable Interrupt
|
||||
happens.
|
||||
|
||||
# FPU emulation goes here
|
||||
|
||||
source "kernel/Kconfig.hz"
|
||||
|
||||
config CMDLINE
|
||||
string "Default kernel command line"
|
||||
default ""
|
||||
help
|
||||
If you don't have a boot loader capable of passing a command line string
|
||||
to the kernel, you may specify one here. As a minimum, you should specify
|
||||
the memory size and the root device (e.g., mem=8M, root=/dev/nfs).
|
||||
|
||||
endmenu
|
||||
|
||||
menu "Power management options"
|
||||
|
||||
source "kernel/power/Kconfig"
|
||||
|
||||
config ARCH_SUSPEND_POSSIBLE
|
||||
def_bool y
|
||||
|
||||
menu "CPU Frequency scaling"
|
||||
source "drivers/cpufreq/Kconfig"
|
||||
endmenu
|
||||
|
||||
endmenu
|
||||
|
||||
menu "Bus options"
|
||||
|
||||
config PCI
|
||||
bool
|
||||
|
||||
source "drivers/pci/Kconfig"
|
||||
|
||||
source "drivers/pcmcia/Kconfig"
|
||||
|
||||
endmenu
|
||||
|
||||
menu "Executable file formats"
|
||||
source "fs/Kconfig.binfmt"
|
||||
endmenu
|
||||
|
||||
source "net/Kconfig"
|
||||
|
||||
source "drivers/Kconfig"
|
||||
|
||||
source "fs/Kconfig"
|
||||
|
||||
source "arch/avr32/Kconfig.debug"
|
||||
|
||||
source "security/Kconfig"
|
||||
|
||||
source "crypto/Kconfig"
|
||||
|
||||
source "lib/Kconfig"
|
|
@ -0,0 +1,9 @@
|
|||
menu "Kernel hacking"
|
||||
|
||||
config TRACE_IRQFLAGS_SUPPORT
|
||||
bool
|
||||
default y
|
||||
|
||||
source "lib/Kconfig.debug"
|
||||
|
||||
endmenu
|
|
@ -0,0 +1,84 @@
|
|||
#
|
||||
# This file is subject to the terms and conditions of the GNU General Public
|
||||
# License. See the file "COPYING" in the main directory of this archive
|
||||
# for more details.
|
||||
#
|
||||
# Copyright (C) 2004-2006 Atmel Corporation.
|
||||
|
||||
# Default target when executing plain make
|
||||
.PHONY: all
|
||||
all: uImage vmlinux.elf
|
||||
|
||||
KBUILD_DEFCONFIG := atstk1002_defconfig
|
||||
|
||||
KBUILD_CFLAGS += -pipe -fno-builtin -mno-pic -D__linux__
|
||||
KBUILD_AFLAGS += -mrelax -mno-pic
|
||||
KBUILD_CFLAGS_MODULE += -mno-relax
|
||||
LDFLAGS_vmlinux += --relax
|
||||
|
||||
cpuflags-$(CONFIG_PLATFORM_AT32AP) += -march=ap
|
||||
|
||||
KBUILD_CFLAGS += $(cpuflags-y)
|
||||
KBUILD_AFLAGS += $(cpuflags-y)
|
||||
|
||||
CHECKFLAGS += -D__avr32__ -D__BIG_ENDIAN
|
||||
|
||||
machine-$(CONFIG_PLATFORM_AT32AP) := at32ap
|
||||
machdirs := $(patsubst %,arch/avr32/mach-%/, $(machine-y))
|
||||
|
||||
KBUILD_CPPFLAGS += $(patsubst %,-I$(srctree)/%include,$(machdirs))
|
||||
|
||||
head-$(CONFIG_LOADER_U_BOOT) += arch/avr32/boot/u-boot/head.o
|
||||
head-y += arch/avr32/kernel/head.o
|
||||
core-y += $(machdirs)
|
||||
core-$(CONFIG_BOARD_ATSTK1000) += arch/avr32/boards/atstk1000/
|
||||
core-$(CONFIG_BOARD_ATNGW100_COMMON) += arch/avr32/boards/atngw100/
|
||||
core-$(CONFIG_BOARD_HAMMERHEAD) += arch/avr32/boards/hammerhead/
|
||||
core-$(CONFIG_BOARD_FAVR_32) += arch/avr32/boards/favr-32/
|
||||
core-$(CONFIG_BOARD_MERISC) += arch/avr32/boards/merisc/
|
||||
core-$(CONFIG_BOARD_MIMC200) += arch/avr32/boards/mimc200/
|
||||
core-$(CONFIG_LOADER_U_BOOT) += arch/avr32/boot/u-boot/
|
||||
core-y += arch/avr32/kernel/
|
||||
core-y += arch/avr32/mm/
|
||||
drivers-$(CONFIG_OPROFILE) += arch/avr32/oprofile/
|
||||
libs-y += arch/avr32/lib/
|
||||
|
||||
BOOT_TARGETS := vmlinux.elf vmlinux.bin uImage uImage.srec
|
||||
|
||||
.PHONY: $(BOOT_TARGETS) install
|
||||
|
||||
boot := arch/$(ARCH)/boot/images
|
||||
|
||||
KBUILD_IMAGE := $(boot)/uImage
|
||||
vmlinux.elf: KBUILD_IMAGE := $(boot)/vmlinux.elf
|
||||
vmlinux.cso: KBUILD_IMAGE := $(boot)/vmlinux.cso
|
||||
uImage.srec: KBUILD_IMAGE := $(boot)/uImage.srec
|
||||
uImage: KBUILD_IMAGE := $(boot)/uImage
|
||||
|
||||
quiet_cmd_listing = LST $@
|
||||
cmd_listing = avr32-linux-objdump $(OBJDUMPFLAGS) -lS $< > $@
|
||||
quiet_cmd_disasm = DIS $@
|
||||
cmd_disasm = avr32-linux-objdump $(OBJDUMPFLAGS) -d $< > $@
|
||||
|
||||
vmlinux.elf vmlinux.bin uImage.srec uImage vmlinux.cso: vmlinux
|
||||
$(Q)$(MAKE) $(build)=$(boot) $(boot)/$@
|
||||
|
||||
install: vmlinux
|
||||
$(Q)$(MAKE) $(build)=$(boot) BOOTIMAGE=$(KBUILD_IMAGE) $@
|
||||
|
||||
vmlinux.s: vmlinux
|
||||
$(call if_changed,disasm)
|
||||
|
||||
vmlinux.lst: vmlinux
|
||||
$(call if_changed,listing)
|
||||
|
||||
CLEAN_FILES += vmlinux.s vmlinux.lst
|
||||
|
||||
archclean:
|
||||
$(Q)$(MAKE) $(clean)=$(boot)
|
||||
|
||||
define archhelp
|
||||
@echo '* vmlinux.elf - ELF image with load address 0'
|
||||
@echo ' vmlinux.cso - PathFinder CSO image'
|
||||
@echo '* uImage - Create a bootable image for U-Boot'
|
||||
endef
|
|
@ -0,0 +1,65 @@
|
|||
# NGW100 customization
|
||||
|
||||
if BOARD_ATNGW100_COMMON
|
||||
|
||||
config BOARD_ATNGW100_MKII_LCD
|
||||
bool "Enable ATNGW100 mkII LCD interface"
|
||||
depends on BOARD_ATNGW100_MKII
|
||||
help
|
||||
This enables the LCD controller (LCDC) in the AT32AP7000. Since the
|
||||
LCDC is multiplexed with MACB1 (LAN) Ethernet port, only one can be
|
||||
enabled at a time.
|
||||
|
||||
This choice enables the LCDC and disables the MACB1 interface marked
|
||||
LAN on the PCB.
|
||||
|
||||
choice
|
||||
prompt "Select an NGW100 add-on board to support"
|
||||
default BOARD_ATNGW100_ADDON_NONE
|
||||
|
||||
config BOARD_ATNGW100_ADDON_NONE
|
||||
bool "None"
|
||||
|
||||
config BOARD_ATNGW100_EVKLCD10X
|
||||
bool "EVKLCD10X addon board"
|
||||
depends on BOARD_ATNGW100_MKI || BOARD_ATNGW100_MKII_LCD
|
||||
help
|
||||
This enables support for the EVKLCD100 (QVGA) or EVKLCD101 (VGA)
|
||||
addon board for the NGW100 and NGW100 mkII. By enabling this the LCD
|
||||
controller and AC97 controller is added as platform devices.
|
||||
|
||||
config BOARD_ATNGW100_MRMT
|
||||
bool "Mediama RMT1/2 add-on board"
|
||||
help
|
||||
This enables support for the Mediama RMT1 or RMT2 board.
|
||||
RMT provides LCD support, AC97 codec and other
|
||||
optional peripherals to the Atmel NGW100.
|
||||
|
||||
This choice disables the detect pin and the write-protect pin for the
|
||||
MCI platform device, since it conflicts with the LCD platform device.
|
||||
The MCI pins can be reenabled by editing the "add device function" but
|
||||
this may break the setup for other displays that use these pins.
|
||||
|
||||
endchoice
|
||||
|
||||
choice
|
||||
prompt "LCD panel resolution on EVKLCD10X"
|
||||
depends on BOARD_ATNGW100_EVKLCD10X
|
||||
default BOARD_ATNGW100_EVKLCD10X_VGA
|
||||
|
||||
config BOARD_ATNGW100_EVKLCD10X_QVGA
|
||||
bool "QVGA (320x240)"
|
||||
|
||||
config BOARD_ATNGW100_EVKLCD10X_VGA
|
||||
bool "VGA (640x480)"
|
||||
|
||||
config BOARD_ATNGW100_EVKLCD10X_POW_QVGA
|
||||
bool "Powertip QVGA (320x240)"
|
||||
|
||||
endchoice
|
||||
|
||||
if BOARD_ATNGW100_MRMT
|
||||
source "arch/avr32/boards/atngw100/Kconfig_mrmt"
|
||||
endif
|
||||
|
||||
endif # BOARD_ATNGW100_COMMON
|
|
@ -0,0 +1,80 @@
|
|||
# RMT for NGW100 customization
|
||||
|
||||
choice
|
||||
prompt "RMT Version"
|
||||
help
|
||||
Select the RMTx board version.
|
||||
|
||||
config BOARD_MRMT_REV1
|
||||
bool "RMT1"
|
||||
config BOARD_MRMT_REV2
|
||||
bool "RMT2"
|
||||
|
||||
endchoice
|
||||
|
||||
config BOARD_MRMT_AC97
|
||||
bool "Enable AC97 CODEC"
|
||||
help
|
||||
Enable the UCB1400 AC97 CODEC driver.
|
||||
|
||||
choice
|
||||
prompt "Touchscreen Driver"
|
||||
default BOARD_MRMT_ADS7846_TS
|
||||
|
||||
config BOARD_MRMT_UCB1400_TS
|
||||
bool "Use UCB1400 Touchscreen"
|
||||
|
||||
config BOARD_MRMT_ADS7846_TS
|
||||
bool "Use ADS7846 Touchscreen"
|
||||
|
||||
endchoice
|
||||
|
||||
choice
|
||||
prompt "RMTx LCD Selection"
|
||||
default BOARD_MRMT_LCD_DISABLE
|
||||
|
||||
config BOARD_MRMT_LCD_DISABLE
|
||||
bool "LCD Disabled"
|
||||
|
||||
config BOARD_MRMT_LCD_LQ043T3DX0X
|
||||
bool "Sharp LQ043T3DX0x or compatible"
|
||||
help
|
||||
If using RMT2, be sure to load the resistor pack selectors accordingly
|
||||
|
||||
if BOARD_MRMT_REV2
|
||||
config BOARD_MRMT_LCD_KWH043GM08
|
||||
bool "Formike KWH043GM08 or compatible"
|
||||
help
|
||||
Be sure to load the RMT2 resistor pack selectors accordingly
|
||||
endif
|
||||
|
||||
endchoice
|
||||
|
||||
if !BOARD_MRMT_LCD_DISABLE
|
||||
config BOARD_MRMT_BL_PWM
|
||||
bool "Use PWM control for LCD Backlight"
|
||||
help
|
||||
Use PWM driver for controlling LCD Backlight.
|
||||
Otherwise, LCD Backlight is always on.
|
||||
endif
|
||||
|
||||
config BOARD_MRMT_RTC_I2C
|
||||
bool "Use External RTC on I2C Bus"
|
||||
help
|
||||
RMT1 has an optional RTC device on the I2C bus.
|
||||
It is a SII S35390A. Be sure to select the
|
||||
matching RTC driver.
|
||||
|
||||
choice
|
||||
prompt "Wireless Module on ttyS2"
|
||||
default BOARD_MRMT_WIRELESS_ZB
|
||||
|
||||
config BOARD_MRMT_WIRELESS_ZB
|
||||
bool "Use ZigBee/802.15.4 Module"
|
||||
|
||||
config BOARD_MRMT_WIRELESS_BT
|
||||
bool "Use Bluetooth (HCI) Module"
|
||||
|
||||
config BOARD_MRMT_WIRELESS_NONE
|
||||
bool "Not Installed"
|
||||
endchoice
|
|
@ -0,0 +1,3 @@
|
|||
obj-y += setup.o flash.o
|
||||
obj-$(CONFIG_BOARD_ATNGW100_EVKLCD10X) += evklcd10x.o
|
||||
obj-$(CONFIG_BOARD_ATNGW100_MRMT) += mrmt.o
|
|
@ -0,0 +1,178 @@
|
|||
/*
|
||||
* Board-specific setup code for the ATEVKLCD10X addon board to the ATNGW100
|
||||
* Network Gateway
|
||||
*
|
||||
* Copyright (C) 2008 Atmel Corporation
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License version 2 as published by
|
||||
* the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#include <linux/init.h>
|
||||
#include <linux/linkage.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/fb.h>
|
||||
#include <linux/platform_device.h>
|
||||
|
||||
#include <video/atmel_lcdc.h>
|
||||
|
||||
#include <asm/setup.h>
|
||||
|
||||
#include <mach/at32ap700x.h>
|
||||
#include <mach/portmux.h>
|
||||
#include <mach/board.h>
|
||||
|
||||
#include <sound/atmel-ac97c.h>
|
||||
|
||||
static struct ac97c_platform_data __initdata ac97c0_data = {
|
||||
.reset_pin = GPIO_PIN_PB(19),
|
||||
};
|
||||
|
||||
#ifdef CONFIG_BOARD_ATNGW100_EVKLCD10X_VGA
|
||||
static struct fb_videomode __initdata tcg057vglad_modes[] = {
|
||||
{
|
||||
.name = "640x480 @ 50",
|
||||
.refresh = 50,
|
||||
.xres = 640, .yres = 480,
|
||||
.pixclock = KHZ2PICOS(25180),
|
||||
|
||||
.left_margin = 64, .right_margin = 96,
|
||||
.upper_margin = 34, .lower_margin = 11,
|
||||
.hsync_len = 64, .vsync_len = 15,
|
||||
|
||||
.sync = 0,
|
||||
.vmode = FB_VMODE_NONINTERLACED,
|
||||
},
|
||||
};
|
||||
|
||||
static struct fb_monspecs __initdata atevklcd10x_default_monspecs = {
|
||||
.manufacturer = "KYO",
|
||||
.monitor = "TCG057VGLAD",
|
||||
.modedb = tcg057vglad_modes,
|
||||
.modedb_len = ARRAY_SIZE(tcg057vglad_modes),
|
||||
.hfmin = 19948,
|
||||
.hfmax = 31478,
|
||||
.vfmin = 50,
|
||||
.vfmax = 67,
|
||||
.dclkmax = 28330000,
|
||||
};
|
||||
|
||||
static struct atmel_lcdfb_pdata __initdata atevklcd10x_lcdc_data = {
|
||||
.default_bpp = 16,
|
||||
.default_dmacon = ATMEL_LCDC_DMAEN | ATMEL_LCDC_DMA2DEN,
|
||||
.default_lcdcon2 = (ATMEL_LCDC_DISTYPE_TFT
|
||||
| ATMEL_LCDC_CLKMOD_ALWAYSACTIVE
|
||||
| ATMEL_LCDC_MEMOR_BIG),
|
||||
.default_monspecs = &atevklcd10x_default_monspecs,
|
||||
.guard_time = 2,
|
||||
};
|
||||
#elif CONFIG_BOARD_ATNGW100_EVKLCD10X_QVGA
|
||||
static struct fb_videomode __initdata tcg057qvlad_modes[] = {
|
||||
{
|
||||
.name = "320x240 @ 50",
|
||||
.refresh = 50,
|
||||
.xres = 320, .yres = 240,
|
||||
.pixclock = KHZ2PICOS(6300),
|
||||
|
||||
.left_margin = 34, .right_margin = 46,
|
||||
.upper_margin = 7, .lower_margin = 15,
|
||||
.hsync_len = 64, .vsync_len = 12,
|
||||
|
||||
.sync = 0,
|
||||
.vmode = FB_VMODE_NONINTERLACED,
|
||||
},
|
||||
};
|
||||
|
||||
static struct fb_monspecs __initdata atevklcd10x_default_monspecs = {
|
||||
.manufacturer = "KYO",
|
||||
.monitor = "TCG057QVLAD",
|
||||
.modedb = tcg057qvlad_modes,
|
||||
.modedb_len = ARRAY_SIZE(tcg057qvlad_modes),
|
||||
.hfmin = 19948,
|
||||
.hfmax = 31478,
|
||||
.vfmin = 50,
|
||||
.vfmax = 67,
|
||||
.dclkmax = 7000000,
|
||||
};
|
||||
|
||||
static struct atmel_lcdfb_pdata __initdata atevklcd10x_lcdc_data = {
|
||||
.default_bpp = 16,
|
||||
.default_dmacon = ATMEL_LCDC_DMAEN | ATMEL_LCDC_DMA2DEN,
|
||||
.default_lcdcon2 = (ATMEL_LCDC_DISTYPE_TFT
|
||||
| ATMEL_LCDC_CLKMOD_ALWAYSACTIVE
|
||||
| ATMEL_LCDC_MEMOR_BIG),
|
||||
.default_monspecs = &atevklcd10x_default_monspecs,
|
||||
.guard_time = 2,
|
||||
};
|
||||
#elif CONFIG_BOARD_ATNGW100_EVKLCD10X_POW_QVGA
|
||||
static struct fb_videomode __initdata ph320240t_modes[] = {
|
||||
{
|
||||
.name = "320x240 @ 60",
|
||||
.refresh = 60,
|
||||
.xres = 320, .yres = 240,
|
||||
.pixclock = KHZ2PICOS(6300),
|
||||
|
||||
.left_margin = 38, .right_margin = 20,
|
||||
.upper_margin = 15, .lower_margin = 5,
|
||||
.hsync_len = 30, .vsync_len = 3,
|
||||
|
||||
.sync = 0,
|
||||
.vmode = FB_VMODE_NONINTERLACED,
|
||||
},
|
||||
};
|
||||
|
||||
static struct fb_monspecs __initdata atevklcd10x_default_monspecs = {
|
||||
.manufacturer = "POW",
|
||||
.monitor = "PH320240T",
|
||||
.modedb = ph320240t_modes,
|
||||
.modedb_len = ARRAY_SIZE(ph320240t_modes),
|
||||
.hfmin = 14400,
|
||||
.hfmax = 21600,
|
||||
.vfmin = 50,
|
||||
.vfmax = 90,
|
||||
.dclkmax = 6400000,
|
||||
};
|
||||
|
||||
static struct atmel_lcdfb_pdata __initdata atevklcd10x_lcdc_data = {
|
||||
.default_bpp = 16,
|
||||
.default_dmacon = ATMEL_LCDC_DMAEN | ATMEL_LCDC_DMA2DEN,
|
||||
.default_lcdcon2 = (ATMEL_LCDC_DISTYPE_TFT
|
||||
| ATMEL_LCDC_CLKMOD_ALWAYSACTIVE
|
||||
| ATMEL_LCDC_MEMOR_BIG),
|
||||
.default_monspecs = &atevklcd10x_default_monspecs,
|
||||
.guard_time = 2,
|
||||
};
|
||||
#endif
|
||||
|
||||
static void atevklcd10x_lcdc_power_control(struct atmel_lcdfb_pdata *pdata, int on)
|
||||
{
|
||||
gpio_set_value(GPIO_PIN_PB(15), on);
|
||||
}
|
||||
|
||||
static int __init atevklcd10x_init(void)
|
||||
{
|
||||
/* PB15 is connected to the enable line on the boost regulator
|
||||
* controlling the backlight for the LCD panel.
|
||||
*/
|
||||
at32_select_gpio(GPIO_PIN_PB(15), AT32_GPIOF_OUTPUT);
|
||||
gpio_request(GPIO_PIN_PB(15), "backlight");
|
||||
gpio_direction_output(GPIO_PIN_PB(15), 0);
|
||||
|
||||
atevklcd10x_lcdc_data.atmel_lcdfb_power_control =
|
||||
atevklcd10x_lcdc_power_control;
|
||||
|
||||
at32_add_device_lcdc(0, &atevklcd10x_lcdc_data,
|
||||
fbmem_start, fbmem_size,
|
||||
#ifdef CONFIG_BOARD_ATNGW100_MKII
|
||||
ATMEL_LCDC_PRI_18BIT | ATMEL_LCDC_PC_DVAL
|
||||
#else
|
||||
ATMEL_LCDC_ALT_18BIT | ATMEL_LCDC_PE_DVAL
|
||||
#endif
|
||||
);
|
||||
|
||||
at32_add_device_ac97c(0, &ac97c0_data, AC97C_BOTH);
|
||||
|
||||
return 0;
|
||||
}
|
||||
postcore_initcall(atevklcd10x_init);
|
|
@ -0,0 +1,98 @@
|
|||
/*
|
||||
* ATNGW100 board-specific flash initialization
|
||||
*
|
||||
* Copyright (C) 2005-2006 Atmel Corporation
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
#include <linux/init.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/mtd/mtd.h>
|
||||
#include <linux/mtd/partitions.h>
|
||||
#include <linux/mtd/physmap.h>
|
||||
|
||||
#include <mach/smc.h>
|
||||
|
||||
static struct smc_timing flash_timing __initdata = {
|
||||
.ncs_read_setup = 0,
|
||||
.nrd_setup = 40,
|
||||
.ncs_write_setup = 0,
|
||||
.nwe_setup = 10,
|
||||
|
||||
.ncs_read_pulse = 80,
|
||||
.nrd_pulse = 40,
|
||||
.ncs_write_pulse = 65,
|
||||
.nwe_pulse = 55,
|
||||
|
||||
.read_cycle = 120,
|
||||
.write_cycle = 120,
|
||||
};
|
||||
|
||||
static struct smc_config flash_config __initdata = {
|
||||
.bus_width = 2,
|
||||
.nrd_controlled = 1,
|
||||
.nwe_controlled = 1,
|
||||
.byte_write = 1,
|
||||
};
|
||||
|
||||
static struct mtd_partition flash_parts[] = {
|
||||
{
|
||||
.name = "u-boot",
|
||||
.offset = 0x00000000,
|
||||
.size = 0x00020000, /* 128 KiB */
|
||||
.mask_flags = MTD_WRITEABLE,
|
||||
},
|
||||
{
|
||||
.name = "root",
|
||||
.offset = 0x00020000,
|
||||
.size = 0x007d0000,
|
||||
},
|
||||
{
|
||||
.name = "env",
|
||||
.offset = 0x007f0000,
|
||||
.size = 0x00010000,
|
||||
.mask_flags = MTD_WRITEABLE,
|
||||
},
|
||||
};
|
||||
|
||||
static struct physmap_flash_data flash_data = {
|
||||
.width = 2,
|
||||
.nr_parts = ARRAY_SIZE(flash_parts),
|
||||
.parts = flash_parts,
|
||||
};
|
||||
|
||||
static struct resource flash_resource = {
|
||||
.start = 0x00000000,
|
||||
.end = 0x007fffff,
|
||||
.flags = IORESOURCE_MEM,
|
||||
};
|
||||
|
||||
static struct platform_device flash_device = {
|
||||
.name = "physmap-flash",
|
||||
.id = 0,
|
||||
.resource = &flash_resource,
|
||||
.num_resources = 1,
|
||||
.dev = {
|
||||
.platform_data = &flash_data,
|
||||
},
|
||||
};
|
||||
|
||||
/* This needs to be called after the SMC has been initialized */
|
||||
static int __init atngw100_flash_init(void)
|
||||
{
|
||||
int ret;
|
||||
|
||||
smc_set_timing(&flash_config, &flash_timing);
|
||||
ret = smc_set_configuration(0, &flash_config);
|
||||
if (ret < 0) {
|
||||
printk(KERN_ERR "atngw100: failed to set NOR flash timing\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
platform_device_register(&flash_device);
|
||||
|
||||
return 0;
|
||||
}
|
||||
device_initcall(atngw100_flash_init);
|
|
@ -0,0 +1,382 @@
|
|||
/*
|
||||
* Board-specific setup code for Remote Media Terminal 1 (RMT1)
|
||||
* add-on board for the ATNGW100 Network Gateway
|
||||
*
|
||||
* Copyright (C) 2008 Mediama Technologies
|
||||
* Based on ATNGW100 Network Gateway (Copyright (C) Atmel)
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/irq.h>
|
||||
#include <linux/linkage.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/types.h>
|
||||
#include <linux/fb.h>
|
||||
#include <linux/leds.h>
|
||||
#include <linux/pwm.h>
|
||||
#include <linux/leds_pwm.h>
|
||||
#include <linux/input.h>
|
||||
#include <linux/gpio_keys.h>
|
||||
#include <linux/spi/spi.h>
|
||||
#include <linux/spi/ads7846.h>
|
||||
|
||||
#include <video/atmel_lcdc.h>
|
||||
#include <sound/atmel-ac97c.h>
|
||||
|
||||
#include <asm/delay.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/setup.h>
|
||||
|
||||
#include <mach/at32ap700x.h>
|
||||
#include <mach/board.h>
|
||||
#include <mach/init.h>
|
||||
#include <mach/portmux.h>
|
||||
|
||||
/* Define board-specifoic GPIO assignments */
|
||||
#define PIN_LCD_BL GPIO_PIN_PA(28)
|
||||
#define PWM_CH_BL 0 /* Must match with GPIO pin definition */
|
||||
#define PIN_LCD_DISP GPIO_PIN_PA(31)
|
||||
#define PIN_AC97_RST_N GPIO_PIN_PA(30)
|
||||
#define PB_EXTINT_BASE 25
|
||||
#define TS_IRQ 0
|
||||
#define PIN_TS_EXTINT GPIO_PIN_PB(PB_EXTINT_BASE+TS_IRQ)
|
||||
#define PIN_PB_LEFT GPIO_PIN_PB(11)
|
||||
#define PIN_PB_RIGHT GPIO_PIN_PB(12)
|
||||
#define PIN_PWR_SW_N GPIO_PIN_PB(14)
|
||||
#define PIN_PWR_ON GPIO_PIN_PB(13)
|
||||
#define PIN_ZB_RST_N GPIO_PIN_PA(21)
|
||||
#define PIN_BT_RST GPIO_PIN_PA(22)
|
||||
#define PIN_LED_SYS GPIO_PIN_PA(16)
|
||||
#define PIN_LED_A GPIO_PIN_PA(19)
|
||||
#define PIN_LED_B GPIO_PIN_PE(19)
|
||||
|
||||
#ifdef CONFIG_BOARD_MRMT_LCD_LQ043T3DX0X
|
||||
/* Sharp LQ043T3DX0x (or compatible) panel */
|
||||
static struct fb_videomode __initdata lcd_fb_modes[] = {
|
||||
{
|
||||
.name = "480x272 @ 59.94Hz",
|
||||
.refresh = 59.94,
|
||||
.xres = 480, .yres = 272,
|
||||
.pixclock = KHZ2PICOS(9000),
|
||||
|
||||
.left_margin = 2, .right_margin = 2,
|
||||
.upper_margin = 3, .lower_margin = 9,
|
||||
.hsync_len = 41, .vsync_len = 1,
|
||||
|
||||
.sync = 0,
|
||||
.vmode = FB_VMODE_NONINTERLACED,
|
||||
},
|
||||
};
|
||||
|
||||
static struct fb_monspecs __initdata lcd_fb_default_monspecs = {
|
||||
.manufacturer = "SHA",
|
||||
.monitor = "LQ043T3DX02",
|
||||
.modedb = lcd_fb_modes,
|
||||
.modedb_len = ARRAY_SIZE(lcd_fb_modes),
|
||||
.hfmin = 14915,
|
||||
.hfmax = 17638,
|
||||
.vfmin = 53,
|
||||
.vfmax = 61,
|
||||
.dclkmax = 9260000,
|
||||
};
|
||||
|
||||
static struct atmel_lcdfb_pdata __initdata rmt_lcdc_data = {
|
||||
.default_bpp = 24,
|
||||
.default_dmacon = ATMEL_LCDC_DMAEN | ATMEL_LCDC_DMA2DEN,
|
||||
.default_lcdcon2 = (ATMEL_LCDC_DISTYPE_TFT
|
||||
| ATMEL_LCDC_CLKMOD_ALWAYSACTIVE
|
||||
| ATMEL_LCDC_INVCLK_NORMAL
|
||||
| ATMEL_LCDC_MEMOR_BIG),
|
||||
.lcd_wiring_mode = ATMEL_LCDC_WIRING_RGB,
|
||||
.default_monspecs = &lcd_fb_default_monspecs,
|
||||
.guard_time = 2,
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_BOARD_MRMT_LCD_KWH043GM08
|
||||
/* Sharp KWH043GM08-Fxx (or compatible) panel */
|
||||
static struct fb_videomode __initdata lcd_fb_modes[] = {
|
||||
{
|
||||
.name = "480x272 @ 59.94Hz",
|
||||
.refresh = 59.94,
|
||||
.xres = 480, .yres = 272,
|
||||
.pixclock = KHZ2PICOS(9000),
|
||||
|
||||
.left_margin = 2, .right_margin = 2,
|
||||
.upper_margin = 3, .lower_margin = 9,
|
||||
.hsync_len = 41, .vsync_len = 1,
|
||||
|
||||
.sync = 0,
|
||||
.vmode = FB_VMODE_NONINTERLACED,
|
||||
},
|
||||
};
|
||||
|
||||
static struct fb_monspecs __initdata lcd_fb_default_monspecs = {
|
||||
.manufacturer = "FOR",
|
||||
.monitor = "KWH043GM08",
|
||||
.modedb = lcd_fb_modes,
|
||||
.modedb_len = ARRAY_SIZE(lcd_fb_modes),
|
||||
.hfmin = 14915,
|
||||
.hfmax = 17638,
|
||||
.vfmin = 53,
|
||||
.vfmax = 61,
|
||||
.dclkmax = 9260000,
|
||||
};
|
||||
|
||||
static struct atmel_lcdfb_pdata __initdata rmt_lcdc_data = {
|
||||
.default_bpp = 24,
|
||||
.default_dmacon = ATMEL_LCDC_DMAEN | ATMEL_LCDC_DMA2DEN,
|
||||
.default_lcdcon2 = (ATMEL_LCDC_DISTYPE_TFT
|
||||
| ATMEL_LCDC_CLKMOD_ALWAYSACTIVE
|
||||
| ATMEL_LCDC_INVCLK_INVERTED
|
||||
| ATMEL_LCDC_MEMOR_BIG),
|
||||
.lcd_wiring_mode = ATMEL_LCDC_WIRING_RGB,
|
||||
.default_monspecs = &lcd_fb_default_monspecs,
|
||||
.guard_time = 2,
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_BOARD_MRMT_AC97
|
||||
static struct ac97c_platform_data __initdata ac97c0_data = {
|
||||
.reset_pin = PIN_AC97_RST_N,
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_BOARD_MRMT_UCB1400_TS
|
||||
/* NOTE: IRQ assignment relies on kernel module parameter */
|
||||
static struct platform_device rmt_ts_device = {
|
||||
.name = "ucb1400_ts",
|
||||
.id = -1,
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_BOARD_MRMT_BL_PWM
|
||||
/* PWM LEDs: LCD Backlight, etc */
|
||||
static struct pwm_lookup pwm_lookup[] = {
|
||||
PWM_LOOKUP("at91sam9rl-pwm", PWM_CH_BL, "leds_pwm", "ds1",
|
||||
5000, PWM_POLARITY_INVERSED),
|
||||
};
|
||||
|
||||
static struct led_pwm pwm_leds[] = {
|
||||
{
|
||||
.name = "backlight",
|
||||
.max_brightness = 255,
|
||||
},
|
||||
};
|
||||
|
||||
static struct led_pwm_platform_data pwm_data = {
|
||||
.num_leds = ARRAY_SIZE(pwm_leds),
|
||||
.leds = pwm_leds,
|
||||
};
|
||||
|
||||
static struct platform_device leds_pwm = {
|
||||
.name = "leds_pwm",
|
||||
.id = -1,
|
||||
.dev = {
|
||||
.platform_data = &pwm_data,
|
||||
},
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_BOARD_MRMT_ADS7846_TS
|
||||
static int ads7846_pendown_state(void)
|
||||
{
|
||||
return !gpio_get_value( PIN_TS_EXTINT ); /* PENIRQ.*/
|
||||
}
|
||||
|
||||
static struct ads7846_platform_data ads_info = {
|
||||
.model = 7846,
|
||||
.keep_vref_on = 0, /* Use external VREF pin */
|
||||
.vref_delay_usecs = 0,
|
||||
.vref_mv = 3300, /* VREF = 3.3V */
|
||||
.settle_delay_usecs = 800,
|
||||
.penirq_recheck_delay_usecs = 800,
|
||||
.x_plate_ohms = 750,
|
||||
.y_plate_ohms = 300,
|
||||
.pressure_max = 4096,
|
||||
.debounce_max = 1,
|
||||
.debounce_rep = 0,
|
||||
.debounce_tol = (~0),
|
||||
.get_pendown_state = ads7846_pendown_state,
|
||||
.filter = NULL,
|
||||
.filter_init = NULL,
|
||||
};
|
||||
|
||||
static struct spi_board_info spi01_board_info[] __initdata = {
|
||||
{
|
||||
.modalias = "ads7846",
|
||||
.max_speed_hz = 31250*26,
|
||||
.bus_num = 0,
|
||||
.chip_select = 1,
|
||||
.platform_data = &ads_info,
|
||||
.irq = AT32_EXTINT(TS_IRQ),
|
||||
},
|
||||
};
|
||||
#endif
|
||||
|
||||
/* GPIO Keys: left, right, power, etc */
|
||||
static const struct gpio_keys_button rmt_gpio_keys_buttons[] = {
|
||||
[0] = {
|
||||
.type = EV_KEY,
|
||||
.code = KEY_POWER,
|
||||
.gpio = PIN_PWR_SW_N,
|
||||
.active_low = 1,
|
||||
.desc = "power button",
|
||||
},
|
||||
[1] = {
|
||||
.type = EV_KEY,
|
||||
.code = KEY_LEFT,
|
||||
.gpio = PIN_PB_LEFT,
|
||||
.active_low = 1,
|
||||
.desc = "left button",
|
||||
},
|
||||
[2] = {
|
||||
.type = EV_KEY,
|
||||
.code = KEY_RIGHT,
|
||||
.gpio = PIN_PB_RIGHT,
|
||||
.active_low = 1,
|
||||
.desc = "right button",
|
||||
},
|
||||
};
|
||||
|
||||
static const struct gpio_keys_platform_data rmt_gpio_keys_data = {
|
||||
.nbuttons = ARRAY_SIZE(rmt_gpio_keys_buttons),
|
||||
.buttons = (void *) rmt_gpio_keys_buttons,
|
||||
};
|
||||
|
||||
static struct platform_device rmt_gpio_keys = {
|
||||
.name = "gpio-keys",
|
||||
.id = -1,
|
||||
.dev = {
|
||||
.platform_data = (void *) &rmt_gpio_keys_data,
|
||||
}
|
||||
};
|
||||
|
||||
#ifdef CONFIG_BOARD_MRMT_RTC_I2C
|
||||
static struct i2c_board_info __initdata mrmt1_i2c_rtc = {
|
||||
I2C_BOARD_INFO("s35390a", 0x30),
|
||||
.irq = 0,
|
||||
};
|
||||
#endif
|
||||
|
||||
static void mrmt_power_off(void)
|
||||
{
|
||||
/* PWR_ON=0 will force power off */
|
||||
gpio_set_value( PIN_PWR_ON, 0 );
|
||||
}
|
||||
|
||||
static int __init mrmt1_init(void)
|
||||
{
|
||||
gpio_set_value( PIN_PWR_ON, 1 ); /* Ensure PWR_ON is enabled */
|
||||
|
||||
pm_power_off = mrmt_power_off;
|
||||
|
||||
/* Setup USARTS (other than console) */
|
||||
at32_map_usart(2, 1, 0); /* USART 2: /dev/ttyS1, RMT1:DB9M */
|
||||
at32_map_usart(3, 2, ATMEL_USART_RTS | ATMEL_USART_CTS);
|
||||
/* USART 3: /dev/ttyS2, RMT1:Wireless, w/ RTS/CTS */
|
||||
at32_add_device_usart(1);
|
||||
at32_add_device_usart(2);
|
||||
|
||||
/* Select GPIO Key pins */
|
||||
at32_select_gpio( PIN_PWR_SW_N, AT32_GPIOF_DEGLITCH);
|
||||
at32_select_gpio( PIN_PB_LEFT, AT32_GPIOF_DEGLITCH);
|
||||
at32_select_gpio( PIN_PB_RIGHT, AT32_GPIOF_DEGLITCH);
|
||||
platform_device_register(&rmt_gpio_keys);
|
||||
|
||||
#ifdef CONFIG_BOARD_MRMT_RTC_I2C
|
||||
i2c_register_board_info(0, &mrmt1_i2c_rtc, 1);
|
||||
#endif
|
||||
|
||||
#ifndef CONFIG_BOARD_MRMT_LCD_DISABLE
|
||||
/* User "alternate" LCDC inferface on Port E & D */
|
||||
/* NB: exclude LCDC_CC pin, as NGW100 reserves it for other use */
|
||||
at32_add_device_lcdc(0, &rmt_lcdc_data,
|
||||
fbmem_start, fbmem_size,
|
||||
(ATMEL_LCDC_ALT_24BIT | ATMEL_LCDC_PE_DVAL ) );
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_BOARD_MRMT_AC97
|
||||
at32_add_device_ac97c(0, &ac97c0_data, AC97C_BOTH);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_BOARD_MRMT_ADS7846_TS
|
||||
/* Select the Touchscreen interrupt pin mode */
|
||||
at32_select_periph( GPIO_PIOB_BASE, 1 << (PB_EXTINT_BASE+TS_IRQ),
|
||||
GPIO_PERIPH_A, AT32_GPIOF_DEGLITCH);
|
||||
irq_set_irq_type(AT32_EXTINT(TS_IRQ), IRQ_TYPE_EDGE_FALLING);
|
||||
at32_spi_setup_slaves(0,spi01_board_info,ARRAY_SIZE(spi01_board_info));
|
||||
spi_register_board_info(spi01_board_info,ARRAY_SIZE(spi01_board_info));
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_BOARD_MRMT_UCB1400_TS
|
||||
/* Select the Touchscreen interrupt pin mode */
|
||||
at32_select_periph( GPIO_PIOB_BASE, 1 << (PB_EXTINT_BASE+TS_IRQ),
|
||||
GPIO_PERIPH_A, AT32_GPIOF_DEGLITCH);
|
||||
platform_device_register(&rmt_ts_device);
|
||||
#endif
|
||||
|
||||
at32_select_gpio( PIN_LCD_DISP, AT32_GPIOF_OUTPUT );
|
||||
gpio_request( PIN_LCD_DISP, "LCD_DISP" );
|
||||
gpio_direction_output( PIN_LCD_DISP, 0 ); /* LCD DISP */
|
||||
#ifdef CONFIG_BOARD_MRMT_LCD_DISABLE
|
||||
/* Keep Backlight and DISP off */
|
||||
at32_select_gpio( PIN_LCD_BL, AT32_GPIOF_OUTPUT );
|
||||
gpio_request( PIN_LCD_BL, "LCD_BL" );
|
||||
gpio_direction_output( PIN_LCD_BL, 0 ); /* Backlight */
|
||||
#else
|
||||
gpio_set_value( PIN_LCD_DISP, 1 ); /* DISP asserted first */
|
||||
#ifdef CONFIG_BOARD_MRMT_BL_PWM
|
||||
/* Use PWM for Backlight controls */
|
||||
at32_add_device_pwm(1 << PWM_CH_BL);
|
||||
pwm_add_table(pwm_lookup, ARRAY_SIZE(pwm_lookup));
|
||||
platform_device_register(&leds_pwm);
|
||||
#else
|
||||
/* Backlight always on */
|
||||
udelay( 1 );
|
||||
at32_select_gpio( PIN_LCD_BL, AT32_GPIOF_OUTPUT );
|
||||
gpio_request( PIN_LCD_BL, "LCD_BL" );
|
||||
gpio_direction_output( PIN_LCD_BL, 1 );
|
||||
#endif
|
||||
#endif
|
||||
|
||||
/* Make sure BT and Zigbee modules in reset */
|
||||
at32_select_gpio( PIN_BT_RST, AT32_GPIOF_OUTPUT );
|
||||
gpio_request( PIN_BT_RST, "BT_RST" );
|
||||
gpio_direction_output( PIN_BT_RST, 1 );
|
||||
/* BT Module in Reset */
|
||||
|
||||
at32_select_gpio( PIN_ZB_RST_N, AT32_GPIOF_OUTPUT );
|
||||
gpio_request( PIN_ZB_RST_N, "ZB_RST_N" );
|
||||
gpio_direction_output( PIN_ZB_RST_N, 0 );
|
||||
/* XBee Module in Reset */
|
||||
|
||||
#ifdef CONFIG_BOARD_MRMT_WIRELESS_ZB
|
||||
udelay( 1000 );
|
||||
/* Unreset the XBee Module */
|
||||
gpio_set_value( PIN_ZB_RST_N, 1 );
|
||||
#endif
|
||||
#ifdef CONFIG_BOARD_MRMT_WIRELESS_BT
|
||||
udelay( 1000 );
|
||||
/* Unreset the BT Module */
|
||||
gpio_set_value( PIN_BT_RST, 0 );
|
||||
#endif
|
||||
|
||||
return 0;
|
||||
}
|
||||
arch_initcall(mrmt1_init);
|
||||
|
||||
static int __init mrmt1_early_init(void)
|
||||
{
|
||||
/* To maintain power-on signal in case boot loader did not already */
|
||||
at32_select_gpio( PIN_PWR_ON, AT32_GPIOF_OUTPUT );
|
||||
gpio_request( PIN_PWR_ON, "PIN_PWR_ON" );
|
||||
gpio_direction_output( PIN_PWR_ON, 1 );
|
||||
|
||||
return 0;
|
||||
}
|
||||
core_initcall(mrmt1_early_init);
|
|
@ -0,0 +1,324 @@
|
|||
/*
|
||||
* Board-specific setup code for the ATNGW100 Network Gateway
|
||||
*
|
||||
* Copyright (C) 2005-2006 Atmel Corporation
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
#include <linux/clk.h>
|
||||
#include <linux/etherdevice.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/irq.h>
|
||||
#include <linux/i2c.h>
|
||||
#include <linux/i2c-gpio.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/linkage.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/types.h>
|
||||
#include <linux/leds.h>
|
||||
#include <linux/spi/spi.h>
|
||||
#include <linux/atmel-mci.h>
|
||||
#include <linux/usb/atmel_usba_udc.h>
|
||||
|
||||
#include <asm/io.h>
|
||||
#include <asm/setup.h>
|
||||
|
||||
#include <mach/at32ap700x.h>
|
||||
#include <mach/board.h>
|
||||
#include <mach/init.h>
|
||||
#include <mach/portmux.h>
|
||||
|
||||
/* Oscillator frequencies. These are board-specific */
|
||||
unsigned long at32_board_osc_rates[3] = {
|
||||
[0] = 32768, /* 32.768 kHz on RTC osc */
|
||||
[1] = 20000000, /* 20 MHz on osc0 */
|
||||
[2] = 12000000, /* 12 MHz on osc1 */
|
||||
};
|
||||
|
||||
/*
|
||||
* The ATNGW100 mkII is very similar to the ATNGW100. Both have the AT32AP7000
|
||||
* chip on board; the difference is that the ATNGW100 mkII has 128 MB 32-bit
|
||||
* SDRAM (the ATNGW100 has 32 MB 16-bit SDRAM) and 256 MB 16-bit NAND flash
|
||||
* (the ATNGW100 has none.)
|
||||
*
|
||||
* The RAM difference is handled by the boot loader, so the only difference we
|
||||
* end up handling here is the NAND flash, EBI pin reservation and if LCDC or
|
||||
* MACB1 should be enabled.
|
||||
*/
|
||||
#ifdef CONFIG_BOARD_ATNGW100_MKII
|
||||
#include <linux/mtd/partitions.h>
|
||||
#include <mach/smc.h>
|
||||
|
||||
static struct smc_timing nand_timing __initdata = {
|
||||
.ncs_read_setup = 0,
|
||||
.nrd_setup = 10,
|
||||
.ncs_write_setup = 0,
|
||||
.nwe_setup = 10,
|
||||
|
||||
.ncs_read_pulse = 30,
|
||||
.nrd_pulse = 15,
|
||||
.ncs_write_pulse = 30,
|
||||
.nwe_pulse = 15,
|
||||
|
||||
.read_cycle = 30,
|
||||
.write_cycle = 30,
|
||||
|
||||
.ncs_read_recover = 0,
|
||||
.nrd_recover = 15,
|
||||
.ncs_write_recover = 0,
|
||||
/* WE# high -> RE# low min 60 ns */
|
||||
.nwe_recover = 50,
|
||||
};
|
||||
|
||||
static struct smc_config nand_config __initdata = {
|
||||
.bus_width = 2,
|
||||
.nrd_controlled = 1,
|
||||
.nwe_controlled = 1,
|
||||
.nwait_mode = 0,
|
||||
.byte_write = 0,
|
||||
.tdf_cycles = 2,
|
||||
.tdf_mode = 0,
|
||||
};
|
||||
|
||||
static struct mtd_partition nand_partitions[] = {
|
||||
{
|
||||
.name = "main",
|
||||
.offset = 0x00000000,
|
||||
.size = MTDPART_SIZ_FULL,
|
||||
},
|
||||
};
|
||||
|
||||
|
||||
static struct atmel_nand_data atngw100mkii_nand_data __initdata = {
|
||||
.cle = 21,
|
||||
.ale = 22,
|
||||
.rdy_pin = GPIO_PIN_PB(28),
|
||||
.enable_pin = GPIO_PIN_PE(23),
|
||||
.bus_width_16 = true,
|
||||
.ecc_mode = NAND_ECC_SOFT,
|
||||
.parts = nand_partitions,
|
||||
.num_parts = ARRAY_SIZE(nand_partitions),
|
||||
};
|
||||
#endif
|
||||
|
||||
/* Initialized by bootloader-specific startup code. */
|
||||
struct tag *bootloader_tags __initdata;
|
||||
|
||||
struct eth_addr {
|
||||
u8 addr[6];
|
||||
};
|
||||
static struct eth_addr __initdata hw_addr[2];
|
||||
static struct macb_platform_data __initdata eth_data[2];
|
||||
|
||||
static struct spi_board_info spi0_board_info[] __initdata = {
|
||||
{
|
||||
.modalias = "mtd_dataflash",
|
||||
.max_speed_hz = 8000000,
|
||||
.chip_select = 0,
|
||||
},
|
||||
};
|
||||
|
||||
static struct mci_platform_data __initdata mci0_data = {
|
||||
.slot[0] = {
|
||||
.bus_width = 4,
|
||||
#if defined(CONFIG_BOARD_ATNGW100_MKII)
|
||||
.detect_pin = GPIO_PIN_PC(25),
|
||||
.wp_pin = GPIO_PIN_PE(22),
|
||||
#else
|
||||
.detect_pin = GPIO_PIN_PC(25),
|
||||
.wp_pin = GPIO_PIN_PE(0),
|
||||
#endif
|
||||
},
|
||||
};
|
||||
|
||||
static struct usba_platform_data atngw100_usba_data __initdata = {
|
||||
#if defined(CONFIG_BOARD_ATNGW100_MKII)
|
||||
.vbus_pin = GPIO_PIN_PE(26),
|
||||
#else
|
||||
.vbus_pin = -ENODEV,
|
||||
#endif
|
||||
};
|
||||
|
||||
/*
|
||||
* The next two functions should go away as the boot loader is
|
||||
* supposed to initialize the macb address registers with a valid
|
||||
* ethernet address. But we need to keep it around for a while until
|
||||
* we can be reasonably sure the boot loader does this.
|
||||
*
|
||||
* The phy_id is ignored as the driver will probe for it.
|
||||
*/
|
||||
static int __init parse_tag_ethernet(struct tag *tag)
|
||||
{
|
||||
int i;
|
||||
|
||||
i = tag->u.ethernet.mac_index;
|
||||
if (i < ARRAY_SIZE(hw_addr))
|
||||
memcpy(hw_addr[i].addr, tag->u.ethernet.hw_address,
|
||||
sizeof(hw_addr[i].addr));
|
||||
|
||||
return 0;
|
||||
}
|
||||
__tagtable(ATAG_ETHERNET, parse_tag_ethernet);
|
||||
|
||||
static void __init set_hw_addr(struct platform_device *pdev)
|
||||
{
|
||||
struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
const u8 *addr;
|
||||
void __iomem *regs;
|
||||
struct clk *pclk;
|
||||
|
||||
if (!res)
|
||||
return;
|
||||
if (pdev->id >= ARRAY_SIZE(hw_addr))
|
||||
return;
|
||||
|
||||
addr = hw_addr[pdev->id].addr;
|
||||
if (!is_valid_ether_addr(addr))
|
||||
return;
|
||||
|
||||
/*
|
||||
* Since this is board-specific code, we'll cheat and use the
|
||||
* physical address directly as we happen to know that it's
|
||||
* the same as the virtual address.
|
||||
*/
|
||||
regs = (void __iomem __force *)res->start;
|
||||
pclk = clk_get(&pdev->dev, "pclk");
|
||||
if (IS_ERR(pclk))
|
||||
return;
|
||||
|
||||
clk_enable(pclk);
|
||||
__raw_writel((addr[3] << 24) | (addr[2] << 16)
|
||||
| (addr[1] << 8) | addr[0], regs + 0x98);
|
||||
__raw_writel((addr[5] << 8) | addr[4], regs + 0x9c);
|
||||
clk_disable(pclk);
|
||||
clk_put(pclk);
|
||||
}
|
||||
|
||||
void __init setup_board(void)
|
||||
{
|
||||
at32_map_usart(1, 0, 0); /* USART 1: /dev/ttyS0, DB9 */
|
||||
at32_setup_serial_console(0);
|
||||
}
|
||||
|
||||
static const struct gpio_led ngw_leds[] = {
|
||||
{ .name = "sys", .gpio = GPIO_PIN_PA(16), .active_low = 1,
|
||||
.default_trigger = "heartbeat",
|
||||
},
|
||||
{ .name = "a", .gpio = GPIO_PIN_PA(19), .active_low = 1, },
|
||||
{ .name = "b", .gpio = GPIO_PIN_PE(19), .active_low = 1, },
|
||||
};
|
||||
|
||||
static const struct gpio_led_platform_data ngw_led_data = {
|
||||
.num_leds = ARRAY_SIZE(ngw_leds),
|
||||
.leds = (void *) ngw_leds,
|
||||
};
|
||||
|
||||
static struct platform_device ngw_gpio_leds = {
|
||||
.name = "leds-gpio",
|
||||
.id = -1,
|
||||
.dev = {
|
||||
.platform_data = (void *) &ngw_led_data,
|
||||
}
|
||||
};
|
||||
|
||||
static struct i2c_gpio_platform_data i2c_gpio_data = {
|
||||
.sda_pin = GPIO_PIN_PA(6),
|
||||
.scl_pin = GPIO_PIN_PA(7),
|
||||
.sda_is_open_drain = 1,
|
||||
.scl_is_open_drain = 1,
|
||||
.udelay = 2, /* close to 100 kHz */
|
||||
};
|
||||
|
||||
static struct platform_device i2c_gpio_device = {
|
||||
.name = "i2c-gpio",
|
||||
.id = 0,
|
||||
.dev = {
|
||||
.platform_data = &i2c_gpio_data,
|
||||
},
|
||||
};
|
||||
|
||||
static struct i2c_board_info __initdata i2c_info[] = {
|
||||
/* NOTE: original ATtiny24 firmware is at address 0x0b */
|
||||
};
|
||||
|
||||
static int __init atngw100_init(void)
|
||||
{
|
||||
unsigned i;
|
||||
|
||||
/*
|
||||
* ATNGW100 mkII uses 32-bit SDRAM interface. Reserve the
|
||||
* SDRAM-specific pins so that nobody messes with them.
|
||||
*/
|
||||
#ifdef CONFIG_BOARD_ATNGW100_MKII
|
||||
at32_reserve_pin(GPIO_PIOE_BASE, ATMEL_EBI_PE_DATA_ALL);
|
||||
|
||||
smc_set_timing(&nand_config, &nand_timing);
|
||||
smc_set_configuration(3, &nand_config);
|
||||
at32_add_device_nand(0, &atngw100mkii_nand_data);
|
||||
#endif
|
||||
|
||||
at32_add_device_usart(0);
|
||||
|
||||
set_hw_addr(at32_add_device_eth(0, ð_data[0]));
|
||||
#ifndef CONFIG_BOARD_ATNGW100_MKII_LCD
|
||||
set_hw_addr(at32_add_device_eth(1, ð_data[1]));
|
||||
#endif
|
||||
|
||||
at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
|
||||
at32_add_device_mci(0, &mci0_data);
|
||||
at32_add_device_usba(0, &atngw100_usba_data);
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(ngw_leds); i++) {
|
||||
at32_select_gpio(ngw_leds[i].gpio,
|
||||
AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH);
|
||||
}
|
||||
platform_device_register(&ngw_gpio_leds);
|
||||
|
||||
/* all these i2c/smbus pins should have external pullups for
|
||||
* open-drain sharing among all I2C devices. SDA and SCL do;
|
||||
* PB28/EXTINT3 (ATNGW100) and PE21 (ATNGW100 mkII) doesn't; it should
|
||||
* be SMBALERT# (for PMBus), but it's not available off-board.
|
||||
*/
|
||||
#ifdef CONFIG_BOARD_ATNGW100_MKII
|
||||
at32_select_periph(GPIO_PIOE_BASE, 1 << 21, 0, AT32_GPIOF_PULLUP);
|
||||
#else
|
||||
at32_select_periph(GPIO_PIOB_BASE, 1 << 28, 0, AT32_GPIOF_PULLUP);
|
||||
#endif
|
||||
at32_select_gpio(i2c_gpio_data.sda_pin,
|
||||
AT32_GPIOF_MULTIDRV | AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH);
|
||||
at32_select_gpio(i2c_gpio_data.scl_pin,
|
||||
AT32_GPIOF_MULTIDRV | AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH);
|
||||
platform_device_register(&i2c_gpio_device);
|
||||
i2c_register_board_info(0, i2c_info, ARRAY_SIZE(i2c_info));
|
||||
|
||||
return 0;
|
||||
}
|
||||
postcore_initcall(atngw100_init);
|
||||
|
||||
static int __init atngw100_arch_init(void)
|
||||
{
|
||||
/* PB30 (ATNGW100) and PE30 (ATNGW100 mkII) is the otherwise unused
|
||||
* jumper on the mainboard, with an external pullup; the jumper grounds
|
||||
* it. Use it however you like, including letting U-Boot or Linux tweak
|
||||
* boot sequences.
|
||||
*/
|
||||
#ifdef CONFIG_BOARD_ATNGW100_MKII
|
||||
at32_select_gpio(GPIO_PIN_PE(30), 0);
|
||||
gpio_request(GPIO_PIN_PE(30), "j15");
|
||||
gpio_direction_input(GPIO_PIN_PE(30));
|
||||
gpio_export(GPIO_PIN_PE(30), false);
|
||||
#else
|
||||
at32_select_gpio(GPIO_PIN_PB(30), 0);
|
||||
gpio_request(GPIO_PIN_PB(30), "j15");
|
||||
gpio_direction_input(GPIO_PIN_PB(30));
|
||||
gpio_export(GPIO_PIN_PB(30), false);
|
||||
#endif
|
||||
|
||||
/* set_irq_type() after the arch_initcall for EIC has run, and
|
||||
* before the I2C subsystem could try using this IRQ.
|
||||
*/
|
||||
return irq_set_irq_type(AT32_EXTINT(3), IRQ_TYPE_EDGE_FALLING);
|
||||
}
|
||||
arch_initcall(atngw100_arch_init);
|
|
@ -0,0 +1,109 @@
|
|||
# STK1000 customization
|
||||
|
||||
if BOARD_ATSTK1000
|
||||
|
||||
choice
|
||||
prompt "ATSTK1000 CPU daughterboard type"
|
||||
default BOARD_ATSTK1002
|
||||
|
||||
config BOARD_ATSTK1002
|
||||
bool "ATSTK1002"
|
||||
select CPU_AT32AP7000
|
||||
|
||||
config BOARD_ATSTK1003
|
||||
bool "ATSTK1003"
|
||||
select CPU_AT32AP7001
|
||||
|
||||
config BOARD_ATSTK1004
|
||||
bool "ATSTK1004"
|
||||
select CPU_AT32AP7002
|
||||
|
||||
config BOARD_ATSTK1006
|
||||
bool "ATSTK1006"
|
||||
select CPU_AT32AP7000
|
||||
|
||||
endchoice
|
||||
|
||||
|
||||
config BOARD_ATSTK100X_CUSTOM
|
||||
bool "Non-default STK1002/STK1003/STK1004 jumper settings"
|
||||
help
|
||||
You will normally leave the jumpers on the CPU card at their
|
||||
default settings. If you need to use certain peripherals,
|
||||
you will need to change some of those jumpers.
|
||||
|
||||
if BOARD_ATSTK100X_CUSTOM
|
||||
|
||||
config BOARD_ATSTK100X_SW1_CUSTOM
|
||||
bool "SW1: use SSC1 (not SPI0)"
|
||||
help
|
||||
This also prevents using the external DAC as an audio interface,
|
||||
and means you can't initialize the on-board QVGA display.
|
||||
|
||||
config BOARD_ATSTK100X_SW2_CUSTOM
|
||||
bool "SW2: use IRDA or TIMER0 (not UART-A, MMC/SD, and PS2-A)"
|
||||
help
|
||||
If you change this you'll want an updated boot loader putting
|
||||
the console on UART-C not UART-A.
|
||||
|
||||
config BOARD_ATSTK100X_SW3_CUSTOM
|
||||
bool "SW3: use TIMER1 (not SSC0 and GCLK)"
|
||||
help
|
||||
This also prevents using the external DAC as an audio interface.
|
||||
|
||||
config BOARD_ATSTK100X_SW4_CUSTOM
|
||||
bool "SW4: use ISI/Camera (not GPIOs, SPI1, and PS2-B)"
|
||||
help
|
||||
To use the camera interface you'll need a custom card (on the
|
||||
PCI-format connector) connect a video sensor.
|
||||
|
||||
config BOARD_ATSTK1002_SW5_CUSTOM
|
||||
bool "SW5: use MACB1 (not LCDC)"
|
||||
depends on BOARD_ATSTK1002
|
||||
|
||||
config BOARD_ATSTK1002_SW6_CUSTOM
|
||||
bool "SW6: more GPIOs (not MACB0)"
|
||||
depends on BOARD_ATSTK1002
|
||||
|
||||
endif # custom
|
||||
|
||||
config BOARD_ATSTK100X_SPI1
|
||||
bool "Configure SPI1 controller"
|
||||
depends on !BOARD_ATSTK100X_SW4_CUSTOM
|
||||
help
|
||||
All the signals for the second SPI controller are available on
|
||||
GPIO lines and accessed through the J1 jumper block. Say "y"
|
||||
here to configure that SPI controller.
|
||||
|
||||
config BOARD_ATSTK1000_J2_LED
|
||||
bool
|
||||
default BOARD_ATSTK1000_J2_LED8 || BOARD_ATSTK1000_J2_RGB
|
||||
|
||||
choice
|
||||
prompt "LEDs connected to J2:"
|
||||
depends on LEDS_GPIO && !BOARD_ATSTK100X_SW4_CUSTOM
|
||||
optional
|
||||
help
|
||||
Select this if you have jumpered the J2 jumper block to the
|
||||
LED0..LED7 amber leds, or to the RGB leds, using a ten-pin
|
||||
IDC cable. A default "heartbeat" trigger is provided, but
|
||||
you can of course override this.
|
||||
|
||||
config BOARD_ATSTK1000_J2_LED8
|
||||
bool "LED0..LED7"
|
||||
help
|
||||
Select this if J2 is jumpered to LED0..LED7 amber leds.
|
||||
|
||||
config BOARD_ATSTK1000_J2_RGB
|
||||
bool "RGB leds"
|
||||
help
|
||||
Select this if J2 is jumpered to the RGB leds.
|
||||
|
||||
endchoice
|
||||
|
||||
config BOARD_ATSTK1000_EXTDAC
|
||||
bool
|
||||
depends on !BOARD_ATSTK100X_SW1_CUSTOM && !BOARD_ATSTK100X_SW3_CUSTOM
|
||||
default y
|
||||
|
||||
endif # stk 1000
|
|
@ -0,0 +1,5 @@
|
|||
obj-y += setup.o flash.o
|
||||
obj-$(CONFIG_BOARD_ATSTK1002) += atstk1002.o
|
||||
obj-$(CONFIG_BOARD_ATSTK1003) += atstk1003.o
|
||||
obj-$(CONFIG_BOARD_ATSTK1004) += atstk1004.o
|
||||
obj-$(CONFIG_BOARD_ATSTK1006) += atstk1002.o
|
|
@ -0,0 +1,17 @@
|
|||
/*
|
||||
* ATSTK1000 setup code: Daughterboard interface
|
||||
*
|
||||
* Copyright (C) 2007 Atmel Corporation
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
#ifndef __ARCH_AVR32_BOARDS_ATSTK1000_ATSTK1000_H
|
||||
#define __ARCH_AVR32_BOARDS_ATSTK1000_ATSTK1000_H
|
||||
|
||||
extern struct atmel_lcdfb_pdata atstk1000_lcdc_data;
|
||||
|
||||
void atstk1000_setup_j2_leds(void);
|
||||
|
||||
#endif /* __ARCH_AVR32_BOARDS_ATSTK1000_ATSTK1000_H */
|
|
@ -0,0 +1,330 @@
|
|||
/*
|
||||
* ATSTK1002/ATSTK1006 daughterboard-specific init code
|
||||
*
|
||||
* Copyright (C) 2005-2007 Atmel Corporation
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
#include <linux/clk.h>
|
||||
#include <linux/etherdevice.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/string.h>
|
||||
#include <linux/types.h>
|
||||
#include <linux/spi/spi.h>
|
||||
#include <linux/spi/at73c213.h>
|
||||
#include <linux/atmel-mci.h>
|
||||
|
||||
#include <video/atmel_lcdc.h>
|
||||
|
||||
#include <asm/io.h>
|
||||
#include <asm/setup.h>
|
||||
|
||||
#include <mach/at32ap700x.h>
|
||||
#include <mach/board.h>
|
||||
#include <mach/init.h>
|
||||
#include <mach/portmux.h>
|
||||
|
||||
#include "atstk1000.h"
|
||||
|
||||
/* Oscillator frequencies. These are board specific */
|
||||
unsigned long at32_board_osc_rates[3] = {
|
||||
[0] = 32768, /* 32.768 kHz on RTC osc */
|
||||
[1] = 20000000, /* 20 MHz on osc0 */
|
||||
[2] = 12000000, /* 12 MHz on osc1 */
|
||||
};
|
||||
|
||||
/*
|
||||
* The ATSTK1006 daughterboard is very similar to the ATSTK1002. Both
|
||||
* have the AT32AP7000 chip on board; the difference is that the
|
||||
* STK1006 has 128 MB SDRAM (the STK1002 uses the 8 MB SDRAM chip on
|
||||
* the STK1000 motherboard) and 256 MB NAND flash (the STK1002 has
|
||||
* none.)
|
||||
*
|
||||
* The RAM difference is handled by the boot loader, so the only
|
||||
* difference we end up handling here is the NAND flash.
|
||||
*/
|
||||
#ifdef CONFIG_BOARD_ATSTK1006
|
||||
#include <linux/mtd/partitions.h>
|
||||
#include <mach/smc.h>
|
||||
|
||||
static struct smc_timing nand_timing __initdata = {
|
||||
.ncs_read_setup = 0,
|
||||
.nrd_setup = 10,
|
||||
.ncs_write_setup = 0,
|
||||
.nwe_setup = 10,
|
||||
|
||||
.ncs_read_pulse = 30,
|
||||
.nrd_pulse = 15,
|
||||
.ncs_write_pulse = 30,
|
||||
.nwe_pulse = 15,
|
||||
|
||||
.read_cycle = 30,
|
||||
.write_cycle = 30,
|
||||
|
||||
.ncs_read_recover = 0,
|
||||
.nrd_recover = 15,
|
||||
.ncs_write_recover = 0,
|
||||
/* WE# high -> RE# low min 60 ns */
|
||||
.nwe_recover = 50,
|
||||
};
|
||||
|
||||
static struct smc_config nand_config __initdata = {
|
||||
.bus_width = 1,
|
||||
.nrd_controlled = 1,
|
||||
.nwe_controlled = 1,
|
||||
.nwait_mode = 0,
|
||||
.byte_write = 0,
|
||||
.tdf_cycles = 2,
|
||||
.tdf_mode = 0,
|
||||
};
|
||||
|
||||
static struct mtd_partition nand_partitions[] = {
|
||||
{
|
||||
.name = "main",
|
||||
.offset = 0x00000000,
|
||||
.size = MTDPART_SIZ_FULL,
|
||||
},
|
||||
};
|
||||
|
||||
static struct atmel_nand_data atstk1006_nand_data __initdata = {
|
||||
.cle = 21,
|
||||
.ale = 22,
|
||||
.rdy_pin = GPIO_PIN_PB(30),
|
||||
.enable_pin = GPIO_PIN_PB(29),
|
||||
.ecc_mode = NAND_ECC_SOFT,
|
||||
.parts = nand_partitions,
|
||||
.num_parts = ARRAY_SIZE(nand_partitions),
|
||||
};
|
||||
#endif
|
||||
|
||||
struct eth_addr {
|
||||
u8 addr[6];
|
||||
};
|
||||
|
||||
static struct eth_addr __initdata hw_addr[2];
|
||||
static struct macb_platform_data __initdata eth_data[2] = {
|
||||
{
|
||||
/*
|
||||
* The MDIO pullups on STK1000 are a bit too weak for
|
||||
* the autodetection to work properly, so we have to
|
||||
* mask out everything but the correct address.
|
||||
*/
|
||||
.phy_mask = ~(1U << 16),
|
||||
},
|
||||
{
|
||||
.phy_mask = ~(1U << 17),
|
||||
},
|
||||
};
|
||||
|
||||
#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
|
||||
static struct at73c213_board_info at73c213_data = {
|
||||
.ssc_id = 0,
|
||||
.shortname = "AVR32 STK1000 external DAC",
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
|
||||
static struct spi_board_info spi0_board_info[] __initdata = {
|
||||
#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
|
||||
{
|
||||
/* AT73C213 */
|
||||
.modalias = "at73c213",
|
||||
.max_speed_hz = 200000,
|
||||
.chip_select = 0,
|
||||
.mode = SPI_MODE_1,
|
||||
.platform_data = &at73c213_data,
|
||||
},
|
||||
#endif
|
||||
{
|
||||
/* QVGA display */
|
||||
.modalias = "ltv350qv",
|
||||
.max_speed_hz = 16000000,
|
||||
.chip_select = 1,
|
||||
.mode = SPI_MODE_3,
|
||||
},
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_BOARD_ATSTK100X_SPI1
|
||||
static struct spi_board_info spi1_board_info[] __initdata = { {
|
||||
/* patch in custom entries here */
|
||||
} };
|
||||
#endif
|
||||
|
||||
/*
|
||||
* The next two functions should go away as the boot loader is
|
||||
* supposed to initialize the macb address registers with a valid
|
||||
* ethernet address. But we need to keep it around for a while until
|
||||
* we can be reasonably sure the boot loader does this.
|
||||
*
|
||||
* The phy_id is ignored as the driver will probe for it.
|
||||
*/
|
||||
static int __init parse_tag_ethernet(struct tag *tag)
|
||||
{
|
||||
int i;
|
||||
|
||||
i = tag->u.ethernet.mac_index;
|
||||
if (i < ARRAY_SIZE(hw_addr))
|
||||
memcpy(hw_addr[i].addr, tag->u.ethernet.hw_address,
|
||||
sizeof(hw_addr[i].addr));
|
||||
|
||||
return 0;
|
||||
}
|
||||
__tagtable(ATAG_ETHERNET, parse_tag_ethernet);
|
||||
|
||||
static void __init set_hw_addr(struct platform_device *pdev)
|
||||
{
|
||||
struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
const u8 *addr;
|
||||
void __iomem *regs;
|
||||
struct clk *pclk;
|
||||
|
||||
if (!res)
|
||||
return;
|
||||
if (pdev->id >= ARRAY_SIZE(hw_addr))
|
||||
return;
|
||||
|
||||
addr = hw_addr[pdev->id].addr;
|
||||
if (!is_valid_ether_addr(addr))
|
||||
return;
|
||||
|
||||
/*
|
||||
* Since this is board-specific code, we'll cheat and use the
|
||||
* physical address directly as we happen to know that it's
|
||||
* the same as the virtual address.
|
||||
*/
|
||||
regs = (void __iomem __force *)res->start;
|
||||
pclk = clk_get(&pdev->dev, "pclk");
|
||||
if (IS_ERR(pclk))
|
||||
return;
|
||||
|
||||
clk_enable(pclk);
|
||||
__raw_writel((addr[3] << 24) | (addr[2] << 16)
|
||||
| (addr[1] << 8) | addr[0], regs + 0x98);
|
||||
__raw_writel((addr[5] << 8) | addr[4], regs + 0x9c);
|
||||
clk_disable(pclk);
|
||||
clk_put(pclk);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
|
||||
static void __init atstk1002_setup_extdac(void)
|
||||
{
|
||||
struct clk *gclk;
|
||||
struct clk *pll;
|
||||
|
||||
gclk = clk_get(NULL, "gclk0");
|
||||
if (IS_ERR(gclk))
|
||||
goto err_gclk;
|
||||
pll = clk_get(NULL, "pll0");
|
||||
if (IS_ERR(pll))
|
||||
goto err_pll;
|
||||
|
||||
if (clk_set_parent(gclk, pll)) {
|
||||
pr_debug("STK1000: failed to set pll0 as parent for DAC clock\n");
|
||||
goto err_set_clk;
|
||||
}
|
||||
|
||||
at32_select_periph(GPIO_PIOA_BASE, (1 << 30), GPIO_PERIPH_A, 0);
|
||||
at73c213_data.dac_clk = gclk;
|
||||
|
||||
err_set_clk:
|
||||
clk_put(pll);
|
||||
err_pll:
|
||||
clk_put(gclk);
|
||||
err_gclk:
|
||||
return;
|
||||
}
|
||||
#else
|
||||
static void __init atstk1002_setup_extdac(void)
|
||||
{
|
||||
|
||||
}
|
||||
#endif /* CONFIG_BOARD_ATSTK1000_EXTDAC */
|
||||
|
||||
void __init setup_board(void)
|
||||
{
|
||||
#ifdef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
|
||||
at32_map_usart(0, 1, 0); /* USART 0/B: /dev/ttyS1, IRDA */
|
||||
#else
|
||||
at32_map_usart(1, 0, 0); /* USART 1/A: /dev/ttyS0, DB9 */
|
||||
#endif
|
||||
/* USART 2/unused: expansion connector */
|
||||
at32_map_usart(3, 2, 0); /* USART 3/C: /dev/ttyS2, DB9 */
|
||||
|
||||
at32_setup_serial_console(0);
|
||||
}
|
||||
|
||||
#ifndef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
|
||||
|
||||
static struct mci_platform_data __initdata mci0_data = {
|
||||
.slot[0] = {
|
||||
.bus_width = 4,
|
||||
|
||||
/* MMC card detect requires MACB0 *NOT* be used */
|
||||
#ifdef CONFIG_BOARD_ATSTK1002_SW6_CUSTOM
|
||||
.detect_pin = GPIO_PIN_PC(14), /* gpio30/sdcd */
|
||||
.wp_pin = GPIO_PIN_PC(15), /* gpio31/sdwp */
|
||||
#else
|
||||
.detect_pin = -ENODEV,
|
||||
.wp_pin = -ENODEV,
|
||||
#endif /* SW6 for sd{cd,wp} routing */
|
||||
},
|
||||
};
|
||||
|
||||
#endif /* SW2 for MMC signal routing */
|
||||
|
||||
static int __init atstk1002_init(void)
|
||||
{
|
||||
/*
|
||||
* ATSTK1000 uses 32-bit SDRAM interface. Reserve the
|
||||
* SDRAM-specific pins so that nobody messes with them.
|
||||
*/
|
||||
at32_reserve_pin(GPIO_PIOE_BASE, ATMEL_EBI_PE_DATA_ALL);
|
||||
|
||||
#ifdef CONFIG_BOARD_ATSTK1006
|
||||
smc_set_timing(&nand_config, &nand_timing);
|
||||
smc_set_configuration(3, &nand_config);
|
||||
at32_add_device_nand(0, &atstk1006_nand_data);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
|
||||
at32_add_device_usart(1);
|
||||
#else
|
||||
at32_add_device_usart(0);
|
||||
#endif
|
||||
at32_add_device_usart(2);
|
||||
|
||||
#ifndef CONFIG_BOARD_ATSTK1002_SW6_CUSTOM
|
||||
set_hw_addr(at32_add_device_eth(0, ð_data[0]));
|
||||
#endif
|
||||
#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
|
||||
at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
|
||||
#endif
|
||||
#ifdef CONFIG_BOARD_ATSTK100X_SPI1
|
||||
at32_add_device_spi(1, spi1_board_info, ARRAY_SIZE(spi1_board_info));
|
||||
#endif
|
||||
#ifndef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
|
||||
at32_add_device_mci(0, &mci0_data);
|
||||
#endif
|
||||
#ifdef CONFIG_BOARD_ATSTK1002_SW5_CUSTOM
|
||||
set_hw_addr(at32_add_device_eth(1, ð_data[1]));
|
||||
#else
|
||||
at32_add_device_lcdc(0, &atstk1000_lcdc_data,
|
||||
fbmem_start, fbmem_size,
|
||||
ATMEL_LCDC_PRI_24BIT | ATMEL_LCDC_PRI_CONTROL);
|
||||
#endif
|
||||
at32_add_device_usba(0, NULL);
|
||||
#ifndef CONFIG_BOARD_ATSTK100X_SW3_CUSTOM
|
||||
at32_add_device_ssc(0, ATMEL_SSC_TX);
|
||||
#endif
|
||||
|
||||
atstk1000_setup_j2_leds();
|
||||
atstk1002_setup_extdac();
|
||||
|
||||
return 0;
|
||||
}
|
||||
postcore_initcall(atstk1002_init);
|
|
@ -0,0 +1,162 @@
|
|||
/*
|
||||
* ATSTK1003 daughterboard-specific init code
|
||||
*
|
||||
* Copyright (C) 2007 Atmel Corporation
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
#include <linux/clk.h>
|
||||
#include <linux/err.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/string.h>
|
||||
#include <linux/types.h>
|
||||
|
||||
#include <linux/spi/at73c213.h>
|
||||
#include <linux/spi/spi.h>
|
||||
#include <linux/atmel-mci.h>
|
||||
|
||||
#include <asm/setup.h>
|
||||
|
||||
#include <mach/at32ap700x.h>
|
||||
#include <mach/board.h>
|
||||
#include <mach/init.h>
|
||||
#include <mach/portmux.h>
|
||||
|
||||
#include "atstk1000.h"
|
||||
|
||||
/* Oscillator frequencies. These are board specific */
|
||||
unsigned long at32_board_osc_rates[3] = {
|
||||
[0] = 32768, /* 32.768 kHz on RTC osc */
|
||||
[1] = 20000000, /* 20 MHz on osc0 */
|
||||
[2] = 12000000, /* 12 MHz on osc1 */
|
||||
};
|
||||
|
||||
#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
|
||||
static struct at73c213_board_info at73c213_data = {
|
||||
.ssc_id = 0,
|
||||
.shortname = "AVR32 STK1000 external DAC",
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
|
||||
static struct spi_board_info spi0_board_info[] __initdata = {
|
||||
#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
|
||||
{
|
||||
/* AT73C213 */
|
||||
.modalias = "at73c213",
|
||||
.max_speed_hz = 200000,
|
||||
.chip_select = 0,
|
||||
.mode = SPI_MODE_1,
|
||||
.platform_data = &at73c213_data,
|
||||
},
|
||||
#endif
|
||||
/*
|
||||
* We can control the LTV350QV LCD panel, but it isn't much
|
||||
* point since we don't have an LCD controller...
|
||||
*/
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_BOARD_ATSTK100X_SPI1
|
||||
static struct spi_board_info spi1_board_info[] __initdata = { {
|
||||
/* patch in custom entries here */
|
||||
} };
|
||||
#endif
|
||||
|
||||
#ifndef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
|
||||
static struct mci_platform_data __initdata mci0_data = {
|
||||
.slot[0] = {
|
||||
.bus_width = 4,
|
||||
.detect_pin = -ENODEV,
|
||||
.wp_pin = -ENODEV,
|
||||
},
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
|
||||
static void __init atstk1003_setup_extdac(void)
|
||||
{
|
||||
struct clk *gclk;
|
||||
struct clk *pll;
|
||||
|
||||
gclk = clk_get(NULL, "gclk0");
|
||||
if (IS_ERR(gclk))
|
||||
goto err_gclk;
|
||||
pll = clk_get(NULL, "pll0");
|
||||
if (IS_ERR(pll))
|
||||
goto err_pll;
|
||||
|
||||
if (clk_set_parent(gclk, pll)) {
|
||||
pr_debug("STK1000: failed to set pll0 as parent for DAC clock\n");
|
||||
goto err_set_clk;
|
||||
}
|
||||
|
||||
at32_select_periph(GPIO_PIOA_BASE, (1 << 30), GPIO_PERIPH_A, 0);
|
||||
at73c213_data.dac_clk = gclk;
|
||||
|
||||
err_set_clk:
|
||||
clk_put(pll);
|
||||
err_pll:
|
||||
clk_put(gclk);
|
||||
err_gclk:
|
||||
return;
|
||||
}
|
||||
#else
|
||||
static void __init atstk1003_setup_extdac(void)
|
||||
{
|
||||
|
||||
}
|
||||
#endif /* CONFIG_BOARD_ATSTK1000_EXTDAC */
|
||||
|
||||
void __init setup_board(void)
|
||||
{
|
||||
#ifdef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
|
||||
at32_map_usart(0, 1, 0); /* USART 0/B: /dev/ttyS1, IRDA */
|
||||
#else
|
||||
at32_map_usart(1, 0, 0); /* USART 1/A: /dev/ttyS0, DB9 */
|
||||
#endif
|
||||
/* USART 2/unused: expansion connector */
|
||||
at32_map_usart(3, 2, 0); /* USART 3/C: /dev/ttyS2, DB9 */
|
||||
|
||||
at32_setup_serial_console(0);
|
||||
}
|
||||
|
||||
static int __init atstk1003_init(void)
|
||||
{
|
||||
/*
|
||||
* ATSTK1000 uses 32-bit SDRAM interface. Reserve the
|
||||
* SDRAM-specific pins so that nobody messes with them.
|
||||
*/
|
||||
at32_reserve_pin(GPIO_PIOE_BASE, ATMEL_EBI_PE_DATA_ALL);
|
||||
|
||||
#ifdef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
|
||||
at32_add_device_usart(1);
|
||||
#else
|
||||
at32_add_device_usart(0);
|
||||
#endif
|
||||
at32_add_device_usart(2);
|
||||
|
||||
#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
|
||||
at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
|
||||
#endif
|
||||
#ifdef CONFIG_BOARD_ATSTK100X_SPI1
|
||||
at32_add_device_spi(1, spi1_board_info, ARRAY_SIZE(spi1_board_info));
|
||||
#endif
|
||||
#ifndef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
|
||||
at32_add_device_mci(0, &mci0_data);
|
||||
#endif
|
||||
at32_add_device_usba(0, NULL);
|
||||
#ifndef CONFIG_BOARD_ATSTK100X_SW3_CUSTOM
|
||||
at32_add_device_ssc(0, ATMEL_SSC_TX);
|
||||
#endif
|
||||
|
||||
atstk1000_setup_j2_leds();
|
||||
atstk1003_setup_extdac();
|
||||
|
||||
return 0;
|
||||
}
|
||||
postcore_initcall(atstk1003_init);
|
|
@ -0,0 +1,164 @@
|
|||
/*
|
||||
* ATSTK1003 daughterboard-specific init code
|
||||
*
|
||||
* Copyright (C) 2007 Atmel Corporation
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
#include <linux/clk.h>
|
||||
#include <linux/err.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/string.h>
|
||||
#include <linux/types.h>
|
||||
|
||||
#include <linux/spi/at73c213.h>
|
||||
#include <linux/spi/spi.h>
|
||||
#include <linux/atmel-mci.h>
|
||||
|
||||
#include <video/atmel_lcdc.h>
|
||||
|
||||
#include <asm/setup.h>
|
||||
|
||||
#include <mach/at32ap700x.h>
|
||||
#include <mach/board.h>
|
||||
#include <mach/init.h>
|
||||
#include <mach/portmux.h>
|
||||
|
||||
#include "atstk1000.h"
|
||||
|
||||
/* Oscillator frequencies. These are board specific */
|
||||
unsigned long at32_board_osc_rates[3] = {
|
||||
[0] = 32768, /* 32.768 kHz on RTC osc */
|
||||
[1] = 20000000, /* 20 MHz on osc0 */
|
||||
[2] = 12000000, /* 12 MHz on osc1 */
|
||||
};
|
||||
|
||||
#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
|
||||
static struct at73c213_board_info at73c213_data = {
|
||||
.ssc_id = 0,
|
||||
.shortname = "AVR32 STK1000 external DAC",
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
|
||||
static struct spi_board_info spi0_board_info[] __initdata = {
|
||||
#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
|
||||
{
|
||||
/* AT73C213 */
|
||||
.modalias = "at73c213",
|
||||
.max_speed_hz = 200000,
|
||||
.chip_select = 0,
|
||||
.mode = SPI_MODE_1,
|
||||
.platform_data = &at73c213_data,
|
||||
},
|
||||
#endif
|
||||
{
|
||||
/* QVGA display */
|
||||
.modalias = "ltv350qv",
|
||||
.max_speed_hz = 16000000,
|
||||
.chip_select = 1,
|
||||
.mode = SPI_MODE_3,
|
||||
},
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_BOARD_ATSTK100X_SPI1
|
||||
static struct spi_board_info spi1_board_info[] __initdata = { {
|
||||
/* patch in custom entries here */
|
||||
} };
|
||||
#endif
|
||||
|
||||
#ifndef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
|
||||
static struct mci_platform_data __initdata mci0_data = {
|
||||
.slot[0] = {
|
||||
.bus_width = 4,
|
||||
.detect_pin = -ENODEV,
|
||||
.wp_pin = -ENODEV,
|
||||
},
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
|
||||
static void __init atstk1004_setup_extdac(void)
|
||||
{
|
||||
struct clk *gclk;
|
||||
struct clk *pll;
|
||||
|
||||
gclk = clk_get(NULL, "gclk0");
|
||||
if (IS_ERR(gclk))
|
||||
goto err_gclk;
|
||||
pll = clk_get(NULL, "pll0");
|
||||
if (IS_ERR(pll))
|
||||
goto err_pll;
|
||||
|
||||
if (clk_set_parent(gclk, pll)) {
|
||||
pr_debug("STK1000: failed to set pll0 as parent for DAC clock\n");
|
||||
goto err_set_clk;
|
||||
}
|
||||
|
||||
at32_select_periph(GPIO_PIOA_BASE, (1 << 30), GPIO_PERIPH_A, 0);
|
||||
at73c213_data.dac_clk = gclk;
|
||||
|
||||
err_set_clk:
|
||||
clk_put(pll);
|
||||
err_pll:
|
||||
clk_put(gclk);
|
||||
err_gclk:
|
||||
return;
|
||||
}
|
||||
#else
|
||||
static void __init atstk1004_setup_extdac(void)
|
||||
{
|
||||
|
||||
}
|
||||
#endif /* CONFIG_BOARD_ATSTK1000_EXTDAC */
|
||||
|
||||
void __init setup_board(void)
|
||||
{
|
||||
#ifdef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
|
||||
at32_map_usart(0, 1, 0); /* USART 0/B: /dev/ttyS1, IRDA */
|
||||
#else
|
||||
at32_map_usart(1, 0, 0); /* USART 1/A: /dev/ttyS0, DB9 */
|
||||
#endif
|
||||
/* USART 2/unused: expansion connector */
|
||||
at32_map_usart(3, 2, 0); /* USART 3/C: /dev/ttyS2, DB9 */
|
||||
|
||||
at32_setup_serial_console(0);
|
||||
}
|
||||
|
||||
static int __init atstk1004_init(void)
|
||||
{
|
||||
#ifdef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
|
||||
at32_add_device_usart(1);
|
||||
#else
|
||||
at32_add_device_usart(0);
|
||||
#endif
|
||||
at32_add_device_usart(2);
|
||||
|
||||
#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
|
||||
at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
|
||||
#endif
|
||||
#ifdef CONFIG_BOARD_ATSTK100X_SPI1
|
||||
at32_add_device_spi(1, spi1_board_info, ARRAY_SIZE(spi1_board_info));
|
||||
#endif
|
||||
#ifndef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
|
||||
at32_add_device_mci(0, &mci0_data);
|
||||
#endif
|
||||
at32_add_device_lcdc(0, &atstk1000_lcdc_data,
|
||||
fbmem_start, fbmem_size,
|
||||
ATMEL_LCDC_PRI_24BIT | ATMEL_LCDC_PRI_CONTROL);
|
||||
at32_add_device_usba(0, NULL);
|
||||
#ifndef CONFIG_BOARD_ATSTK100X_SW3_CUSTOM
|
||||
at32_add_device_ssc(0, ATMEL_SSC_TX);
|
||||
#endif
|
||||
|
||||
atstk1000_setup_j2_leds();
|
||||
atstk1004_setup_extdac();
|
||||
|
||||
return 0;
|
||||
}
|
||||
postcore_initcall(atstk1004_init);
|
|
@ -0,0 +1,98 @@
|
|||
/*
|
||||
* ATSTK1000 board-specific flash initialization
|
||||
*
|
||||
* Copyright (C) 2005-2006 Atmel Corporation
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
#include <linux/init.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/mtd/mtd.h>
|
||||
#include <linux/mtd/partitions.h>
|
||||
#include <linux/mtd/physmap.h>
|
||||
|
||||
#include <mach/smc.h>
|
||||
|
||||
static struct smc_timing flash_timing __initdata = {
|
||||
.ncs_read_setup = 0,
|
||||
.nrd_setup = 40,
|
||||
.ncs_write_setup = 0,
|
||||
.nwe_setup = 10,
|
||||
|
||||
.ncs_read_pulse = 80,
|
||||
.nrd_pulse = 40,
|
||||
.ncs_write_pulse = 65,
|
||||
.nwe_pulse = 55,
|
||||
|
||||
.read_cycle = 120,
|
||||
.write_cycle = 120,
|
||||
};
|
||||
|
||||
static struct smc_config flash_config __initdata = {
|
||||
.bus_width = 2,
|
||||
.nrd_controlled = 1,
|
||||
.nwe_controlled = 1,
|
||||
.byte_write = 1,
|
||||
};
|
||||
|
||||
static struct mtd_partition flash_parts[] = {
|
||||
{
|
||||
.name = "u-boot",
|
||||
.offset = 0x00000000,
|
||||
.size = 0x00020000, /* 128 KiB */
|
||||
.mask_flags = MTD_WRITEABLE,
|
||||
},
|
||||
{
|
||||
.name = "root",
|
||||
.offset = 0x00020000,
|
||||
.size = 0x007d0000,
|
||||
},
|
||||
{
|
||||
.name = "env",
|
||||
.offset = 0x007f0000,
|
||||
.size = 0x00010000,
|
||||
.mask_flags = MTD_WRITEABLE,
|
||||
},
|
||||
};
|
||||
|
||||
static struct physmap_flash_data flash_data = {
|
||||
.width = 2,
|
||||
.nr_parts = ARRAY_SIZE(flash_parts),
|
||||
.parts = flash_parts,
|
||||
};
|
||||
|
||||
static struct resource flash_resource = {
|
||||
.start = 0x00000000,
|
||||
.end = 0x007fffff,
|
||||
.flags = IORESOURCE_MEM,
|
||||
};
|
||||
|
||||
static struct platform_device flash_device = {
|
||||
.name = "physmap-flash",
|
||||
.id = 0,
|
||||
.resource = &flash_resource,
|
||||
.num_resources = 1,
|
||||
.dev = {
|
||||
.platform_data = &flash_data,
|
||||
},
|
||||
};
|
||||
|
||||
/* This needs to be called after the SMC has been initialized */
|
||||
static int __init atstk1000_flash_init(void)
|
||||
{
|
||||
int ret;
|
||||
|
||||
smc_set_timing(&flash_config, &flash_timing);
|
||||
ret = smc_set_configuration(0, &flash_config);
|
||||
if (ret < 0) {
|
||||
printk(KERN_ERR "atstk1000: failed to set NOR flash timing\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
platform_device_register(&flash_device);
|
||||
|
||||
return 0;
|
||||
}
|
||||
device_initcall(atstk1000_flash_init);
|
|
@ -0,0 +1,127 @@
|
|||
/*
|
||||
* ATSTK1000 board-specific setup code.
|
||||
*
|
||||
* Copyright (C) 2005-2006 Atmel Corporation
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
#include <linux/bootmem.h>
|
||||
#include <linux/fb.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/types.h>
|
||||
#include <linux/linkage.h>
|
||||
|
||||
#include <video/atmel_lcdc.h>
|
||||
|
||||
#include <asm/setup.h>
|
||||
|
||||
#include <mach/at32ap700x.h>
|
||||
#include <mach/board.h>
|
||||
#include <mach/portmux.h>
|
||||
|
||||
#include "atstk1000.h"
|
||||
|
||||
/* Initialized by bootloader-specific startup code. */
|
||||
struct tag *bootloader_tags __initdata;
|
||||
|
||||
static struct fb_videomode __initdata ltv350qv_modes[] = {
|
||||
{
|
||||
.name = "320x240 @ 75",
|
||||
.refresh = 75,
|
||||
.xres = 320, .yres = 240,
|
||||
.pixclock = KHZ2PICOS(6891),
|
||||
|
||||
.left_margin = 17, .right_margin = 33,
|
||||
.upper_margin = 10, .lower_margin = 10,
|
||||
.hsync_len = 16, .vsync_len = 1,
|
||||
|
||||
.sync = 0,
|
||||
.vmode = FB_VMODE_NONINTERLACED,
|
||||
},
|
||||
};
|
||||
|
||||
static struct fb_monspecs __initdata atstk1000_default_monspecs = {
|
||||
.manufacturer = "SNG",
|
||||
.monitor = "LTV350QV",
|
||||
.modedb = ltv350qv_modes,
|
||||
.modedb_len = ARRAY_SIZE(ltv350qv_modes),
|
||||
.hfmin = 14820,
|
||||
.hfmax = 22230,
|
||||
.vfmin = 60,
|
||||
.vfmax = 90,
|
||||
.dclkmax = 30000000,
|
||||
};
|
||||
|
||||
struct atmel_lcdfb_pdata __initdata atstk1000_lcdc_data = {
|
||||
.default_bpp = 24,
|
||||
.default_dmacon = ATMEL_LCDC_DMAEN | ATMEL_LCDC_DMA2DEN,
|
||||
.default_lcdcon2 = (ATMEL_LCDC_DISTYPE_TFT
|
||||
| ATMEL_LCDC_INVCLK
|
||||
| ATMEL_LCDC_CLKMOD_ALWAYSACTIVE
|
||||
| ATMEL_LCDC_MEMOR_BIG),
|
||||
.default_monspecs = &atstk1000_default_monspecs,
|
||||
.guard_time = 2,
|
||||
};
|
||||
|
||||
#ifdef CONFIG_BOARD_ATSTK1000_J2_LED
|
||||
#include <linux/leds.h>
|
||||
|
||||
static struct gpio_led stk1000_j2_led[] = {
|
||||
#ifdef CONFIG_BOARD_ATSTK1000_J2_LED8
|
||||
#define LEDSTRING "J2 jumpered to LED8"
|
||||
{ .name = "led0:amber", .gpio = GPIO_PIN_PB( 8), },
|
||||
{ .name = "led1:amber", .gpio = GPIO_PIN_PB( 9), },
|
||||
{ .name = "led2:amber", .gpio = GPIO_PIN_PB(10), },
|
||||
{ .name = "led3:amber", .gpio = GPIO_PIN_PB(13), },
|
||||
{ .name = "led4:amber", .gpio = GPIO_PIN_PB(14), },
|
||||
{ .name = "led5:amber", .gpio = GPIO_PIN_PB(15), },
|
||||
{ .name = "led6:amber", .gpio = GPIO_PIN_PB(16), },
|
||||
{ .name = "led7:amber", .gpio = GPIO_PIN_PB(30),
|
||||
.default_trigger = "heartbeat", },
|
||||
#else /* RGB */
|
||||
#define LEDSTRING "J2 jumpered to RGB LEDs"
|
||||
{ .name = "r1:red", .gpio = GPIO_PIN_PB( 8), },
|
||||
{ .name = "g1:green", .gpio = GPIO_PIN_PB(10), },
|
||||
{ .name = "b1:blue", .gpio = GPIO_PIN_PB(14), },
|
||||
|
||||
{ .name = "r2:red", .gpio = GPIO_PIN_PB( 9),
|
||||
.default_trigger = "heartbeat", },
|
||||
{ .name = "g2:green", .gpio = GPIO_PIN_PB(13), },
|
||||
{ .name = "b2:blue", .gpio = GPIO_PIN_PB(15),
|
||||
.default_trigger = "heartbeat", },
|
||||
/* PB16, PB30 unused */
|
||||
#endif
|
||||
};
|
||||
|
||||
static struct gpio_led_platform_data stk1000_j2_led_data = {
|
||||
.num_leds = ARRAY_SIZE(stk1000_j2_led),
|
||||
.leds = stk1000_j2_led,
|
||||
};
|
||||
|
||||
static struct platform_device stk1000_j2_led_dev = {
|
||||
.name = "leds-gpio",
|
||||
.id = 2, /* gpio block J2 */
|
||||
.dev = {
|
||||
.platform_data = &stk1000_j2_led_data,
|
||||
},
|
||||
};
|
||||
|
||||
void __init atstk1000_setup_j2_leds(void)
|
||||
{
|
||||
unsigned i;
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(stk1000_j2_led); i++)
|
||||
at32_select_gpio(stk1000_j2_led[i].gpio, AT32_GPIOF_OUTPUT);
|
||||
|
||||
printk("STK1000: " LEDSTRING "\n");
|
||||
platform_device_register(&stk1000_j2_led_dev);
|
||||
}
|
||||
#else /* CONFIG_BOARD_ATSTK1000_J2_LED */
|
||||
void __init atstk1000_setup_j2_leds(void)
|
||||
{
|
||||
|
||||
}
|
||||
#endif /* CONFIG_BOARD_ATSTK1000_J2_LED */
|
|
@ -0,0 +1,22 @@
|
|||
# Favr-32 customization
|
||||
|
||||
if BOARD_FAVR_32
|
||||
|
||||
config BOARD_FAVR32_ABDAC_RATE
|
||||
int "DAC target rate"
|
||||
default 44100
|
||||
range 32000 50000
|
||||
help
|
||||
Specify the target rate the internal DAC should try to match. This
|
||||
will use PLL1 to generate a frequency as close as possible to this
|
||||
rate.
|
||||
|
||||
Must be within the range 32000 to 50000, which should be suitable to
|
||||
generate most other frequencies in power of 2 steps.
|
||||
|
||||
Ex:
|
||||
48000 will also suit 24000 and 12000
|
||||
44100 will also suit 22050 and 11025
|
||||
32000 will also suit 16000 and 8000
|
||||
|
||||
endif # BOARD_FAVR_32
|
|
@ -0,0 +1 @@
|
|||
obj-y += setup.o flash.o
|
|
@ -0,0 +1,98 @@
|
|||
/*
|
||||
* Favr-32 board-specific flash initialization
|
||||
*
|
||||
* Copyright (C) 2008 Atmel Corporation
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
#include <linux/init.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/mtd/mtd.h>
|
||||
#include <linux/mtd/partitions.h>
|
||||
#include <linux/mtd/physmap.h>
|
||||
|
||||
#include <mach/smc.h>
|
||||
|
||||
static struct smc_timing flash_timing __initdata = {
|
||||
.ncs_read_setup = 0,
|
||||
.nrd_setup = 40,
|
||||
.ncs_write_setup = 0,
|
||||
.nwe_setup = 10,
|
||||
|
||||
.ncs_read_pulse = 80,
|
||||
.nrd_pulse = 40,
|
||||
.ncs_write_pulse = 65,
|
||||
.nwe_pulse = 55,
|
||||
|
||||
.read_cycle = 120,
|
||||
.write_cycle = 120,
|
||||
};
|
||||
|
||||
static struct smc_config flash_config __initdata = {
|
||||
.bus_width = 2,
|
||||
.nrd_controlled = 1,
|
||||
.nwe_controlled = 1,
|
||||
.byte_write = 1,
|
||||
};
|
||||
|
||||
static struct mtd_partition flash_parts[] = {
|
||||
{
|
||||
.name = "u-boot",
|
||||
.offset = 0x00000000,
|
||||
.size = 0x00020000, /* 128 KiB */
|
||||
.mask_flags = MTD_WRITEABLE,
|
||||
},
|
||||
{
|
||||
.name = "root",
|
||||
.offset = 0x00020000,
|
||||
.size = 0x007d0000,
|
||||
},
|
||||
{
|
||||
.name = "env",
|
||||
.offset = 0x007f0000,
|
||||
.size = 0x00010000,
|
||||
.mask_flags = MTD_WRITEABLE,
|
||||
},
|
||||
};
|
||||
|
||||
static struct physmap_flash_data flash_data = {
|
||||
.width = 2,
|
||||
.nr_parts = ARRAY_SIZE(flash_parts),
|
||||
.parts = flash_parts,
|
||||
};
|
||||
|
||||
static struct resource flash_resource = {
|
||||
.start = 0x00000000,
|
||||
.end = 0x007fffff,
|
||||
.flags = IORESOURCE_MEM,
|
||||
};
|
||||
|
||||
static struct platform_device flash_device = {
|
||||
.name = "physmap-flash",
|
||||
.id = 0,
|
||||
.resource = &flash_resource,
|
||||
.num_resources = 1,
|
||||
.dev = {
|
||||
.platform_data = &flash_data,
|
||||
},
|
||||
};
|
||||
|
||||
/* This needs to be called after the SMC has been initialized */
|
||||
static int __init favr32_flash_init(void)
|
||||
{
|
||||
int ret;
|
||||
|
||||
smc_set_timing(&flash_config, &flash_timing);
|
||||
ret = smc_set_configuration(0, &flash_config);
|
||||
if (ret < 0) {
|
||||
printk(KERN_ERR "Favr-32: failed to set NOR flash timing\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
platform_device_register(&flash_device);
|
||||
|
||||
return 0;
|
||||
}
|
||||
device_initcall(favr32_flash_init);
|
|
@ -0,0 +1,366 @@
|
|||
/*
|
||||
* Favr-32 board-specific setup code.
|
||||
*
|
||||
* Copyright (C) 2008 Atmel Corporation
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
#include <linux/clk.h>
|
||||
#include <linux/etherdevice.h>
|
||||
#include <linux/bootmem.h>
|
||||
#include <linux/fb.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/types.h>
|
||||
#include <linux/linkage.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/leds.h>
|
||||
#include <linux/atmel-mci.h>
|
||||
#include <linux/pwm.h>
|
||||
#include <linux/pwm_backlight.h>
|
||||
#include <linux/regulator/fixed.h>
|
||||
#include <linux/regulator/machine.h>
|
||||
#include <linux/spi/spi.h>
|
||||
#include <linux/spi/ads7846.h>
|
||||
|
||||
#include <sound/atmel-abdac.h>
|
||||
|
||||
#include <video/atmel_lcdc.h>
|
||||
|
||||
#include <asm/setup.h>
|
||||
|
||||
#include <mach/at32ap700x.h>
|
||||
#include <mach/init.h>
|
||||
#include <mach/board.h>
|
||||
#include <mach/portmux.h>
|
||||
|
||||
#define PWM_BL_CH 2
|
||||
|
||||
/* Oscillator frequencies. These are board-specific */
|
||||
unsigned long at32_board_osc_rates[3] = {
|
||||
[0] = 32768, /* 32.768 kHz on RTC osc */
|
||||
[1] = 20000000, /* 20 MHz on osc0 */
|
||||
[2] = 12000000, /* 12 MHz on osc1 */
|
||||
};
|
||||
|
||||
/* Initialized by bootloader-specific startup code. */
|
||||
struct tag *bootloader_tags __initdata;
|
||||
|
||||
static struct atmel_abdac_pdata __initdata abdac0_data = {
|
||||
};
|
||||
|
||||
struct eth_addr {
|
||||
u8 addr[6];
|
||||
};
|
||||
static struct eth_addr __initdata hw_addr[1];
|
||||
static struct macb_platform_data __initdata eth_data[1] = {
|
||||
{
|
||||
.phy_mask = ~(1U << 1),
|
||||
},
|
||||
};
|
||||
|
||||
static int ads7843_get_pendown_state(void)
|
||||
{
|
||||
return !gpio_get_value(GPIO_PIN_PB(3));
|
||||
}
|
||||
|
||||
static struct ads7846_platform_data ads7843_data = {
|
||||
.model = 7843,
|
||||
.get_pendown_state = ads7843_get_pendown_state,
|
||||
.pressure_max = 255,
|
||||
/*
|
||||
* Values below are for debounce filtering, these can be experimented
|
||||
* with further.
|
||||
*/
|
||||
.debounce_max = 20,
|
||||
.debounce_rep = 4,
|
||||
.debounce_tol = 5,
|
||||
|
||||
.keep_vref_on = true,
|
||||
.settle_delay_usecs = 500,
|
||||
.penirq_recheck_delay_usecs = 100,
|
||||
};
|
||||
|
||||
static struct spi_board_info __initdata spi1_board_info[] = {
|
||||
{
|
||||
/* ADS7843 touch controller */
|
||||
.modalias = "ads7846",
|
||||
.max_speed_hz = 2000000,
|
||||
.chip_select = 0,
|
||||
.bus_num = 1,
|
||||
.platform_data = &ads7843_data,
|
||||
},
|
||||
};
|
||||
|
||||
static struct mci_platform_data __initdata mci0_data = {
|
||||
.slot[0] = {
|
||||
.bus_width = 4,
|
||||
.detect_pin = -ENODEV,
|
||||
.wp_pin = -ENODEV,
|
||||
},
|
||||
};
|
||||
|
||||
static struct fb_videomode __initdata lb104v03_modes[] = {
|
||||
{
|
||||
.name = "640x480 @ 50",
|
||||
.refresh = 50,
|
||||
.xres = 640, .yres = 480,
|
||||
.pixclock = KHZ2PICOS(25100),
|
||||
|
||||
.left_margin = 90, .right_margin = 70,
|
||||
.upper_margin = 30, .lower_margin = 15,
|
||||
.hsync_len = 12, .vsync_len = 2,
|
||||
|
||||
.sync = 0,
|
||||
.vmode = FB_VMODE_NONINTERLACED,
|
||||
},
|
||||
};
|
||||
|
||||
static struct fb_monspecs __initdata favr32_default_monspecs = {
|
||||
.manufacturer = "LG",
|
||||
.monitor = "LB104V03",
|
||||
.modedb = lb104v03_modes,
|
||||
.modedb_len = ARRAY_SIZE(lb104v03_modes),
|
||||
.hfmin = 27273,
|
||||
.hfmax = 31111,
|
||||
.vfmin = 45,
|
||||
.vfmax = 60,
|
||||
.dclkmax = 28000000,
|
||||
};
|
||||
|
||||
struct atmel_lcdfb_pdata __initdata favr32_lcdc_data = {
|
||||
.default_bpp = 16,
|
||||
.default_dmacon = ATMEL_LCDC_DMAEN | ATMEL_LCDC_DMA2DEN,
|
||||
.default_lcdcon2 = (ATMEL_LCDC_DISTYPE_TFT
|
||||
| ATMEL_LCDC_CLKMOD_ALWAYSACTIVE
|
||||
| ATMEL_LCDC_MEMOR_BIG),
|
||||
.default_monspecs = &favr32_default_monspecs,
|
||||
.guard_time = 2,
|
||||
};
|
||||
|
||||
static struct gpio_led favr32_leds[] = {
|
||||
{
|
||||
.name = "green",
|
||||
.gpio = GPIO_PIN_PE(19),
|
||||
.default_trigger = "heartbeat",
|
||||
.active_low = 1,
|
||||
},
|
||||
{
|
||||
.name = "red",
|
||||
.gpio = GPIO_PIN_PE(20),
|
||||
.active_low = 1,
|
||||
},
|
||||
};
|
||||
|
||||
static struct gpio_led_platform_data favr32_led_data = {
|
||||
.num_leds = ARRAY_SIZE(favr32_leds),
|
||||
.leds = favr32_leds,
|
||||
};
|
||||
|
||||
static struct platform_device favr32_led_dev = {
|
||||
.name = "leds-gpio",
|
||||
.id = 0,
|
||||
.dev = {
|
||||
.platform_data = &favr32_led_data,
|
||||
},
|
||||
};
|
||||
|
||||
/*
|
||||
* The next two functions should go away as the boot loader is
|
||||
* supposed to initialize the macb address registers with a valid
|
||||
* ethernet address. But we need to keep it around for a while until
|
||||
* we can be reasonably sure the boot loader does this.
|
||||
*
|
||||
* The phy_id is ignored as the driver will probe for it.
|
||||
*/
|
||||
static int __init parse_tag_ethernet(struct tag *tag)
|
||||
{
|
||||
int i;
|
||||
|
||||
i = tag->u.ethernet.mac_index;
|
||||
if (i < ARRAY_SIZE(hw_addr))
|
||||
memcpy(hw_addr[i].addr, tag->u.ethernet.hw_address,
|
||||
sizeof(hw_addr[i].addr));
|
||||
|
||||
return 0;
|
||||
}
|
||||
__tagtable(ATAG_ETHERNET, parse_tag_ethernet);
|
||||
|
||||
static void __init set_hw_addr(struct platform_device *pdev)
|
||||
{
|
||||
struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
const u8 *addr;
|
||||
void __iomem *regs;
|
||||
struct clk *pclk;
|
||||
|
||||
if (!res)
|
||||
return;
|
||||
if (pdev->id >= ARRAY_SIZE(hw_addr))
|
||||
return;
|
||||
|
||||
addr = hw_addr[pdev->id].addr;
|
||||
if (!is_valid_ether_addr(addr))
|
||||
return;
|
||||
|
||||
/*
|
||||
* Since this is board-specific code, we'll cheat and use the
|
||||
* physical address directly as we happen to know that it's
|
||||
* the same as the virtual address.
|
||||
*/
|
||||
regs = (void __iomem __force *)res->start;
|
||||
pclk = clk_get(&pdev->dev, "pclk");
|
||||
if (IS_ERR(pclk))
|
||||
return;
|
||||
|
||||
clk_enable(pclk);
|
||||
__raw_writel((addr[3] << 24) | (addr[2] << 16)
|
||||
| (addr[1] << 8) | addr[0], regs + 0x98);
|
||||
__raw_writel((addr[5] << 8) | addr[4], regs + 0x9c);
|
||||
clk_disable(pclk);
|
||||
clk_put(pclk);
|
||||
}
|
||||
|
||||
void __init favr32_setup_leds(void)
|
||||
{
|
||||
unsigned i;
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(favr32_leds); i++)
|
||||
at32_select_gpio(favr32_leds[i].gpio, AT32_GPIOF_OUTPUT);
|
||||
|
||||
platform_device_register(&favr32_led_dev);
|
||||
}
|
||||
|
||||
static struct pwm_lookup pwm_lookup[] = {
|
||||
PWM_LOOKUP("at91sam9rl-pwm", PWM_BL_CH, "pwm-backlight.0", NULL,
|
||||
5000, PWM_POLARITY_INVERSED),
|
||||
};
|
||||
|
||||
static struct regulator_consumer_supply fixed_power_consumers[] = {
|
||||
REGULATOR_SUPPLY("power", "pwm-backlight.0"),
|
||||
};
|
||||
|
||||
static struct platform_pwm_backlight_data pwm_bl_data = {
|
||||
.enable_gpio = GPIO_PIN_PA(28),
|
||||
.max_brightness = 255,
|
||||
.dft_brightness = 255,
|
||||
.lth_brightness = 50,
|
||||
};
|
||||
|
||||
static struct platform_device pwm_bl_device = {
|
||||
.name = "pwm-backlight",
|
||||
.dev = {
|
||||
.platform_data = &pwm_bl_data,
|
||||
},
|
||||
};
|
||||
|
||||
static void __init favr32_setup_atmel_pwm_bl(void)
|
||||
{
|
||||
pwm_add_table(pwm_lookup, ARRAY_SIZE(pwm_lookup));
|
||||
regulator_register_always_on(0, "fixed", fixed_power_consumers,
|
||||
ARRAY_SIZE(fixed_power_consumers), 3300000);
|
||||
platform_device_register(&pwm_bl_device);
|
||||
at32_select_gpio(pwm_bl_data.enable_gpio, 0);
|
||||
}
|
||||
|
||||
void __init setup_board(void)
|
||||
{
|
||||
at32_map_usart(3, 0, 0); /* USART 3 => /dev/ttyS0 */
|
||||
at32_setup_serial_console(0);
|
||||
}
|
||||
|
||||
static int __init set_abdac_rate(struct platform_device *pdev)
|
||||
{
|
||||
int retval;
|
||||
struct clk *osc1;
|
||||
struct clk *pll1;
|
||||
struct clk *abdac;
|
||||
|
||||
if (pdev == NULL)
|
||||
return -ENXIO;
|
||||
|
||||
osc1 = clk_get(NULL, "osc1");
|
||||
if (IS_ERR(osc1)) {
|
||||
retval = PTR_ERR(osc1);
|
||||
goto out;
|
||||
}
|
||||
|
||||
pll1 = clk_get(NULL, "pll1");
|
||||
if (IS_ERR(pll1)) {
|
||||
retval = PTR_ERR(pll1);
|
||||
goto out_osc1;
|
||||
}
|
||||
|
||||
abdac = clk_get(&pdev->dev, "sample_clk");
|
||||
if (IS_ERR(abdac)) {
|
||||
retval = PTR_ERR(abdac);
|
||||
goto out_pll1;
|
||||
}
|
||||
|
||||
retval = clk_set_parent(pll1, osc1);
|
||||
if (retval != 0)
|
||||
goto out_abdac;
|
||||
|
||||
/*
|
||||
* Rate is 32000 to 50000 and ABDAC oversamples 256x. Multiply, in
|
||||
* power of 2, to a value above 80 MHz. Power of 2 so it is possible
|
||||
* for the generic clock to divide it down again and 80 MHz is the
|
||||
* lowest frequency for the PLL.
|
||||
*/
|
||||
retval = clk_round_rate(pll1,
|
||||
CONFIG_BOARD_FAVR32_ABDAC_RATE * 256 * 16);
|
||||
if (retval <= 0) {
|
||||
retval = -EINVAL;
|
||||
goto out_abdac;
|
||||
}
|
||||
|
||||
retval = clk_set_rate(pll1, retval);
|
||||
if (retval != 0)
|
||||
goto out_abdac;
|
||||
|
||||
retval = clk_set_parent(abdac, pll1);
|
||||
if (retval != 0)
|
||||
goto out_abdac;
|
||||
|
||||
out_abdac:
|
||||
clk_put(abdac);
|
||||
out_pll1:
|
||||
clk_put(pll1);
|
||||
out_osc1:
|
||||
clk_put(osc1);
|
||||
out:
|
||||
return retval;
|
||||
}
|
||||
|
||||
static int __init favr32_init(void)
|
||||
{
|
||||
/*
|
||||
* Favr-32 uses 32-bit SDRAM interface. Reserve the SDRAM-specific
|
||||
* pins so that nobody messes with them.
|
||||
*/
|
||||
at32_reserve_pin(GPIO_PIOE_BASE, ATMEL_EBI_PE_DATA_ALL);
|
||||
|
||||
at32_select_gpio(GPIO_PIN_PB(3), 0); /* IRQ from ADS7843 */
|
||||
|
||||
at32_add_device_usart(0);
|
||||
|
||||
set_hw_addr(at32_add_device_eth(0, ð_data[0]));
|
||||
|
||||
spi1_board_info[0].irq = gpio_to_irq(GPIO_PIN_PB(3));
|
||||
|
||||
set_abdac_rate(at32_add_device_abdac(0, &abdac0_data));
|
||||
|
||||
at32_add_device_pwm(1 << PWM_BL_CH);
|
||||
at32_add_device_spi(1, spi1_board_info, ARRAY_SIZE(spi1_board_info));
|
||||
at32_add_device_mci(0, &mci0_data);
|
||||
at32_add_device_usba(0, NULL);
|
||||
at32_add_device_lcdc(0, &favr32_lcdc_data, fbmem_start, fbmem_size, 0);
|
||||
|
||||
favr32_setup_leds();
|
||||
|
||||
favr32_setup_atmel_pwm_bl();
|
||||
|
||||
return 0;
|
||||
}
|
||||
postcore_initcall(favr32_init);
|
|
@ -0,0 +1,43 @@
|
|||
# Hammerhead customization
|
||||
|
||||
if BOARD_HAMMERHEAD
|
||||
|
||||
config BOARD_HAMMERHEAD_USB
|
||||
bool "Philips ISP116x-hcd USB support"
|
||||
help
|
||||
This enables USB support for Hammerheads internal ISP116x
|
||||
controller from Philips.
|
||||
|
||||
Choose 'Y' here if you want to have your board USB driven.
|
||||
|
||||
config BOARD_HAMMERHEAD_LCD
|
||||
bool "Atmel AT91/AT32 LCD support"
|
||||
help
|
||||
This enables LCD support for the Hammerhead board. You may
|
||||
also add support for framebuffer devices (AT91/AT32 LCD Controller)
|
||||
and framebuffer console support to get the most out of your LCD.
|
||||
|
||||
Choose 'Y' here if you have ordered a Corona daugther board and
|
||||
want to have support for your Hantronix HDA-351T-LV LCD.
|
||||
|
||||
config BOARD_HAMMERHEAD_SND
|
||||
bool "Atmel AC97 Sound support"
|
||||
help
|
||||
This enables Sound support for the Hammerhead board. You may
|
||||
also go through the ALSA settings to get it working.
|
||||
|
||||
Choose 'Y' here if you have ordered a Corona daugther board and
|
||||
want to make your board funky.
|
||||
|
||||
config BOARD_HAMMERHEAD_FPGA
|
||||
bool "Hammerhead FPGA Support"
|
||||
default y
|
||||
help
|
||||
This adds support for the Cyclone III FPGA from Altera
|
||||
found on Miromico's Hammerhead board.
|
||||
|
||||
Choose 'Y' here if you want to have FPGA support enabled.
|
||||
You will have to choose the "Hammerhead FPGA Device Support" in
|
||||
Device Drivers->Misc to be able to use FPGA functionality.
|
||||
|
||||
endif # BOARD_ATNGW100
|
|
@ -0,0 +1 @@
|
|||
obj-y += setup.o flash.o
|
|
@ -0,0 +1,381 @@
|
|||
/*
|
||||
* Hammerhead board-specific flash initialization
|
||||
*
|
||||
* Copyright (C) 2008 Miromico AG
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#include <linux/init.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/mtd/mtd.h>
|
||||
#include <linux/mtd/partitions.h>
|
||||
#include <linux/mtd/physmap.h>
|
||||
#include <linux/usb/isp116x.h>
|
||||
#include <linux/dma-mapping.h>
|
||||
#include <linux/delay.h>
|
||||
|
||||
#include <mach/portmux.h>
|
||||
#include <mach/at32ap700x.h>
|
||||
#include <mach/smc.h>
|
||||
|
||||
#include "../../mach-at32ap/clock.h"
|
||||
#include "flash.h"
|
||||
|
||||
|
||||
#define HAMMERHEAD_USB_PERIPH_GCLK0 0x40000000
|
||||
#define HAMMERHEAD_USB_PERIPH_CS2 0x02000000
|
||||
#define HAMMERHEAD_USB_PERIPH_EXTINT0 0x02000000
|
||||
|
||||
#define HAMMERHEAD_FPGA_PERIPH_MOSI 0x00000002
|
||||
#define HAMMERHEAD_FPGA_PERIPH_SCK 0x00000020
|
||||
#define HAMMERHEAD_FPGA_PERIPH_EXTINT3 0x10000000
|
||||
|
||||
static struct smc_timing flash_timing __initdata = {
|
||||
.ncs_read_setup = 0,
|
||||
.nrd_setup = 40,
|
||||
.ncs_write_setup = 0,
|
||||
.nwe_setup = 10,
|
||||
|
||||
.ncs_read_pulse = 80,
|
||||
.nrd_pulse = 40,
|
||||
.ncs_write_pulse = 65,
|
||||
.nwe_pulse = 55,
|
||||
|
||||
.read_cycle = 120,
|
||||
.write_cycle = 120,
|
||||
};
|
||||
|
||||
static struct smc_config flash_config __initdata = {
|
||||
.bus_width = 2,
|
||||
.nrd_controlled = 1,
|
||||
.nwe_controlled = 1,
|
||||
.byte_write = 1,
|
||||
};
|
||||
|
||||
static struct mtd_partition flash_parts[] = {
|
||||
{
|
||||
.name = "u-boot",
|
||||
.offset = 0x00000000,
|
||||
.size = 0x00020000, /* 128 KiB */
|
||||
.mask_flags = MTD_WRITEABLE,
|
||||
},
|
||||
{
|
||||
.name = "root",
|
||||
.offset = 0x00020000,
|
||||
.size = 0x007d0000,
|
||||
},
|
||||
{
|
||||
.name = "env",
|
||||
.offset = 0x007f0000,
|
||||
.size = 0x00010000,
|
||||
.mask_flags = MTD_WRITEABLE,
|
||||
},
|
||||
};
|
||||
|
||||
static struct physmap_flash_data flash_data = {
|
||||
.width = 2,
|
||||
.nr_parts = ARRAY_SIZE(flash_parts),
|
||||
.parts = flash_parts,
|
||||
};
|
||||
|
||||
static struct resource flash_resource = {
|
||||
.start = 0x00000000,
|
||||
.end = 0x007fffff,
|
||||
.flags = IORESOURCE_MEM,
|
||||
};
|
||||
|
||||
static struct platform_device flash_device = {
|
||||
.name = "physmap-flash",
|
||||
.id = 0,
|
||||
.resource = &flash_resource,
|
||||
.num_resources = 1,
|
||||
.dev = { .platform_data = &flash_data, },
|
||||
};
|
||||
|
||||
#ifdef CONFIG_BOARD_HAMMERHEAD_USB
|
||||
|
||||
static struct smc_timing isp1160_timing __initdata = {
|
||||
.ncs_read_setup = 75,
|
||||
.nrd_setup = 75,
|
||||
.ncs_write_setup = 75,
|
||||
.nwe_setup = 75,
|
||||
|
||||
|
||||
/* We use conservative timing settings, as the minimal settings aren't
|
||||
stable. There may be room for tweaking. */
|
||||
.ncs_read_pulse = 75, /* min. 33ns */
|
||||
.nrd_pulse = 75, /* min. 33ns */
|
||||
.ncs_write_pulse = 75, /* min. 26ns */
|
||||
.nwe_pulse = 75, /* min. 26ns */
|
||||
|
||||
.read_cycle = 225, /* min. 143ns */
|
||||
.write_cycle = 225, /* min. 136ns */
|
||||
};
|
||||
|
||||
static struct smc_config isp1160_config __initdata = {
|
||||
.bus_width = 2,
|
||||
.nrd_controlled = 1,
|
||||
.nwe_controlled = 1,
|
||||
.byte_write = 0,
|
||||
};
|
||||
|
||||
/*
|
||||
* The platform delay function is only used to enforce the strange
|
||||
* read to write delay. This can not be configured in the SMC. All other
|
||||
* timings are controlled by the SMC (see timings obove)
|
||||
* So in isp116x-hcd.c we should comment out USE_PLATFORM_DELAY
|
||||
*/
|
||||
void isp116x_delay(struct device *dev, int delay)
|
||||
{
|
||||
if (delay > 150)
|
||||
ndelay(delay - 150);
|
||||
}
|
||||
|
||||
static struct isp116x_platform_data isp1160_data = {
|
||||
.sel15Kres = 1, /* use internal downstream resistors */
|
||||
.oc_enable = 0, /* external overcurrent detection */
|
||||
.int_edge_triggered = 0, /* interrupt is level triggered */
|
||||
.int_act_high = 0, /* interrupt is active low */
|
||||
.delay = isp116x_delay, /* platform delay function */
|
||||
};
|
||||
|
||||
static struct resource isp1160_resource[] = {
|
||||
{
|
||||
.start = 0x08000000,
|
||||
.end = 0x08000001,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
.start = 0x08000002,
|
||||
.end = 0x08000003,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
.start = 64,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
||||
static struct platform_device isp1160_device = {
|
||||
.name = "isp116x-hcd",
|
||||
.id = 0,
|
||||
.resource = isp1160_resource,
|
||||
.num_resources = 3,
|
||||
.dev = {
|
||||
.platform_data = &isp1160_data,
|
||||
},
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_BOARD_HAMMERHEAD_USB
|
||||
static int __init hammerhead_usbh_init(void)
|
||||
{
|
||||
struct clk *gclk;
|
||||
struct clk *osc;
|
||||
|
||||
int ret;
|
||||
|
||||
/* setup smc for usbh */
|
||||
smc_set_timing(&isp1160_config, &isp1160_timing);
|
||||
ret = smc_set_configuration(2, &isp1160_config);
|
||||
|
||||
if (ret < 0) {
|
||||
printk(KERN_ERR
|
||||
"hammerhead: failed to set ISP1160 USBH timing\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* setup gclk0 to run from osc1 */
|
||||
gclk = clk_get(NULL, "gclk0");
|
||||
if (IS_ERR(gclk)) {
|
||||
ret = PTR_ERR(gclk);
|
||||
goto err_gclk;
|
||||
}
|
||||
|
||||
osc = clk_get(NULL, "osc1");
|
||||
if (IS_ERR(osc)) {
|
||||
ret = PTR_ERR(osc);
|
||||
goto err_osc;
|
||||
}
|
||||
|
||||
ret = clk_set_parent(gclk, osc);
|
||||
if (ret < 0) {
|
||||
pr_debug("hammerhead: failed to set osc1 for USBH clock\n");
|
||||
goto err_set_clk;
|
||||
}
|
||||
|
||||
/* set clock to 6MHz */
|
||||
clk_set_rate(gclk, 6000000);
|
||||
|
||||
/* and enable */
|
||||
clk_enable(gclk);
|
||||
|
||||
/* select GCLK0 peripheral function */
|
||||
at32_select_periph(GPIO_PIOA_BASE, HAMMERHEAD_USB_PERIPH_GCLK0,
|
||||
GPIO_PERIPH_A, 0);
|
||||
|
||||
/* enable CS2 peripheral function */
|
||||
at32_select_periph(GPIO_PIOE_BASE, HAMMERHEAD_USB_PERIPH_CS2,
|
||||
GPIO_PERIPH_A, 0);
|
||||
|
||||
/* H_WAKEUP must be driven low */
|
||||
at32_select_gpio(GPIO_PIN_PA(8), AT32_GPIOF_OUTPUT);
|
||||
|
||||
/* Select EXTINT0 for PB25 */
|
||||
at32_select_periph(GPIO_PIOB_BASE, HAMMERHEAD_USB_PERIPH_EXTINT0,
|
||||
GPIO_PERIPH_A, 0);
|
||||
|
||||
/* register usbh device driver */
|
||||
platform_device_register(&isp1160_device);
|
||||
|
||||
err_set_clk:
|
||||
clk_put(osc);
|
||||
err_osc:
|
||||
clk_put(gclk);
|
||||
err_gclk:
|
||||
return ret;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_BOARD_HAMMERHEAD_FPGA
|
||||
static struct smc_timing fpga_timing __initdata = {
|
||||
.ncs_read_setup = 16,
|
||||
.nrd_setup = 32,
|
||||
.ncs_read_pulse = 48,
|
||||
.nrd_pulse = 32,
|
||||
.read_cycle = 64,
|
||||
|
||||
.ncs_write_setup = 16,
|
||||
.nwe_setup = 16,
|
||||
.ncs_write_pulse = 32,
|
||||
.nwe_pulse = 32,
|
||||
.write_cycle = 64,
|
||||
};
|
||||
|
||||
static struct smc_config fpga_config __initdata = {
|
||||
.bus_width = 4,
|
||||
.nrd_controlled = 1,
|
||||
.nwe_controlled = 1,
|
||||
.byte_write = 0,
|
||||
};
|
||||
|
||||
static struct resource hh_fpga0_resource[] = {
|
||||
{
|
||||
.start = 0xffe00400,
|
||||
.end = 0xffe00400 + 0x3ff,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
.start = 4,
|
||||
.end = 4,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = 0x0c000000,
|
||||
.end = 0x0c000100,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
.start = 67,
|
||||
.end = 67,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
||||
static u64 hh_fpga0_dma_mask = DMA_BIT_MASK(32);
|
||||
static struct platform_device hh_fpga0_device = {
|
||||
.name = "hh_fpga",
|
||||
.id = 0,
|
||||
.dev = {
|
||||
.dma_mask = &hh_fpga0_dma_mask,
|
||||
.coherent_dma_mask = DMA_BIT_MASK(32),
|
||||
},
|
||||
.resource = hh_fpga0_resource,
|
||||
.num_resources = ARRAY_SIZE(hh_fpga0_resource),
|
||||
};
|
||||
|
||||
static struct clk hh_fpga0_spi_clk = {
|
||||
.name = "spi_clk",
|
||||
.dev = &hh_fpga0_device.dev,
|
||||
.mode = pba_clk_mode,
|
||||
.get_rate = pba_clk_get_rate,
|
||||
.index = 1,
|
||||
};
|
||||
|
||||
struct platform_device *__init at32_add_device_hh_fpga(void)
|
||||
{
|
||||
/* Select peripheral functionallity for SPI SCK and MOSI */
|
||||
at32_select_periph(GPIO_PIOB_BASE, HAMMERHEAD_FPGA_PERIPH_SCK,
|
||||
GPIO_PERIPH_B, 0);
|
||||
at32_select_periph(GPIO_PIOB_BASE, HAMMERHEAD_FPGA_PERIPH_MOSI,
|
||||
GPIO_PERIPH_B, 0);
|
||||
|
||||
/* reserve all other needed gpio
|
||||
* We have on board pull ups, so there is no need
|
||||
* to enable gpio pull ups */
|
||||
/* INIT_DONE (input) */
|
||||
at32_select_gpio(GPIO_PIN_PB(0), 0);
|
||||
|
||||
/* nSTATUS (input) */
|
||||
at32_select_gpio(GPIO_PIN_PB(2), 0);
|
||||
|
||||
/* nCONFIG (output, low) */
|
||||
at32_select_gpio(GPIO_PIN_PB(3), AT32_GPIOF_OUTPUT);
|
||||
|
||||
/* CONF_DONE (input) */
|
||||
at32_select_gpio(GPIO_PIN_PB(4), 0);
|
||||
|
||||
/* Select EXTINT3 for PB28 (Interrupt from FPGA) */
|
||||
at32_select_periph(GPIO_PIOB_BASE, HAMMERHEAD_FPGA_PERIPH_EXTINT3,
|
||||
GPIO_PERIPH_A, 0);
|
||||
|
||||
/* Get our parent clock */
|
||||
hh_fpga0_spi_clk.parent = clk_get(NULL, "pba");
|
||||
clk_put(hh_fpga0_spi_clk.parent);
|
||||
|
||||
/* Register clock in at32 clock tree */
|
||||
at32_clk_register(&hh_fpga0_spi_clk);
|
||||
|
||||
platform_device_register(&hh_fpga0_device);
|
||||
return &hh_fpga0_device;
|
||||
}
|
||||
#endif
|
||||
|
||||
/* This needs to be called after the SMC has been initialized */
|
||||
static int __init hammerhead_flash_init(void)
|
||||
{
|
||||
int ret;
|
||||
|
||||
smc_set_timing(&flash_config, &flash_timing);
|
||||
ret = smc_set_configuration(0, &flash_config);
|
||||
|
||||
if (ret < 0) {
|
||||
printk(KERN_ERR "hammerhead: failed to set NOR flash timing\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
platform_device_register(&flash_device);
|
||||
|
||||
#ifdef CONFIG_BOARD_HAMMERHEAD_USB
|
||||
hammerhead_usbh_init();
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_BOARD_HAMMERHEAD_FPGA
|
||||
/* Setup SMC for FPGA interface */
|
||||
smc_set_timing(&fpga_config, &fpga_timing);
|
||||
ret = smc_set_configuration(3, &fpga_config);
|
||||
#endif
|
||||
|
||||
|
||||
if (ret < 0) {
|
||||
printk(KERN_ERR "hammerhead: failed to set FPGA timing\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
device_initcall(hammerhead_flash_init);
|
|
@ -0,0 +1,6 @@
|
|||
#ifndef __BOARDS_HAMMERHEAD_FLASH_H
|
||||
#define __BOARDS_HAMMERHEAD_FLASH_H
|
||||
|
||||
struct platform_device *at32_add_device_hh_fpga(void);
|
||||
|
||||
#endif /* __BOARDS_HAMMERHEAD_FLASH_H */
|
|
@ -0,0 +1,247 @@
|
|||
/*
|
||||
* Board-specific setup code for the Miromico Hammerhead board
|
||||
*
|
||||
* Copyright (C) 2008 Miromico AG
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
#include <linux/atmel-mci.h>
|
||||
#include <linux/clk.h>
|
||||
#include <linux/fb.h>
|
||||
#include <linux/etherdevice.h>
|
||||
#include <linux/i2c.h>
|
||||
#include <linux/i2c-gpio.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/linkage.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/types.h>
|
||||
#include <linux/spi/spi.h>
|
||||
|
||||
#include <video/atmel_lcdc.h>
|
||||
|
||||
#include <linux/io.h>
|
||||
#include <asm/setup.h>
|
||||
|
||||
#include <mach/at32ap700x.h>
|
||||
#include <mach/board.h>
|
||||
#include <mach/init.h>
|
||||
#include <mach/portmux.h>
|
||||
|
||||
#include <sound/atmel-ac97c.h>
|
||||
|
||||
#include "../../mach-at32ap/clock.h"
|
||||
#include "flash.h"
|
||||
|
||||
/* Oscillator frequencies. These are board-specific */
|
||||
unsigned long at32_board_osc_rates[3] = {
|
||||
[0] = 32768, /* 32.768 kHz on RTC osc */
|
||||
[1] = 25000000, /* 25MHz on osc0 */
|
||||
[2] = 12000000, /* 12 MHz on osc1 */
|
||||
};
|
||||
|
||||
/* Initialized by bootloader-specific startup code. */
|
||||
struct tag *bootloader_tags __initdata;
|
||||
|
||||
#ifdef CONFIG_BOARD_HAMMERHEAD_LCD
|
||||
static struct fb_videomode __initdata hda350tlv_modes[] = {
|
||||
{
|
||||
.name = "320x240 @ 75",
|
||||
.refresh = 75,
|
||||
.xres = 320,
|
||||
.yres = 240,
|
||||
.pixclock = KHZ2PICOS(6891),
|
||||
|
||||
.left_margin = 48,
|
||||
.right_margin = 18,
|
||||
.upper_margin = 18,
|
||||
.lower_margin = 4,
|
||||
.hsync_len = 20,
|
||||
.vsync_len = 2,
|
||||
|
||||
.sync = 0,
|
||||
.vmode = FB_VMODE_NONINTERLACED,
|
||||
},
|
||||
};
|
||||
|
||||
static struct fb_monspecs __initdata hammerhead_hda350t_monspecs = {
|
||||
.manufacturer = "HAN",
|
||||
.monitor = "HDA350T-LV",
|
||||
.modedb = hda350tlv_modes,
|
||||
.modedb_len = ARRAY_SIZE(hda350tlv_modes),
|
||||
.hfmin = 14900,
|
||||
.hfmax = 22350,
|
||||
.vfmin = 60,
|
||||
.vfmax = 90,
|
||||
.dclkmax = 10000000,
|
||||
};
|
||||
|
||||
struct atmel_lcdfb_pdata __initdata hammerhead_lcdc_data = {
|
||||
.default_bpp = 24,
|
||||
.default_dmacon = ATMEL_LCDC_DMAEN | ATMEL_LCDC_DMA2DEN,
|
||||
.default_lcdcon2 = (ATMEL_LCDC_DISTYPE_TFT
|
||||
| ATMEL_LCDC_INVCLK
|
||||
| ATMEL_LCDC_CLKMOD_ALWAYSACTIVE
|
||||
| ATMEL_LCDC_MEMOR_BIG),
|
||||
.default_monspecs = &hammerhead_hda350t_monspecs,
|
||||
.guard_time = 2,
|
||||
};
|
||||
#endif
|
||||
|
||||
static struct mci_platform_data __initdata mci0_data = {
|
||||
.slot[0] = {
|
||||
.bus_width = 4,
|
||||
.detect_pin = -ENODEV,
|
||||
.wp_pin = -ENODEV,
|
||||
},
|
||||
};
|
||||
|
||||
struct eth_addr {
|
||||
u8 addr[6];
|
||||
};
|
||||
|
||||
static struct eth_addr __initdata hw_addr[1];
|
||||
static struct macb_platform_data __initdata eth_data[1];
|
||||
|
||||
/*
|
||||
* The next two functions should go away as the boot loader is
|
||||
* supposed to initialize the macb address registers with a valid
|
||||
* ethernet address. But we need to keep it around for a while until
|
||||
* we can be reasonably sure the boot loader does this.
|
||||
*
|
||||
* The phy_id is ignored as the driver will probe for it.
|
||||
*/
|
||||
static int __init parse_tag_ethernet(struct tag *tag)
|
||||
{
|
||||
int i = tag->u.ethernet.mac_index;
|
||||
|
||||
if (i < ARRAY_SIZE(hw_addr))
|
||||
memcpy(hw_addr[i].addr, tag->u.ethernet.hw_address,
|
||||
sizeof(hw_addr[i].addr));
|
||||
|
||||
return 0;
|
||||
}
|
||||
__tagtable(ATAG_ETHERNET, parse_tag_ethernet);
|
||||
|
||||
static void __init set_hw_addr(struct platform_device *pdev)
|
||||
{
|
||||
struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
const u8 *addr;
|
||||
void __iomem *regs;
|
||||
struct clk *pclk;
|
||||
|
||||
if (!res)
|
||||
return;
|
||||
|
||||
if (pdev->id >= ARRAY_SIZE(hw_addr))
|
||||
return;
|
||||
|
||||
addr = hw_addr[pdev->id].addr;
|
||||
|
||||
if (!is_valid_ether_addr(addr))
|
||||
return;
|
||||
|
||||
/*
|
||||
* Since this is board-specific code, we'll cheat and use the
|
||||
* physical address directly as we happen to know that it's
|
||||
* the same as the virtual address.
|
||||
*/
|
||||
regs = (void __iomem __force *)res->start;
|
||||
pclk = clk_get(&pdev->dev, "pclk");
|
||||
|
||||
if (IS_ERR(pclk))
|
||||
return;
|
||||
|
||||
clk_enable(pclk);
|
||||
|
||||
__raw_writel((addr[3] << 24) | (addr[2] << 16) | (addr[1] << 8) |
|
||||
addr[0], regs + 0x98);
|
||||
__raw_writel((addr[5] << 8) | addr[4], regs + 0x9c);
|
||||
|
||||
clk_disable(pclk);
|
||||
clk_put(pclk);
|
||||
}
|
||||
|
||||
void __init setup_board(void)
|
||||
{
|
||||
at32_map_usart(1, 0, 0); /* USART 1: /dev/ttyS0, DB9 */
|
||||
at32_setup_serial_console(0);
|
||||
}
|
||||
|
||||
static struct i2c_gpio_platform_data i2c_gpio_data = {
|
||||
.sda_pin = GPIO_PIN_PA(6),
|
||||
.scl_pin = GPIO_PIN_PA(7),
|
||||
.sda_is_open_drain = 1,
|
||||
.scl_is_open_drain = 1,
|
||||
.udelay = 2, /* close to 100 kHz */
|
||||
};
|
||||
|
||||
static struct platform_device i2c_gpio_device = {
|
||||
.name = "i2c-gpio",
|
||||
.id = 0,
|
||||
.dev = { .platform_data = &i2c_gpio_data, },
|
||||
};
|
||||
|
||||
static struct i2c_board_info __initdata i2c_info[] = {};
|
||||
|
||||
#ifdef CONFIG_BOARD_HAMMERHEAD_SND
|
||||
static struct ac97c_platform_data ac97c_data = {
|
||||
.reset_pin = GPIO_PIN_PA(16),
|
||||
};
|
||||
#endif
|
||||
|
||||
static int __init hammerhead_init(void)
|
||||
{
|
||||
/*
|
||||
* Hammerhead uses 32-bit SDRAM interface. Reserve the
|
||||
* SDRAM-specific pins so that nobody messes with them.
|
||||
*/
|
||||
at32_reserve_pin(GPIO_PIOE_BASE, ATMEL_EBI_PE_DATA_ALL);
|
||||
|
||||
at32_add_device_usart(0);
|
||||
|
||||
/* Reserve PB29 (GCLK3). This pin is used as clock source
|
||||
* for ETH PHY (25MHz). GCLK3 setup is done by U-Boot.
|
||||
*/
|
||||
at32_reserve_pin(GPIO_PIOB_BASE, (1<<29));
|
||||
|
||||
/*
|
||||
* Hammerhead uses only one ethernet port, so we don't set
|
||||
* address of second port
|
||||
*/
|
||||
set_hw_addr(at32_add_device_eth(0, ð_data[0]));
|
||||
|
||||
#ifdef CONFIG_BOARD_HAMMERHEAD_FPGA
|
||||
at32_add_device_hh_fpga();
|
||||
#endif
|
||||
at32_add_device_mci(0, &mci0_data);
|
||||
|
||||
#ifdef CONFIG_BOARD_HAMMERHEAD_USB
|
||||
at32_add_device_usba(0, NULL);
|
||||
#endif
|
||||
#ifdef CONFIG_BOARD_HAMMERHEAD_LCD
|
||||
at32_add_device_lcdc(0, &hammerhead_lcdc_data, fbmem_start,
|
||||
fbmem_size, ATMEL_LCDC_PRI_24BIT);
|
||||
#endif
|
||||
|
||||
at32_select_gpio(i2c_gpio_data.sda_pin,
|
||||
AT32_GPIOF_MULTIDRV | AT32_GPIOF_OUTPUT |
|
||||
AT32_GPIOF_HIGH);
|
||||
at32_select_gpio(i2c_gpio_data.scl_pin,
|
||||
AT32_GPIOF_MULTIDRV | AT32_GPIOF_OUTPUT |
|
||||
AT32_GPIOF_HIGH);
|
||||
platform_device_register(&i2c_gpio_device);
|
||||
i2c_register_board_info(0, i2c_info, ARRAY_SIZE(i2c_info));
|
||||
|
||||
#ifdef CONFIG_BOARD_HAMMERHEAD_SND
|
||||
at32_add_device_ac97c(0, &ac97c_data, AC97C_BOTH);
|
||||
#endif
|
||||
|
||||
/* Select the Touchscreen interrupt pin mode */
|
||||
at32_select_periph(GPIO_PIOB_BASE, 0x08000000, GPIO_PERIPH_A, 0);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
postcore_initcall(hammerhead_init);
|
|
@ -0,0 +1,5 @@
|
|||
# Merisc customization
|
||||
|
||||
if BOARD_MERISC
|
||||
|
||||
endif # BOARD_MERISC
|
|
@ -0,0 +1 @@
|
|||
obj-y += setup.o flash.o display.o merisc_sysfs.o
|
|
@ -0,0 +1,65 @@
|
|||
/*
|
||||
* Display setup code for the Merisc board
|
||||
*
|
||||
* Copyright (C) 2008 Martinsson Elektronik AB
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
#include <linux/init.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/fb.h>
|
||||
#include <video/atmel_lcdc.h>
|
||||
#include <asm/setup.h>
|
||||
#include <mach/board.h>
|
||||
#include "merisc.h"
|
||||
|
||||
static struct fb_videomode merisc_fb_videomode[] = {
|
||||
{
|
||||
.refresh = 44,
|
||||
.xres = 640,
|
||||
.yres = 480,
|
||||
.left_margin = 96,
|
||||
.right_margin = 96,
|
||||
.upper_margin = 34,
|
||||
.lower_margin = 8,
|
||||
.hsync_len = 64,
|
||||
.vsync_len = 64,
|
||||
.name = "640x480 @ 44",
|
||||
.pixclock = KHZ2PICOS(25180),
|
||||
.sync = 0,
|
||||
.vmode = FB_VMODE_NONINTERLACED,
|
||||
},
|
||||
};
|
||||
|
||||
static struct fb_monspecs merisc_fb_monspecs = {
|
||||
.manufacturer = "Kyo",
|
||||
.monitor = "TCG075VG2AD",
|
||||
.modedb = merisc_fb_videomode,
|
||||
.modedb_len = ARRAY_SIZE(merisc_fb_videomode),
|
||||
.hfmin = 30000,
|
||||
.hfmax = 33333,
|
||||
.vfmin = 60,
|
||||
.vfmax = 90,
|
||||
.dclkmax = 30000000,
|
||||
};
|
||||
|
||||
struct atmel_lcdfb_pdata merisc_lcdc_data = {
|
||||
.default_bpp = 24,
|
||||
.default_dmacon = ATMEL_LCDC_DMAEN | ATMEL_LCDC_DMA2DEN,
|
||||
.default_lcdcon2 = (ATMEL_LCDC_DISTYPE_TFT
|
||||
| ATMEL_LCDC_CLKMOD_ALWAYSACTIVE
|
||||
| ATMEL_LCDC_MEMOR_BIG),
|
||||
.default_monspecs = &merisc_fb_monspecs,
|
||||
.guard_time = 2,
|
||||
};
|
||||
|
||||
static int __init merisc_display_init(void)
|
||||
{
|
||||
at32_add_device_lcdc(0, &merisc_lcdc_data, fbmem_start,
|
||||
fbmem_size, 0);
|
||||
|
||||
return 0;
|
||||
}
|
||||
device_initcall(merisc_display_init);
|
|
@ -0,0 +1,139 @@
|
|||
/*
|
||||
* Merisc board-specific flash initialization
|
||||
*
|
||||
* Copyright (C) 2008 Martinsson Elektronik AB
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
#include <linux/init.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/mtd/mtd.h>
|
||||
#include <linux/mtd/partitions.h>
|
||||
#include <linux/mtd/physmap.h>
|
||||
#include <mach/smc.h>
|
||||
|
||||
/* Will be translated to units of 14.3 ns, rounded up */
|
||||
static struct smc_timing flash_timing __initdata = {
|
||||
.ncs_read_setup = 1 * 14,
|
||||
.nrd_setup = 5 * 14,
|
||||
.ncs_write_setup = 1 * 14,
|
||||
.nwe_setup = 2 * 14,
|
||||
|
||||
.ncs_read_pulse = 12 * 14,
|
||||
.nrd_pulse = 7 * 14,
|
||||
.ncs_write_pulse = 8 * 14,
|
||||
.nwe_pulse = 4 * 14,
|
||||
|
||||
.read_cycle = 14 * 14,
|
||||
.write_cycle = 10 * 14,
|
||||
};
|
||||
|
||||
static struct smc_config flash_config __initdata = {
|
||||
.bus_width = 2,
|
||||
.nrd_controlled = 1,
|
||||
.nwe_controlled = 1,
|
||||
.byte_write = 1,
|
||||
.tdf_cycles = 3,
|
||||
};
|
||||
|
||||
static struct mtd_partition flash_0_parts[] = {
|
||||
{
|
||||
.name = "boot",
|
||||
.offset = 0x00000000,
|
||||
.size = 0x00060000,
|
||||
.mask_flags = 0,
|
||||
},
|
||||
{
|
||||
.name = "kernel",
|
||||
.offset = 0x00060000,
|
||||
.size = 0x00200000,
|
||||
.mask_flags = 0,
|
||||
},
|
||||
{
|
||||
.name = "root",
|
||||
.offset = 0x00260000,
|
||||
.size = MTDPART_SIZ_FULL,
|
||||
.mask_flags = 0,
|
||||
},
|
||||
};
|
||||
|
||||
static struct mtd_partition flash_1_parts[] = {
|
||||
{
|
||||
.name = "2ndflash",
|
||||
.offset = 0x00000000,
|
||||
.size = MTDPART_SIZ_FULL,
|
||||
.mask_flags = 0,
|
||||
},
|
||||
};
|
||||
|
||||
static struct physmap_flash_data flash_data[] = {
|
||||
{
|
||||
.width = 2,
|
||||
.nr_parts = ARRAY_SIZE(flash_0_parts),
|
||||
.parts = flash_0_parts,
|
||||
},
|
||||
{
|
||||
.width = 2,
|
||||
.nr_parts = ARRAY_SIZE(flash_1_parts),
|
||||
.parts = flash_1_parts,
|
||||
}
|
||||
};
|
||||
|
||||
static struct resource flash_resource[] = {
|
||||
{
|
||||
.start = 0x00000000,
|
||||
.end = 0x03ffffff,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
.start = 0x04000000,
|
||||
.end = 0x07ffffff,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
};
|
||||
|
||||
static struct platform_device flash_device[] = {
|
||||
{
|
||||
.name = "physmap-flash",
|
||||
.id = 0,
|
||||
.resource = &flash_resource[0],
|
||||
.num_resources = 1,
|
||||
.dev = {
|
||||
.platform_data = &flash_data[0],
|
||||
},
|
||||
},
|
||||
{
|
||||
.name = "physmap-flash",
|
||||
.id = 1,
|
||||
.resource = &flash_resource[1],
|
||||
.num_resources = 1,
|
||||
.dev = {
|
||||
.platform_data = &flash_data[1],
|
||||
},
|
||||
},
|
||||
};
|
||||
|
||||
static int __init merisc_flash_init(void)
|
||||
{
|
||||
int ret;
|
||||
smc_set_timing(&flash_config, &flash_timing);
|
||||
|
||||
ret = smc_set_configuration(0, &flash_config);
|
||||
if (ret < 0) {
|
||||
printk(KERN_ERR "Merisc: failed to set NOR flash timing #0\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = smc_set_configuration(4, &flash_config);
|
||||
if (ret < 0) {
|
||||
printk(KERN_ERR "Merisc: failed to set NOR flash timing #1\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
platform_device_register(&flash_device[0]);
|
||||
platform_device_register(&flash_device[1]);
|
||||
return 0;
|
||||
}
|
||||
device_initcall(merisc_flash_init);
|
|
@ -0,0 +1,18 @@
|
|||
/*
|
||||
* Merisc exports
|
||||
*
|
||||
* Copyright (C) 2008 Martinsson Elektronik AB
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
#ifndef __ARCH_AVR32_BOARDS_MERISC_MERISC_H
|
||||
#define __ARCH_AVR32_BOARDS_MERISC_MERISC_H
|
||||
|
||||
const char *merisc_revision(void);
|
||||
const char *merisc_model(void);
|
||||
|
||||
extern struct class merisc_class;
|
||||
|
||||
#endif /* __ARCH_AVR32_BOARDS_MERISC_MERISC_H */
|
|
@ -0,0 +1,64 @@
|
|||
/*
|
||||
* Merisc sysfs exports
|
||||
*
|
||||
* Copyright (C) 2008 Martinsson Elektronik AB
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
#include <linux/module.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/list.h>
|
||||
#include <linux/spinlock.h>
|
||||
#include <linux/device.h>
|
||||
#include <linux/timer.h>
|
||||
#include <linux/err.h>
|
||||
#include <linux/ctype.h>
|
||||
#include "merisc.h"
|
||||
|
||||
static ssize_t merisc_model_show(struct class *class, char *buf)
|
||||
{
|
||||
ssize_t ret = 0;
|
||||
|
||||
sprintf(buf, "%s\n", merisc_model());
|
||||
ret = strlen(buf) + 1;
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static ssize_t merisc_revision_show(struct class *class, char *buf)
|
||||
{
|
||||
ssize_t ret = 0;
|
||||
|
||||
sprintf(buf, "%s\n", merisc_revision());
|
||||
ret = strlen(buf) + 1;
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static struct class_attribute merisc_class_attrs[] = {
|
||||
__ATTR(model, S_IRUGO, merisc_model_show, NULL),
|
||||
__ATTR(revision, S_IRUGO, merisc_revision_show, NULL),
|
||||
__ATTR_NULL,
|
||||
};
|
||||
|
||||
struct class merisc_class = {
|
||||
.name = "merisc",
|
||||
.owner = THIS_MODULE,
|
||||
.class_attrs = merisc_class_attrs,
|
||||
};
|
||||
|
||||
static int __init merisc_sysfs_init(void)
|
||||
{
|
||||
int status;
|
||||
|
||||
status = class_register(&merisc_class);
|
||||
if (status < 0)
|
||||
return status;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
postcore_initcall(merisc_sysfs_init);
|
|
@ -0,0 +1,306 @@
|
|||
/*
|
||||
* Board-specific setup code for the Merisc
|
||||
*
|
||||
* Copyright (C) 2008 Martinsson Elektronik AB
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
#include <linux/clk.h>
|
||||
#include <linux/etherdevice.h>
|
||||
#include <linux/i2c.h>
|
||||
#include <linux/i2c-gpio.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/linkage.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/types.h>
|
||||
#include <linux/leds.h>
|
||||
#include <linux/spi/spi.h>
|
||||
#include <linux/spi/ads7846.h>
|
||||
#include <linux/irq.h>
|
||||
#include <linux/fb.h>
|
||||
#include <linux/atmel-mci.h>
|
||||
#include <linux/pwm.h>
|
||||
#include <linux/leds_pwm.h>
|
||||
|
||||
#include <asm/io.h>
|
||||
#include <asm/setup.h>
|
||||
#include <asm/gpio.h>
|
||||
|
||||
#include <mach/at32ap700x.h>
|
||||
#include <mach/board.h>
|
||||
#include <mach/init.h>
|
||||
#include <mach/portmux.h>
|
||||
|
||||
#include "merisc.h"
|
||||
|
||||
/* Holds the autodetected board model and revision */
|
||||
static int merisc_board_id;
|
||||
|
||||
/* Initialized by bootloader-specific startup code. */
|
||||
struct tag *bootloader_tags __initdata;
|
||||
|
||||
/* Oscillator frequencies. These are board specific */
|
||||
unsigned long at32_board_osc_rates[3] = {
|
||||
[0] = 32768, /* 32.768 kHz on RTC osc */
|
||||
[1] = 20000000, /* 20 MHz on osc0 */
|
||||
[2] = 12000000, /* 12 MHz on osc1 */
|
||||
};
|
||||
|
||||
struct eth_addr {
|
||||
u8 addr[6];
|
||||
};
|
||||
|
||||
static struct eth_addr __initdata hw_addr[2];
|
||||
static struct macb_platform_data __initdata eth_data[2];
|
||||
|
||||
static int ads7846_get_pendown_state_PB26(void)
|
||||
{
|
||||
return !gpio_get_value(GPIO_PIN_PB(26));
|
||||
}
|
||||
|
||||
static int ads7846_get_pendown_state_PB28(void)
|
||||
{
|
||||
return !gpio_get_value(GPIO_PIN_PB(28));
|
||||
}
|
||||
|
||||
static struct ads7846_platform_data __initdata ads7846_data = {
|
||||
.model = 7846,
|
||||
.vref_delay_usecs = 100,
|
||||
.vref_mv = 0,
|
||||
.keep_vref_on = 0,
|
||||
.settle_delay_usecs = 150,
|
||||
.penirq_recheck_delay_usecs = 1,
|
||||
.x_plate_ohms = 800,
|
||||
.debounce_rep = 4,
|
||||
.debounce_max = 10,
|
||||
.debounce_tol = 50,
|
||||
.get_pendown_state = ads7846_get_pendown_state_PB26,
|
||||
.filter_init = NULL,
|
||||
.filter = NULL,
|
||||
.filter_cleanup = NULL,
|
||||
};
|
||||
|
||||
static struct spi_board_info __initdata spi0_board_info[] = {
|
||||
{
|
||||
.modalias = "ads7846",
|
||||
.max_speed_hz = 3250000,
|
||||
.chip_select = 0,
|
||||
.bus_num = 0,
|
||||
.platform_data = &ads7846_data,
|
||||
.mode = SPI_MODE_0,
|
||||
},
|
||||
};
|
||||
|
||||
static struct mci_platform_data __initdata mci0_data = {
|
||||
.slot[0] = {
|
||||
.bus_width = 4,
|
||||
.detect_pin = GPIO_PIN_PE(19),
|
||||
.wp_pin = GPIO_PIN_PE(20),
|
||||
.detect_is_active_high = true,
|
||||
},
|
||||
};
|
||||
|
||||
static int __init parse_tag_ethernet(struct tag *tag)
|
||||
{
|
||||
int i;
|
||||
|
||||
i = tag->u.ethernet.mac_index;
|
||||
if (i < ARRAY_SIZE(hw_addr)) {
|
||||
memcpy(hw_addr[i].addr, tag->u.ethernet.hw_address,
|
||||
sizeof(hw_addr[i].addr));
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
__tagtable(ATAG_ETHERNET, parse_tag_ethernet);
|
||||
|
||||
static void __init set_hw_addr(struct platform_device *pdev)
|
||||
{
|
||||
struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
const u8 *addr;
|
||||
void __iomem *regs;
|
||||
struct clk *pclk;
|
||||
|
||||
if (!res)
|
||||
return;
|
||||
|
||||
if (pdev->id >= ARRAY_SIZE(hw_addr))
|
||||
return;
|
||||
|
||||
addr = hw_addr[pdev->id].addr;
|
||||
if (!is_valid_ether_addr(addr))
|
||||
return;
|
||||
|
||||
regs = (void __iomem __force *)res->start;
|
||||
pclk = clk_get(&pdev->dev, "pclk");
|
||||
if (IS_ERR(pclk))
|
||||
return;
|
||||
|
||||
clk_enable(pclk);
|
||||
__raw_writel((addr[3] << 24) | (addr[2] << 16)
|
||||
| (addr[1] << 8) | addr[0], regs + 0x98);
|
||||
__raw_writel((addr[5] << 8) | addr[4], regs + 0x9c);
|
||||
clk_disable(pclk);
|
||||
clk_put(pclk);
|
||||
}
|
||||
|
||||
static struct i2c_gpio_platform_data i2c_gpio_data = {
|
||||
.sda_pin = GPIO_PIN_PA(6),
|
||||
.scl_pin = GPIO_PIN_PA(7),
|
||||
.sda_is_open_drain = 1,
|
||||
.scl_is_open_drain = 1,
|
||||
.udelay = 2,
|
||||
};
|
||||
|
||||
static struct platform_device i2c_gpio_device = {
|
||||
.name = "i2c-gpio",
|
||||
.id = 0,
|
||||
.dev = {
|
||||
.platform_data = &i2c_gpio_data,
|
||||
},
|
||||
};
|
||||
|
||||
static struct i2c_board_info __initdata i2c_info[] = {
|
||||
{
|
||||
I2C_BOARD_INFO("pcf8563", 0x51)
|
||||
},
|
||||
};
|
||||
|
||||
#if IS_ENABLED(CONFIG_LEDS_PWM)
|
||||
static struct pwm_lookup pwm_lookup[] = {
|
||||
PWM_LOOKUP("at91sam9rl-pwm", 0, "leds_pwm", "backlight",
|
||||
5000, PWM_POLARITY_NORMAL),
|
||||
};
|
||||
|
||||
static struct led_pwm pwm_leds[] = {
|
||||
{
|
||||
.name = "backlight",
|
||||
.max_brightness = 255,
|
||||
},
|
||||
};
|
||||
|
||||
static struct led_pwm_platform_data pwm_data = {
|
||||
.num_leds = ARRAY_SIZE(pwm_leds),
|
||||
.leds = pwm_leds,
|
||||
};
|
||||
|
||||
static struct platform_device leds_pwm = {
|
||||
.name = "leds_pwm",
|
||||
.id = -1,
|
||||
.dev = {
|
||||
.platform_data = &pwm_data,
|
||||
},
|
||||
};
|
||||
#endif
|
||||
|
||||
const char *merisc_model(void)
|
||||
{
|
||||
switch (merisc_board_id) {
|
||||
case 0:
|
||||
case 1:
|
||||
return "500-01";
|
||||
case 2:
|
||||
return "BT";
|
||||
default:
|
||||
return "Unknown";
|
||||
}
|
||||
}
|
||||
|
||||
const char *merisc_revision(void)
|
||||
{
|
||||
switch (merisc_board_id) {
|
||||
case 0:
|
||||
return "B";
|
||||
case 1:
|
||||
return "D";
|
||||
case 2:
|
||||
return "A";
|
||||
default:
|
||||
return "Unknown";
|
||||
}
|
||||
}
|
||||
|
||||
static void detect_merisc_board_id(void)
|
||||
{
|
||||
/* Board ID pins MUST be set as input or the board may be damaged */
|
||||
at32_select_gpio(GPIO_PIN_PA(24), AT32_GPIOF_PULLUP);
|
||||
at32_select_gpio(GPIO_PIN_PA(25), AT32_GPIOF_PULLUP);
|
||||
at32_select_gpio(GPIO_PIN_PA(26), AT32_GPIOF_PULLUP);
|
||||
at32_select_gpio(GPIO_PIN_PA(27), AT32_GPIOF_PULLUP);
|
||||
|
||||
merisc_board_id = !gpio_get_value(GPIO_PIN_PA(24)) +
|
||||
!gpio_get_value(GPIO_PIN_PA(25)) * 2 +
|
||||
!gpio_get_value(GPIO_PIN_PA(26)) * 4 +
|
||||
!gpio_get_value(GPIO_PIN_PA(27)) * 8;
|
||||
}
|
||||
|
||||
void __init setup_board(void)
|
||||
{
|
||||
at32_map_usart(0, 0, 0);
|
||||
at32_map_usart(1, 1, 0);
|
||||
at32_map_usart(3, 3, 0);
|
||||
at32_setup_serial_console(1);
|
||||
}
|
||||
|
||||
static int __init merisc_init(void)
|
||||
{
|
||||
detect_merisc_board_id();
|
||||
|
||||
printk(KERN_NOTICE "BOARD: Merisc %s revision %s\n", merisc_model(),
|
||||
merisc_revision());
|
||||
|
||||
/* Reserve pins for SDRAM */
|
||||
at32_reserve_pin(GPIO_PIOE_BASE, ATMEL_EBI_PE_DATA_ALL | (1 << 26));
|
||||
|
||||
if (merisc_board_id >= 1)
|
||||
at32_map_usart(2, 2, 0);
|
||||
|
||||
at32_add_device_usart(0);
|
||||
at32_add_device_usart(1);
|
||||
if (merisc_board_id >= 1)
|
||||
at32_add_device_usart(2);
|
||||
at32_add_device_usart(3);
|
||||
set_hw_addr(at32_add_device_eth(0, ð_data[0]));
|
||||
|
||||
/* ADS7846 PENIRQ */
|
||||
if (merisc_board_id == 0) {
|
||||
ads7846_data.get_pendown_state = ads7846_get_pendown_state_PB26;
|
||||
at32_select_periph(GPIO_PIOB_BASE, 1 << 26,
|
||||
GPIO_PERIPH_A, AT32_GPIOF_PULLUP);
|
||||
spi0_board_info[0].irq = AT32_EXTINT(1);
|
||||
} else {
|
||||
ads7846_data.get_pendown_state = ads7846_get_pendown_state_PB28;
|
||||
at32_select_periph(GPIO_PIOB_BASE, 1 << 28, GPIO_PERIPH_A,
|
||||
AT32_GPIOF_PULLUP);
|
||||
spi0_board_info[0].irq = AT32_EXTINT(3);
|
||||
}
|
||||
|
||||
/* ADS7846 busy pin */
|
||||
at32_select_gpio(GPIO_PIN_PA(4), AT32_GPIOF_PULLUP);
|
||||
|
||||
at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
|
||||
|
||||
at32_add_device_mci(0, &mci0_data);
|
||||
|
||||
#if IS_ENABLED(CONFIG_LEDS_PWM)
|
||||
pwm_add_table(pwm_lookup, ARRAY_SIZE(pwm_lookup));
|
||||
at32_add_device_pwm((1 << 0) | (1 << 2));
|
||||
platform_device_register(&leds_pwm);
|
||||
#else
|
||||
at32_add_device_pwm((1 << 2));
|
||||
#endif
|
||||
|
||||
at32_select_gpio(i2c_gpio_data.sda_pin,
|
||||
AT32_GPIOF_MULTIDRV | AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH);
|
||||
at32_select_gpio(i2c_gpio_data.scl_pin,
|
||||
AT32_GPIOF_MULTIDRV | AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH);
|
||||
platform_device_register(&i2c_gpio_device);
|
||||
|
||||
i2c_register_board_info(0, i2c_info, ARRAY_SIZE(i2c_info));
|
||||
|
||||
return 0;
|
||||
}
|
||||
postcore_initcall(merisc_init);
|
|
@ -0,0 +1 @@
|
|||
obj-y += setup.o flash.o
|
|
@ -0,0 +1,143 @@
|
|||
/*
|
||||
* MIMC200 board-specific flash initialization
|
||||
*
|
||||
* Copyright (C) 2008 Mercury IMC Ltd
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
#include <linux/init.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/mtd/mtd.h>
|
||||
#include <linux/mtd/partitions.h>
|
||||
#include <linux/mtd/physmap.h>
|
||||
|
||||
#include <mach/smc.h>
|
||||
|
||||
static struct smc_timing flash_timing __initdata = {
|
||||
.ncs_read_setup = 0,
|
||||
.nrd_setup = 15,
|
||||
.ncs_write_setup = 0,
|
||||
.nwe_setup = 0,
|
||||
|
||||
.ncs_read_pulse = 115,
|
||||
.nrd_pulse = 110,
|
||||
.ncs_write_pulse = 60,
|
||||
.nwe_pulse = 60,
|
||||
|
||||
.read_cycle = 115,
|
||||
.write_cycle = 100,
|
||||
};
|
||||
|
||||
static struct smc_config flash_config __initdata = {
|
||||
.bus_width = 2,
|
||||
.nrd_controlled = 1,
|
||||
.nwe_controlled = 1,
|
||||
.byte_write = 1,
|
||||
};
|
||||
|
||||
/* system flash definition */
|
||||
|
||||
static struct mtd_partition flash_parts_system[] = {
|
||||
{
|
||||
.name = "u-boot",
|
||||
.offset = 0x00000000,
|
||||
.size = 0x00020000, /* 128 KiB */
|
||||
.mask_flags = MTD_WRITEABLE,
|
||||
},
|
||||
{
|
||||
.name = "root",
|
||||
.offset = 0x00020000,
|
||||
.size = 0x007c0000,
|
||||
},
|
||||
{
|
||||
.name = "splash",
|
||||
.offset = 0x007e0000,
|
||||
.size = 0x00010000, /* 64KiB */
|
||||
},
|
||||
{
|
||||
.name = "env",
|
||||
.offset = 0x007f0000,
|
||||
.size = 0x00010000,
|
||||
.mask_flags = MTD_WRITEABLE,
|
||||
},
|
||||
};
|
||||
|
||||
static struct physmap_flash_data flash_system = {
|
||||
.width = 2,
|
||||
.nr_parts = ARRAY_SIZE(flash_parts_system),
|
||||
.parts = flash_parts_system,
|
||||
};
|
||||
|
||||
static struct resource flash_resource_system = {
|
||||
.start = 0x00000000,
|
||||
.end = 0x007fffff,
|
||||
.flags = IORESOURCE_MEM,
|
||||
};
|
||||
|
||||
static struct platform_device flash_device_system = {
|
||||
.name = "physmap-flash",
|
||||
.id = 0,
|
||||
.resource = &flash_resource_system,
|
||||
.num_resources = 1,
|
||||
.dev = {
|
||||
.platform_data = &flash_system,
|
||||
},
|
||||
};
|
||||
|
||||
/* data flash definition */
|
||||
|
||||
static struct mtd_partition flash_parts_data[] = {
|
||||
{
|
||||
.name = "data",
|
||||
.offset = 0x00000000,
|
||||
.size = 0x00800000,
|
||||
},
|
||||
};
|
||||
|
||||
static struct physmap_flash_data flash_data = {
|
||||
.width = 2,
|
||||
.nr_parts = ARRAY_SIZE(flash_parts_data),
|
||||
.parts = flash_parts_data,
|
||||
};
|
||||
|
||||
static struct resource flash_resource_data = {
|
||||
.start = 0x08000000,
|
||||
.end = 0x087fffff,
|
||||
.flags = IORESOURCE_MEM,
|
||||
};
|
||||
|
||||
static struct platform_device flash_device_data = {
|
||||
.name = "physmap-flash",
|
||||
.id = 1,
|
||||
.resource = &flash_resource_data,
|
||||
.num_resources = 1,
|
||||
.dev = {
|
||||
.platform_data = &flash_data,
|
||||
},
|
||||
};
|
||||
|
||||
/* This needs to be called after the SMC has been initialized */
|
||||
static int __init mimc200_flash_init(void)
|
||||
{
|
||||
int ret;
|
||||
|
||||
smc_set_timing(&flash_config, &flash_timing);
|
||||
ret = smc_set_configuration(0, &flash_config);
|
||||
if (ret < 0) {
|
||||
printk(KERN_ERR "mimc200: failed to set 'System' NOR flash timing\n");
|
||||
return ret;
|
||||
}
|
||||
ret = smc_set_configuration(1, &flash_config);
|
||||
if (ret < 0) {
|
||||
printk(KERN_ERR "mimc200: failed to set 'Data' NOR flash timing\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
platform_device_register(&flash_device_system);
|
||||
platform_device_register(&flash_device_data);
|
||||
|
||||
return 0;
|
||||
}
|
||||
device_initcall(mimc200_flash_init);
|
|
@ -0,0 +1,236 @@
|
|||
/*
|
||||
* Board-specific setup code for the MIMC200
|
||||
*
|
||||
* Copyright (C) 2008 Mercury IMC Ltd
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
extern struct atmel_lcdfb_pdata mimc200_lcdc_data;
|
||||
|
||||
#include <linux/clk.h>
|
||||
#include <linux/etherdevice.h>
|
||||
#include <linux/i2c-gpio.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/linkage.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/types.h>
|
||||
#include <linux/leds.h>
|
||||
#include <linux/spi/spi.h>
|
||||
#include <linux/spi/eeprom.h>
|
||||
|
||||
#include <video/atmel_lcdc.h>
|
||||
#include <linux/fb.h>
|
||||
|
||||
#include <linux/atmel-mci.h>
|
||||
#include <linux/io.h>
|
||||
#include <asm/setup.h>
|
||||
|
||||
#include <mach/at32ap700x.h>
|
||||
#include <mach/board.h>
|
||||
#include <mach/init.h>
|
||||
#include <mach/portmux.h>
|
||||
|
||||
/* Oscillator frequencies. These are board-specific */
|
||||
unsigned long at32_board_osc_rates[3] = {
|
||||
[0] = 32768, /* 32.768 kHz on RTC osc */
|
||||
[1] = 10000000, /* 10 MHz on osc0 */
|
||||
[2] = 12000000, /* 12 MHz on osc1 */
|
||||
};
|
||||
|
||||
/* Initialized by bootloader-specific startup code. */
|
||||
struct tag *bootloader_tags __initdata;
|
||||
|
||||
static struct fb_videomode __initdata pt0434827_modes[] = {
|
||||
{
|
||||
.name = "480x272 @ 72",
|
||||
.refresh = 72,
|
||||
.xres = 480, .yres = 272,
|
||||
.pixclock = KHZ2PICOS(10000),
|
||||
|
||||
.left_margin = 1, .right_margin = 1,
|
||||
.upper_margin = 12, .lower_margin = 1,
|
||||
.hsync_len = 42, .vsync_len = 1,
|
||||
|
||||
.sync = 0,
|
||||
.vmode = FB_VMODE_NONINTERLACED,
|
||||
},
|
||||
};
|
||||
|
||||
static struct fb_monspecs __initdata mimc200_default_monspecs = {
|
||||
.manufacturer = "PT",
|
||||
.monitor = "PT0434827-A401",
|
||||
.modedb = pt0434827_modes,
|
||||
.modedb_len = ARRAY_SIZE(pt0434827_modes),
|
||||
.hfmin = 14820,
|
||||
.hfmax = 22230,
|
||||
.vfmin = 60,
|
||||
.vfmax = 85,
|
||||
.dclkmax = 25200000,
|
||||
};
|
||||
|
||||
struct atmel_lcdfb_pdata __initdata mimc200_lcdc_data = {
|
||||
.default_bpp = 16,
|
||||
.default_dmacon = ATMEL_LCDC_DMAEN | ATMEL_LCDC_DMA2DEN,
|
||||
.default_lcdcon2 = (ATMEL_LCDC_DISTYPE_TFT
|
||||
| ATMEL_LCDC_INVCLK
|
||||
| ATMEL_LCDC_CLKMOD_ALWAYSACTIVE
|
||||
| ATMEL_LCDC_MEMOR_BIG),
|
||||
.default_monspecs = &mimc200_default_monspecs,
|
||||
.guard_time = 2,
|
||||
};
|
||||
|
||||
struct eth_addr {
|
||||
u8 addr[6];
|
||||
};
|
||||
static struct eth_addr __initdata hw_addr[2];
|
||||
static struct macb_platform_data __initdata eth_data[2];
|
||||
|
||||
static struct spi_eeprom eeprom_25lc010 = {
|
||||
.name = "25lc010",
|
||||
.byte_len = 128,
|
||||
.page_size = 16,
|
||||
.flags = EE_ADDR1,
|
||||
};
|
||||
|
||||
static struct spi_board_info spi0_board_info[] __initdata = {
|
||||
{
|
||||
.modalias = "rtc-ds1390",
|
||||
.max_speed_hz = 4000000,
|
||||
.chip_select = 2,
|
||||
},
|
||||
{
|
||||
.modalias = "at25",
|
||||
.max_speed_hz = 1000000,
|
||||
.chip_select = 1,
|
||||
.mode = SPI_MODE_3,
|
||||
.platform_data = &eeprom_25lc010,
|
||||
},
|
||||
};
|
||||
|
||||
static struct mci_platform_data __initdata mci0_data = {
|
||||
.slot[0] = {
|
||||
.bus_width = 4,
|
||||
.detect_pin = GPIO_PIN_PA(26),
|
||||
.wp_pin = GPIO_PIN_PA(27),
|
||||
},
|
||||
};
|
||||
|
||||
/*
|
||||
* The next two functions should go away as the boot loader is
|
||||
* supposed to initialize the macb address registers with a valid
|
||||
* ethernet address. But we need to keep it around for a while until
|
||||
* we can be reasonably sure the boot loader does this.
|
||||
*
|
||||
* The phy_id is ignored as the driver will probe for it.
|
||||
*/
|
||||
static int __init parse_tag_ethernet(struct tag *tag)
|
||||
{
|
||||
int i;
|
||||
|
||||
i = tag->u.ethernet.mac_index;
|
||||
if (i < ARRAY_SIZE(hw_addr))
|
||||
memcpy(hw_addr[i].addr, tag->u.ethernet.hw_address,
|
||||
sizeof(hw_addr[i].addr));
|
||||
|
||||
return 0;
|
||||
}
|
||||
__tagtable(ATAG_ETHERNET, parse_tag_ethernet);
|
||||
|
||||
static void __init set_hw_addr(struct platform_device *pdev)
|
||||
{
|
||||
struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
const u8 *addr;
|
||||
void __iomem *regs;
|
||||
struct clk *pclk;
|
||||
|
||||
if (!res)
|
||||
return;
|
||||
if (pdev->id >= ARRAY_SIZE(hw_addr))
|
||||
return;
|
||||
|
||||
addr = hw_addr[pdev->id].addr;
|
||||
if (!is_valid_ether_addr(addr))
|
||||
return;
|
||||
|
||||
/*
|
||||
* Since this is board-specific code, we'll cheat and use the
|
||||
* physical address directly as we happen to know that it's
|
||||
* the same as the virtual address.
|
||||
*/
|
||||
regs = (void __iomem __force *)res->start;
|
||||
pclk = clk_get(&pdev->dev, "pclk");
|
||||
if (IS_ERR(pclk))
|
||||
return;
|
||||
|
||||
clk_enable(pclk);
|
||||
__raw_writel((addr[3] << 24) | (addr[2] << 16)
|
||||
| (addr[1] << 8) | addr[0], regs + 0x98);
|
||||
__raw_writel((addr[5] << 8) | addr[4], regs + 0x9c);
|
||||
clk_disable(pclk);
|
||||
clk_put(pclk);
|
||||
}
|
||||
|
||||
void __init setup_board(void)
|
||||
{
|
||||
at32_map_usart(0, 0, 0); /* USART 0: /dev/ttyS0 (TTL --> Altera) */
|
||||
at32_map_usart(1, 1, 0); /* USART 1: /dev/ttyS1 (RS232) */
|
||||
at32_map_usart(2, 2, 0); /* USART 2: /dev/ttyS2 (RS485) */
|
||||
at32_map_usart(3, 3, 0); /* USART 3: /dev/ttyS3 (RS422 Multidrop) */
|
||||
}
|
||||
|
||||
static struct i2c_gpio_platform_data i2c_gpio_data = {
|
||||
.sda_pin = GPIO_PIN_PA(6),
|
||||
.scl_pin = GPIO_PIN_PA(7),
|
||||
.sda_is_open_drain = 1,
|
||||
.scl_is_open_drain = 1,
|
||||
.udelay = 2, /* close to 100 kHz */
|
||||
};
|
||||
|
||||
static struct platform_device i2c_gpio_device = {
|
||||
.name = "i2c-gpio",
|
||||
.id = 0,
|
||||
.dev = {
|
||||
.platform_data = &i2c_gpio_data,
|
||||
},
|
||||
};
|
||||
|
||||
static struct i2c_board_info __initdata i2c_info[] = {
|
||||
};
|
||||
|
||||
static int __init mimc200_init(void)
|
||||
{
|
||||
/*
|
||||
* MIMC200 uses 16-bit SDRAM interface, so we don't need to
|
||||
* reserve any pins for it.
|
||||
*/
|
||||
|
||||
at32_add_device_usart(0);
|
||||
at32_add_device_usart(1);
|
||||
at32_add_device_usart(2);
|
||||
at32_add_device_usart(3);
|
||||
|
||||
set_hw_addr(at32_add_device_eth(0, ð_data[0]));
|
||||
set_hw_addr(at32_add_device_eth(1, ð_data[1]));
|
||||
|
||||
at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
|
||||
at32_add_device_mci(0, &mci0_data);
|
||||
at32_add_device_usba(0, NULL);
|
||||
|
||||
at32_select_periph(GPIO_PIOB_BASE, 1 << 28, 0, AT32_GPIOF_PULLUP);
|
||||
at32_select_gpio(i2c_gpio_data.sda_pin,
|
||||
AT32_GPIOF_MULTIDRV | AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH);
|
||||
at32_select_gpio(i2c_gpio_data.scl_pin,
|
||||
AT32_GPIOF_MULTIDRV | AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH);
|
||||
platform_device_register(&i2c_gpio_device);
|
||||
i2c_register_board_info(0, i2c_info, ARRAY_SIZE(i2c_info));
|
||||
|
||||
at32_add_device_lcdc(0, &mimc200_lcdc_data,
|
||||
fbmem_start, fbmem_size,
|
||||
ATMEL_LCDC_CONTROL | ATMEL_LCDC_ALT_CONTROL | ATMEL_LCDC_ALT_24B_DATA);
|
||||
|
||||
return 0;
|
||||
}
|
||||
postcore_initcall(mimc200_init);
|
|
@ -0,0 +1,57 @@
|
|||
#
|
||||
# Copyright (C) 2004-2006 Atmel Corporation
|
||||
#
|
||||
# This file is subject to the terms and conditions of the GNU General Public
|
||||
# License. See the file "COPYING" in the main directory of this archive
|
||||
# for more details.
|
||||
#
|
||||
|
||||
extra-y := vmlinux.bin vmlinux.gz
|
||||
|
||||
OBJCOPYFLAGS_vmlinux.bin := -O binary -R .note.gnu.build-id
|
||||
$(obj)/vmlinux.bin: vmlinux FORCE
|
||||
$(call if_changed,objcopy)
|
||||
|
||||
$(obj)/vmlinux.gz: $(obj)/vmlinux.bin FORCE
|
||||
$(call if_changed,gzip)
|
||||
|
||||
UIMAGE_LOADADDR = $(CONFIG_LOAD_ADDRESS)
|
||||
UIMAGE_ENTRYADDR = $(CONFIG_ENTRY_ADDRESS)
|
||||
UIMAGE_COMPRESSION = gzip
|
||||
|
||||
targets += uImage uImage.srec
|
||||
$(obj)/uImage: $(obj)/vmlinux.gz
|
||||
$(call if_changed,uimage)
|
||||
@echo ' Image $@ is ready'
|
||||
|
||||
OBJCOPYFLAGS_uImage.srec := -I binary -O srec
|
||||
$(obj)/uImage.srec: $(obj)/uImage
|
||||
$(call if_changed,objcopy)
|
||||
|
||||
OBJCOPYFLAGS_vmlinux.elf := --change-section-lma .text-0x80000000 \
|
||||
--change-section-lma __ex_table-0x80000000 \
|
||||
--change-section-lma .rodata-0x80000000 \
|
||||
--change-section-lma .data-0x80000000 \
|
||||
--change-section-lma .init-0x80000000 \
|
||||
--change-section-lma .bss-0x80000000 \
|
||||
--change-section-lma __param-0x80000000 \
|
||||
--change-section-lma __ksymtab-0x80000000 \
|
||||
--change-section-lma __ksymtab_gpl-0x80000000 \
|
||||
--change-section-lma __kcrctab-0x80000000 \
|
||||
--change-section-lma __kcrctab_gpl-0x80000000 \
|
||||
--change-section-lma __ksymtab_strings-0x80000000 \
|
||||
--set-start 0xa0000000
|
||||
$(obj)/vmlinux.elf: vmlinux FORCE
|
||||
$(call if_changed,objcopy)
|
||||
|
||||
quiet_cmd_sfdwarf = SFDWARF $@
|
||||
cmd_sfdwarf = sfdwarf $< TO $@ GNUAVR IW $(SFDWARF_FLAGS) > $(obj)/sfdwarf.log
|
||||
|
||||
$(obj)/vmlinux.cso: $(obj)/vmlinux.elf FORCE
|
||||
$(call if_changed,sfdwarf)
|
||||
|
||||
install: $(BOOTIMAGE)
|
||||
sh $(srctree)/install-kernel.sh $<
|
||||
|
||||
# Generated files to be removed upon make clean
|
||||
clean-files := vmlinux.elf vmlinux.bin vmlinux.gz uImage uImage.srec
|
|
@ -0,0 +1,3 @@
|
|||
extra-y := head.o
|
||||
|
||||
obj-y := empty.o
|
|
@ -0,0 +1 @@
|
|||
/* Empty file */
|
|
@ -0,0 +1,83 @@
|
|||
/*
|
||||
* Startup code for use with the u-boot bootloader.
|
||||
*
|
||||
* Copyright (C) 2004-2006 Atmel Corporation
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
#include <asm/setup.h>
|
||||
#include <asm/thread_info.h>
|
||||
#include <asm/sysreg.h>
|
||||
|
||||
/*
|
||||
* The kernel is loaded where we want it to be and all caches
|
||||
* have just been flushed. We get two parameters from u-boot:
|
||||
*
|
||||
* r12 contains a magic number (ATAG_MAGIC)
|
||||
* r11 points to a tag table providing information about
|
||||
* the system.
|
||||
*/
|
||||
.section .init.text,"ax"
|
||||
.global _start
|
||||
_start:
|
||||
/* Initialize .bss */
|
||||
lddpc r2, bss_start_addr
|
||||
lddpc r3, end_addr
|
||||
mov r0, 0
|
||||
mov r1, 0
|
||||
1: st.d r2++, r0
|
||||
cp r2, r3
|
||||
brlo 1b
|
||||
|
||||
/* Initialize status register */
|
||||
lddpc r0, init_sr
|
||||
mtsr SYSREG_SR, r0
|
||||
|
||||
/* Set initial stack pointer */
|
||||
lddpc sp, stack_addr
|
||||
sub sp, -THREAD_SIZE
|
||||
|
||||
#ifdef CONFIG_FRAME_POINTER
|
||||
/* Mark last stack frame */
|
||||
mov lr, 0
|
||||
mov r7, 0
|
||||
#endif
|
||||
|
||||
/* Check if the boot loader actually provided a tag table */
|
||||
lddpc r0, magic_number
|
||||
cp.w r12, r0
|
||||
brne no_tag_table
|
||||
|
||||
/*
|
||||
* Save the tag table address for later use. This must be done
|
||||
* _after_ .bss has been initialized...
|
||||
*/
|
||||
lddpc r0, tag_table_addr
|
||||
st.w r0[0], r11
|
||||
|
||||
/* Jump to loader-independent setup code */
|
||||
rjmp kernel_entry
|
||||
|
||||
.align 2
|
||||
magic_number:
|
||||
.long ATAG_MAGIC
|
||||
tag_table_addr:
|
||||
.long bootloader_tags
|
||||
bss_start_addr:
|
||||
.long __bss_start
|
||||
end_addr:
|
||||
.long _end
|
||||
init_sr:
|
||||
.long 0x007f0000 /* Supervisor mode, everything masked */
|
||||
stack_addr:
|
||||
.long init_thread_union
|
||||
panic_addr:
|
||||
.long panic
|
||||
|
||||
no_tag_table:
|
||||
sub r12, pc, (. - 2f)
|
||||
/* branch to panic() which can be far away with that construct */
|
||||
lddpc pc, panic_addr
|
||||
2: .asciz "Boot loader didn't provide correct magic number\n"
|
|
@ -0,0 +1,142 @@
|
|||
# CONFIG_LOCALVERSION_AUTO is not set
|
||||
CONFIG_SYSVIPC=y
|
||||
CONFIG_POSIX_MQUEUE=y
|
||||
CONFIG_NO_HZ=y
|
||||
CONFIG_HIGH_RES_TIMERS=y
|
||||
CONFIG_LOG_BUF_SHIFT=14
|
||||
CONFIG_RELAY=y
|
||||
CONFIG_BLK_DEV_INITRD=y
|
||||
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
|
||||
# CONFIG_BASE_FULL is not set
|
||||
# CONFIG_COMPAT_BRK is not set
|
||||
CONFIG_PROFILING=y
|
||||
CONFIG_OPROFILE=m
|
||||
CONFIG_MODULES=y
|
||||
CONFIG_MODULE_UNLOAD=y
|
||||
# CONFIG_BLK_DEV_BSG is not set
|
||||
# CONFIG_IOSCHED_DEADLINE is not set
|
||||
CONFIG_BOARD_ATNGW100_MKI=y
|
||||
# CONFIG_OWNERSHIP_TRACE is not set
|
||||
CONFIG_NMI_DEBUGGING=y
|
||||
CONFIG_CPU_FREQ=y
|
||||
# CONFIG_CPU_FREQ_STAT is not set
|
||||
CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
|
||||
CONFIG_CPU_FREQ_GOV_USERSPACE=y
|
||||
CONFIG_AVR32_AT32AP_CPUFREQ=y
|
||||
CONFIG_NET=y
|
||||
CONFIG_PACKET=y
|
||||
CONFIG_UNIX=y
|
||||
CONFIG_XFRM_USER=y
|
||||
CONFIG_NET_KEY=y
|
||||
CONFIG_INET=y
|
||||
CONFIG_IP_MULTICAST=y
|
||||
CONFIG_IP_ADVANCED_ROUTER=y
|
||||
CONFIG_IP_PNP=y
|
||||
CONFIG_IP_PNP_DHCP=y
|
||||
CONFIG_IP_MROUTE=y
|
||||
CONFIG_IP_PIMSM_V1=y
|
||||
CONFIG_SYN_COOKIES=y
|
||||
CONFIG_INET_AH=y
|
||||
CONFIG_INET_ESP=y
|
||||
CONFIG_INET_IPCOMP=y
|
||||
# CONFIG_INET_LRO is not set
|
||||
CONFIG_IPV6=y
|
||||
CONFIG_INET6_AH=y
|
||||
CONFIG_INET6_ESP=y
|
||||
CONFIG_INET6_IPCOMP=y
|
||||
CONFIG_NETFILTER=y
|
||||
# CONFIG_NETFILTER_ADVANCED is not set
|
||||
CONFIG_NETFILTER_XTABLES=y
|
||||
CONFIG_BRIDGE=m
|
||||
CONFIG_VLAN_8021Q=m
|
||||
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
|
||||
# CONFIG_PREVENT_FIRMWARE_BUILD is not set
|
||||
# CONFIG_FW_LOADER is not set
|
||||
CONFIG_MTD=y
|
||||
CONFIG_MTD_CMDLINE_PARTS=y
|
||||
CONFIG_MTD_BLOCK=y
|
||||
CONFIG_MTD_CFI=y
|
||||
CONFIG_MTD_CFI_AMDSTD=y
|
||||
CONFIG_MTD_PHYSMAP=y
|
||||
CONFIG_MTD_DATAFLASH=y
|
||||
CONFIG_MTD_UBI=y
|
||||
CONFIG_BLK_DEV_LOOP=m
|
||||
CONFIG_BLK_DEV_NBD=m
|
||||
CONFIG_BLK_DEV_RAM=m
|
||||
CONFIG_ATMEL_TCLIB=y
|
||||
CONFIG_NETDEVICES=y
|
||||
CONFIG_TUN=m
|
||||
CONFIG_MACB=y
|
||||
CONFIG_PPP=m
|
||||
CONFIG_PPP_BSDCOMP=m
|
||||
CONFIG_PPP_DEFLATE=m
|
||||
CONFIG_PPP_FILTER=y
|
||||
CONFIG_PPP_MPPE=m
|
||||
CONFIG_PPPOE=m
|
||||
CONFIG_PPP_ASYNC=m
|
||||
# CONFIG_INPUT is not set
|
||||
# CONFIG_SERIO is not set
|
||||
# CONFIG_VT is not set
|
||||
# CONFIG_LEGACY_PTYS is not set
|
||||
# CONFIG_DEVKMEM is not set
|
||||
CONFIG_SERIAL_ATMEL=y
|
||||
CONFIG_SERIAL_ATMEL_CONSOLE=y
|
||||
# CONFIG_HW_RANDOM is not set
|
||||
CONFIG_I2C=m
|
||||
CONFIG_I2C_CHARDEV=m
|
||||
CONFIG_I2C_GPIO=m
|
||||
CONFIG_SPI=y
|
||||
CONFIG_SPI_ATMEL=y
|
||||
CONFIG_SPI_SPIDEV=m
|
||||
CONFIG_GPIO_SYSFS=y
|
||||
# CONFIG_HWMON is not set
|
||||
CONFIG_WATCHDOG=y
|
||||
CONFIG_AT32AP700X_WDT=y
|
||||
CONFIG_USB_GADGET=y
|
||||
CONFIG_USB_GADGET_VBUS_DRAW=350
|
||||
CONFIG_USB_ZERO=m
|
||||
CONFIG_USB_ETH=m
|
||||
CONFIG_USB_GADGETFS=m
|
||||
CONFIG_USB_MASS_STORAGE=m
|
||||
CONFIG_USB_G_SERIAL=m
|
||||
CONFIG_USB_CDC_COMPOSITE=m
|
||||
CONFIG_MMC=y
|
||||
CONFIG_MMC_TEST=m
|
||||
CONFIG_MMC_ATMELMCI=y
|
||||
CONFIG_NEW_LEDS=y
|
||||
CONFIG_LEDS_CLASS=y
|
||||
CONFIG_LEDS_GPIO=y
|
||||
CONFIG_LEDS_TRIGGERS=y
|
||||
CONFIG_LEDS_TRIGGER_TIMER=y
|
||||
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
|
||||
CONFIG_RTC_CLASS=y
|
||||
CONFIG_RTC_DRV_AT32AP700X=y
|
||||
CONFIG_DMADEVICES=y
|
||||
CONFIG_EXT2_FS=y
|
||||
CONFIG_EXT3_FS=y
|
||||
# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
|
||||
# CONFIG_EXT3_FS_XATTR is not set
|
||||
CONFIG_EXT4_FS=y
|
||||
# CONFIG_DNOTIFY is not set
|
||||
CONFIG_FUSE_FS=m
|
||||
CONFIG_MSDOS_FS=m
|
||||
CONFIG_VFAT_FS=m
|
||||
CONFIG_FAT_DEFAULT_CODEPAGE=850
|
||||
CONFIG_PROC_KCORE=y
|
||||
CONFIG_TMPFS=y
|
||||
CONFIG_CONFIGFS_FS=y
|
||||
CONFIG_JFFS2_FS=y
|
||||
CONFIG_UBIFS_FS=y
|
||||
CONFIG_NFS_FS=y
|
||||
CONFIG_ROOT_NFS=y
|
||||
CONFIG_NFSD=m
|
||||
CONFIG_NFSD_V3=y
|
||||
CONFIG_CIFS=m
|
||||
CONFIG_NLS_CODEPAGE_437=m
|
||||
CONFIG_NLS_CODEPAGE_850=m
|
||||
CONFIG_NLS_ISO8859_1=m
|
||||
CONFIG_NLS_UTF8=m
|
||||
CONFIG_DEBUG_FS=y
|
||||
CONFIG_FRAME_POINTER=y
|
||||
CONFIG_MAGIC_SYSRQ=y
|
||||
CONFIG_DETECT_HUNG_TASK=y
|
|
@ -0,0 +1,158 @@
|
|||
# CONFIG_LOCALVERSION_AUTO is not set
|
||||
CONFIG_SYSVIPC=y
|
||||
CONFIG_POSIX_MQUEUE=y
|
||||
CONFIG_NO_HZ=y
|
||||
CONFIG_HIGH_RES_TIMERS=y
|
||||
CONFIG_LOG_BUF_SHIFT=14
|
||||
CONFIG_RELAY=y
|
||||
CONFIG_BLK_DEV_INITRD=y
|
||||
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
|
||||
# CONFIG_BASE_FULL is not set
|
||||
# CONFIG_COMPAT_BRK is not set
|
||||
CONFIG_PROFILING=y
|
||||
CONFIG_OPROFILE=m
|
||||
CONFIG_MODULES=y
|
||||
CONFIG_MODULE_UNLOAD=y
|
||||
# CONFIG_BLK_DEV_BSG is not set
|
||||
# CONFIG_IOSCHED_DEADLINE is not set
|
||||
CONFIG_BOARD_ATNGW100_MKI=y
|
||||
CONFIG_BOARD_ATNGW100_EVKLCD10X=y
|
||||
CONFIG_BOARD_ATNGW100_EVKLCD10X_QVGA=y
|
||||
# CONFIG_OWNERSHIP_TRACE is not set
|
||||
CONFIG_NMI_DEBUGGING=y
|
||||
CONFIG_CPU_FREQ=y
|
||||
# CONFIG_CPU_FREQ_STAT is not set
|
||||
CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
|
||||
CONFIG_CPU_FREQ_GOV_USERSPACE=y
|
||||
CONFIG_AVR32_AT32AP_CPUFREQ=y
|
||||
CONFIG_NET=y
|
||||
CONFIG_PACKET=y
|
||||
CONFIG_UNIX=y
|
||||
CONFIG_XFRM_USER=y
|
||||
CONFIG_NET_KEY=y
|
||||
CONFIG_INET=y
|
||||
CONFIG_IP_MULTICAST=y
|
||||
CONFIG_IP_ADVANCED_ROUTER=y
|
||||
CONFIG_IP_PNP=y
|
||||
CONFIG_IP_PNP_DHCP=y
|
||||
CONFIG_IP_MROUTE=y
|
||||
CONFIG_IP_PIMSM_V1=y
|
||||
CONFIG_SYN_COOKIES=y
|
||||
CONFIG_INET_AH=y
|
||||
CONFIG_INET_ESP=y
|
||||
CONFIG_INET_IPCOMP=y
|
||||
# CONFIG_INET_LRO is not set
|
||||
CONFIG_IPV6=y
|
||||
CONFIG_INET6_AH=y
|
||||
CONFIG_INET6_ESP=y
|
||||
CONFIG_INET6_IPCOMP=y
|
||||
CONFIG_NETFILTER=y
|
||||
# CONFIG_NETFILTER_ADVANCED is not set
|
||||
CONFIG_NETFILTER_XTABLES=y
|
||||
CONFIG_BRIDGE=m
|
||||
CONFIG_VLAN_8021Q=m
|
||||
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
|
||||
# CONFIG_PREVENT_FIRMWARE_BUILD is not set
|
||||
# CONFIG_FW_LOADER is not set
|
||||
CONFIG_MTD=y
|
||||
CONFIG_MTD_CMDLINE_PARTS=y
|
||||
CONFIG_MTD_BLOCK=y
|
||||
CONFIG_MTD_CFI=y
|
||||
CONFIG_MTD_CFI_AMDSTD=y
|
||||
CONFIG_MTD_PHYSMAP=y
|
||||
CONFIG_MTD_DATAFLASH=y
|
||||
CONFIG_MTD_UBI=y
|
||||
CONFIG_BLK_DEV_LOOP=m
|
||||
CONFIG_BLK_DEV_NBD=m
|
||||
CONFIG_BLK_DEV_RAM=m
|
||||
CONFIG_ATMEL_TCLIB=y
|
||||
CONFIG_NETDEVICES=y
|
||||
CONFIG_TUN=m
|
||||
CONFIG_MACB=y
|
||||
CONFIG_PPP=m
|
||||
CONFIG_PPP_BSDCOMP=m
|
||||
CONFIG_PPP_DEFLATE=m
|
||||
CONFIG_PPP_FILTER=y
|
||||
CONFIG_PPP_MPPE=m
|
||||
CONFIG_PPPOE=m
|
||||
CONFIG_PPP_ASYNC=m
|
||||
# CONFIG_INPUT_MOUSEDEV is not set
|
||||
CONFIG_INPUT_EVDEV=m
|
||||
# CONFIG_INPUT_KEYBOARD is not set
|
||||
# CONFIG_INPUT_MOUSE is not set
|
||||
CONFIG_INPUT_TOUCHSCREEN=y
|
||||
CONFIG_TOUCHSCREEN_WM97XX=m
|
||||
# CONFIG_SERIO is not set
|
||||
# CONFIG_LEGACY_PTYS is not set
|
||||
CONFIG_SERIAL_ATMEL=y
|
||||
CONFIG_SERIAL_ATMEL_CONSOLE=y
|
||||
# CONFIG_HW_RANDOM is not set
|
||||
CONFIG_I2C=m
|
||||
CONFIG_I2C_CHARDEV=m
|
||||
CONFIG_I2C_GPIO=m
|
||||
CONFIG_SPI=y
|
||||
CONFIG_SPI_ATMEL=y
|
||||
CONFIG_SPI_SPIDEV=m
|
||||
CONFIG_GPIO_SYSFS=y
|
||||
# CONFIG_HWMON is not set
|
||||
CONFIG_WATCHDOG=y
|
||||
CONFIG_AT32AP700X_WDT=y
|
||||
CONFIG_FB=y
|
||||
CONFIG_FB_ATMEL=y
|
||||
CONFIG_SOUND=y
|
||||
CONFIG_SND=y
|
||||
CONFIG_SND_MIXER_OSS=m
|
||||
CONFIG_SND_PCM_OSS=m
|
||||
CONFIG_SND_HRTIMER=y
|
||||
# CONFIG_SND_SUPPORT_OLD_API is not set
|
||||
# CONFIG_SND_DRIVERS is not set
|
||||
CONFIG_SND_ATMEL_AC97C=m
|
||||
# CONFIG_SND_SPI is not set
|
||||
CONFIG_USB_GADGET=y
|
||||
CONFIG_USB_GADGET_VBUS_DRAW=350
|
||||
CONFIG_USB_ZERO=m
|
||||
CONFIG_USB_ETH=m
|
||||
CONFIG_USB_GADGETFS=m
|
||||
CONFIG_USB_MASS_STORAGE=m
|
||||
CONFIG_USB_G_SERIAL=m
|
||||
CONFIG_USB_CDC_COMPOSITE=m
|
||||
CONFIG_MMC=y
|
||||
CONFIG_MMC_TEST=m
|
||||
CONFIG_MMC_ATMELMCI=y
|
||||
CONFIG_NEW_LEDS=y
|
||||
CONFIG_LEDS_CLASS=y
|
||||
CONFIG_LEDS_GPIO=y
|
||||
CONFIG_LEDS_TRIGGERS=y
|
||||
CONFIG_LEDS_TRIGGER_TIMER=y
|
||||
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
|
||||
CONFIG_RTC_CLASS=y
|
||||
CONFIG_RTC_DRV_AT32AP700X=y
|
||||
CONFIG_DMADEVICES=y
|
||||
CONFIG_EXT2_FS=y
|
||||
CONFIG_EXT3_FS=y
|
||||
# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
|
||||
# CONFIG_EXT3_FS_XATTR is not set
|
||||
CONFIG_EXT4_FS=y
|
||||
# CONFIG_DNOTIFY is not set
|
||||
CONFIG_FUSE_FS=m
|
||||
CONFIG_MSDOS_FS=m
|
||||
CONFIG_VFAT_FS=m
|
||||
CONFIG_FAT_DEFAULT_CODEPAGE=850
|
||||
CONFIG_PROC_KCORE=y
|
||||
CONFIG_TMPFS=y
|
||||
CONFIG_CONFIGFS_FS=y
|
||||
CONFIG_JFFS2_FS=y
|
||||
CONFIG_UBIFS_FS=y
|
||||
CONFIG_NFS_FS=y
|
||||
CONFIG_ROOT_NFS=y
|
||||
CONFIG_NFSD=m
|
||||
CONFIG_NFSD_V3=y
|
||||
CONFIG_CIFS=m
|
||||
CONFIG_NLS_CODEPAGE_437=m
|
||||
CONFIG_NLS_CODEPAGE_850=m
|
||||
CONFIG_NLS_ISO8859_1=m
|
||||
CONFIG_NLS_UTF8=m
|
||||
CONFIG_DEBUG_FS=y
|
||||
CONFIG_FRAME_POINTER=y
|
||||
CONFIG_MAGIC_SYSRQ=y
|
||||
CONFIG_DETECT_HUNG_TASK=y
|
|
@ -0,0 +1,157 @@
|
|||
# CONFIG_LOCALVERSION_AUTO is not set
|
||||
CONFIG_SYSVIPC=y
|
||||
CONFIG_POSIX_MQUEUE=y
|
||||
CONFIG_NO_HZ=y
|
||||
CONFIG_HIGH_RES_TIMERS=y
|
||||
CONFIG_LOG_BUF_SHIFT=14
|
||||
CONFIG_RELAY=y
|
||||
CONFIG_BLK_DEV_INITRD=y
|
||||
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
|
||||
# CONFIG_BASE_FULL is not set
|
||||
# CONFIG_COMPAT_BRK is not set
|
||||
CONFIG_PROFILING=y
|
||||
CONFIG_OPROFILE=m
|
||||
CONFIG_MODULES=y
|
||||
CONFIG_MODULE_UNLOAD=y
|
||||
# CONFIG_BLK_DEV_BSG is not set
|
||||
# CONFIG_IOSCHED_DEADLINE is not set
|
||||
CONFIG_BOARD_ATNGW100_MKI=y
|
||||
CONFIG_BOARD_ATNGW100_EVKLCD10X=y
|
||||
# CONFIG_OWNERSHIP_TRACE is not set
|
||||
CONFIG_NMI_DEBUGGING=y
|
||||
CONFIG_CPU_FREQ=y
|
||||
# CONFIG_CPU_FREQ_STAT is not set
|
||||
CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
|
||||
CONFIG_CPU_FREQ_GOV_USERSPACE=y
|
||||
CONFIG_AVR32_AT32AP_CPUFREQ=y
|
||||
CONFIG_NET=y
|
||||
CONFIG_PACKET=y
|
||||
CONFIG_UNIX=y
|
||||
CONFIG_XFRM_USER=y
|
||||
CONFIG_NET_KEY=y
|
||||
CONFIG_INET=y
|
||||
CONFIG_IP_MULTICAST=y
|
||||
CONFIG_IP_ADVANCED_ROUTER=y
|
||||
CONFIG_IP_PNP=y
|
||||
CONFIG_IP_PNP_DHCP=y
|
||||
CONFIG_IP_MROUTE=y
|
||||
CONFIG_IP_PIMSM_V1=y
|
||||
CONFIG_SYN_COOKIES=y
|
||||
CONFIG_INET_AH=y
|
||||
CONFIG_INET_ESP=y
|
||||
CONFIG_INET_IPCOMP=y
|
||||
# CONFIG_INET_LRO is not set
|
||||
CONFIG_IPV6=y
|
||||
CONFIG_INET6_AH=y
|
||||
CONFIG_INET6_ESP=y
|
||||
CONFIG_INET6_IPCOMP=y
|
||||
CONFIG_NETFILTER=y
|
||||
# CONFIG_NETFILTER_ADVANCED is not set
|
||||
CONFIG_NETFILTER_XTABLES=y
|
||||
CONFIG_BRIDGE=m
|
||||
CONFIG_VLAN_8021Q=m
|
||||
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
|
||||
# CONFIG_PREVENT_FIRMWARE_BUILD is not set
|
||||
# CONFIG_FW_LOADER is not set
|
||||
CONFIG_MTD=y
|
||||
CONFIG_MTD_CMDLINE_PARTS=y
|
||||
CONFIG_MTD_BLOCK=y
|
||||
CONFIG_MTD_CFI=y
|
||||
CONFIG_MTD_CFI_AMDSTD=y
|
||||
CONFIG_MTD_PHYSMAP=y
|
||||
CONFIG_MTD_DATAFLASH=y
|
||||
CONFIG_MTD_UBI=y
|
||||
CONFIG_BLK_DEV_LOOP=m
|
||||
CONFIG_BLK_DEV_NBD=m
|
||||
CONFIG_BLK_DEV_RAM=m
|
||||
CONFIG_ATMEL_TCLIB=y
|
||||
CONFIG_NETDEVICES=y
|
||||
CONFIG_TUN=m
|
||||
CONFIG_MACB=y
|
||||
CONFIG_PPP=m
|
||||
CONFIG_PPP_BSDCOMP=m
|
||||
CONFIG_PPP_DEFLATE=m
|
||||
CONFIG_PPP_FILTER=y
|
||||
CONFIG_PPP_MPPE=m
|
||||
CONFIG_PPPOE=m
|
||||
CONFIG_PPP_ASYNC=m
|
||||
# CONFIG_INPUT_MOUSEDEV is not set
|
||||
CONFIG_INPUT_EVDEV=m
|
||||
# CONFIG_INPUT_KEYBOARD is not set
|
||||
# CONFIG_INPUT_MOUSE is not set
|
||||
CONFIG_INPUT_TOUCHSCREEN=y
|
||||
CONFIG_TOUCHSCREEN_WM97XX=m
|
||||
# CONFIG_SERIO is not set
|
||||
# CONFIG_LEGACY_PTYS is not set
|
||||
CONFIG_SERIAL_ATMEL=y
|
||||
CONFIG_SERIAL_ATMEL_CONSOLE=y
|
||||
# CONFIG_HW_RANDOM is not set
|
||||
CONFIG_I2C=m
|
||||
CONFIG_I2C_CHARDEV=m
|
||||
CONFIG_I2C_GPIO=m
|
||||
CONFIG_SPI=y
|
||||
CONFIG_SPI_ATMEL=y
|
||||
CONFIG_SPI_SPIDEV=m
|
||||
CONFIG_GPIO_SYSFS=y
|
||||
# CONFIG_HWMON is not set
|
||||
CONFIG_WATCHDOG=y
|
||||
CONFIG_AT32AP700X_WDT=y
|
||||
CONFIG_FB=y
|
||||
CONFIG_FB_ATMEL=y
|
||||
CONFIG_SOUND=y
|
||||
CONFIG_SND=y
|
||||
CONFIG_SND_MIXER_OSS=m
|
||||
CONFIG_SND_PCM_OSS=m
|
||||
CONFIG_SND_HRTIMER=y
|
||||
# CONFIG_SND_SUPPORT_OLD_API is not set
|
||||
# CONFIG_SND_DRIVERS is not set
|
||||
CONFIG_SND_ATMEL_AC97C=m
|
||||
# CONFIG_SND_SPI is not set
|
||||
CONFIG_USB_GADGET=y
|
||||
CONFIG_USB_GADGET_VBUS_DRAW=350
|
||||
CONFIG_USB_ZERO=m
|
||||
CONFIG_USB_ETH=m
|
||||
CONFIG_USB_GADGETFS=m
|
||||
CONFIG_USB_MASS_STORAGE=m
|
||||
CONFIG_USB_G_SERIAL=m
|
||||
CONFIG_USB_CDC_COMPOSITE=m
|
||||
CONFIG_MMC=y
|
||||
CONFIG_MMC_TEST=m
|
||||
CONFIG_MMC_ATMELMCI=y
|
||||
CONFIG_NEW_LEDS=y
|
||||
CONFIG_LEDS_CLASS=y
|
||||
CONFIG_LEDS_GPIO=y
|
||||
CONFIG_LEDS_TRIGGERS=y
|
||||
CONFIG_LEDS_TRIGGER_TIMER=y
|
||||
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
|
||||
CONFIG_RTC_CLASS=y
|
||||
CONFIG_RTC_DRV_AT32AP700X=y
|
||||
CONFIG_DMADEVICES=y
|
||||
CONFIG_EXT2_FS=y
|
||||
CONFIG_EXT3_FS=y
|
||||
# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
|
||||
# CONFIG_EXT3_FS_XATTR is not set
|
||||
CONFIG_EXT4_FS=y
|
||||
# CONFIG_DNOTIFY is not set
|
||||
CONFIG_FUSE_FS=m
|
||||
CONFIG_MSDOS_FS=m
|
||||
CONFIG_VFAT_FS=m
|
||||
CONFIG_FAT_DEFAULT_CODEPAGE=850
|
||||
CONFIG_PROC_KCORE=y
|
||||
CONFIG_TMPFS=y
|
||||
CONFIG_CONFIGFS_FS=y
|
||||
CONFIG_JFFS2_FS=y
|
||||
CONFIG_UBIFS_FS=y
|
||||
CONFIG_NFS_FS=y
|
||||
CONFIG_ROOT_NFS=y
|
||||
CONFIG_NFSD=m
|
||||
CONFIG_NFSD_V3=y
|
||||
CONFIG_CIFS=m
|
||||
CONFIG_NLS_CODEPAGE_437=m
|
||||
CONFIG_NLS_CODEPAGE_850=m
|
||||
CONFIG_NLS_ISO8859_1=m
|
||||
CONFIG_NLS_UTF8=m
|
||||
CONFIG_DEBUG_FS=y
|
||||
CONFIG_FRAME_POINTER=y
|
||||
CONFIG_MAGIC_SYSRQ=y
|
||||
CONFIG_DETECT_HUNG_TASK=y
|
|
@ -0,0 +1,136 @@
|
|||
# CONFIG_LOCALVERSION_AUTO is not set
|
||||
CONFIG_SYSVIPC=y
|
||||
CONFIG_POSIX_MQUEUE=y
|
||||
CONFIG_BSD_PROCESS_ACCT=y
|
||||
CONFIG_BSD_PROCESS_ACCT_V3=y
|
||||
CONFIG_LOG_BUF_SHIFT=14
|
||||
CONFIG_BLK_DEV_INITRD=y
|
||||
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
|
||||
# CONFIG_BASE_FULL is not set
|
||||
# CONFIG_SLUB_DEBUG is not set
|
||||
CONFIG_MODULES=y
|
||||
CONFIG_MODULE_UNLOAD=y
|
||||
CONFIG_MODULE_FORCE_UNLOAD=y
|
||||
# CONFIG_BLK_DEV_BSG is not set
|
||||
# CONFIG_IOSCHED_DEADLINE is not set
|
||||
# CONFIG_OWNERSHIP_TRACE is not set
|
||||
# CONFIG_SUSPEND is not set
|
||||
CONFIG_PM=y
|
||||
CONFIG_CPU_FREQ=y
|
||||
CONFIG_CPU_FREQ_GOV_POWERSAVE=y
|
||||
CONFIG_CPU_FREQ_GOV_USERSPACE=y
|
||||
CONFIG_CPU_FREQ_GOV_ONDEMAND=y
|
||||
CONFIG_AVR32_AT32AP_CPUFREQ=y
|
||||
CONFIG_NET=y
|
||||
CONFIG_PACKET=y
|
||||
CONFIG_UNIX=y
|
||||
CONFIG_INET=y
|
||||
CONFIG_IP_PNP=y
|
||||
CONFIG_IP_PNP_DHCP=y
|
||||
CONFIG_SYN_COOKIES=y
|
||||
# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
|
||||
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
|
||||
# CONFIG_INET_XFRM_MODE_BEET is not set
|
||||
# CONFIG_INET_LRO is not set
|
||||
# CONFIG_IPV6 is not set
|
||||
CONFIG_BT=m
|
||||
CONFIG_BT_RFCOMM=m
|
||||
CONFIG_BT_RFCOMM_TTY=y
|
||||
CONFIG_BT_HIDP=m
|
||||
CONFIG_BT_HCIUART=m
|
||||
CONFIG_BT_HCIUART_H4=y
|
||||
CONFIG_BT_HCIUART_BCSP=y
|
||||
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
|
||||
# CONFIG_PREVENT_FIRMWARE_BUILD is not set
|
||||
# CONFIG_FW_LOADER is not set
|
||||
CONFIG_MTD=y
|
||||
CONFIG_MTD_CMDLINE_PARTS=y
|
||||
CONFIG_MTD_BLOCK=y
|
||||
CONFIG_MTD_CFI=y
|
||||
CONFIG_MTD_CFI_AMDSTD=y
|
||||
CONFIG_MTD_PHYSMAP=y
|
||||
CONFIG_MTD_DATAFLASH=y
|
||||
CONFIG_BLK_DEV_LOOP=y
|
||||
CONFIG_NETDEVICES=y
|
||||
CONFIG_MACB=y
|
||||
# CONFIG_INPUT_MOUSEDEV is not set
|
||||
CONFIG_INPUT_EVDEV=y
|
||||
# CONFIG_KEYBOARD_ATKBD is not set
|
||||
CONFIG_KEYBOARD_GPIO=y
|
||||
# CONFIG_INPUT_MOUSE is not set
|
||||
CONFIG_INPUT_TOUCHSCREEN=y
|
||||
CONFIG_TOUCHSCREEN_ADS7846=m
|
||||
# CONFIG_SERIO is not set
|
||||
CONFIG_VT_HW_CONSOLE_BINDING=y
|
||||
# CONFIG_LEGACY_PTYS is not set
|
||||
CONFIG_SERIAL_ATMEL=y
|
||||
CONFIG_SERIAL_ATMEL_CONSOLE=y
|
||||
# CONFIG_HW_RANDOM is not set
|
||||
CONFIG_I2C=y
|
||||
CONFIG_I2C_CHARDEV=y
|
||||
CONFIG_I2C_GPIO=y
|
||||
CONFIG_SPI=y
|
||||
CONFIG_SPI_ATMEL=y
|
||||
CONFIG_SPI_SPIDEV=y
|
||||
CONFIG_WATCHDOG=y
|
||||
CONFIG_AT32AP700X_WDT=y
|
||||
CONFIG_FB=y
|
||||
CONFIG_FB_ATMEL=y
|
||||
CONFIG_LCD_CLASS_DEVICE=y
|
||||
CONFIG_SOUND=m
|
||||
CONFIG_SND=m
|
||||
CONFIG_SND_MIXER_OSS=m
|
||||
CONFIG_SND_PCM_OSS=m
|
||||
# CONFIG_SND_SUPPORT_OLD_API is not set
|
||||
# CONFIG_SND_VERBOSE_PROCFS is not set
|
||||
CONFIG_SND_ATMEL_AC97C=m
|
||||
# CONFIG_SND_SPI is not set
|
||||
CONFIG_USB_GADGET=m
|
||||
CONFIG_USB_GADGET_DEBUG_FILES=y
|
||||
CONFIG_USB_MASS_STORAGE=m
|
||||
CONFIG_USB_G_SERIAL=m
|
||||
CONFIG_MMC=y
|
||||
CONFIG_MMC_ATMELMCI=y
|
||||
CONFIG_NEW_LEDS=y
|
||||
CONFIG_LEDS_CLASS=y
|
||||
CONFIG_LEDS_GPIO=y
|
||||
CONFIG_LEDS_PWM=y
|
||||
CONFIG_LEDS_TRIGGERS=y
|
||||
CONFIG_LEDS_TRIGGER_TIMER=y
|
||||
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
|
||||
CONFIG_RTC_CLASS=y
|
||||
CONFIG_RTC_DRV_S35390A=m
|
||||
CONFIG_RTC_DRV_AT32AP700X=m
|
||||
CONFIG_DMADEVICES=y
|
||||
CONFIG_UIO=y
|
||||
CONFIG_PWM=y
|
||||
CONFIG_PWM_ATMEL=y
|
||||
CONFIG_EXT2_FS=y
|
||||
CONFIG_EXT2_FS_XATTR=y
|
||||
CONFIG_EXT3_FS=y
|
||||
# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
|
||||
# CONFIG_DNOTIFY is not set
|
||||
CONFIG_MSDOS_FS=y
|
||||
CONFIG_VFAT_FS=y
|
||||
CONFIG_FAT_DEFAULT_CODEPAGE=850
|
||||
CONFIG_NTFS_FS=m
|
||||
CONFIG_NTFS_RW=y
|
||||
CONFIG_TMPFS=y
|
||||
CONFIG_CONFIGFS_FS=y
|
||||
CONFIG_JFFS2_FS=y
|
||||
CONFIG_NFS_FS=y
|
||||
CONFIG_ROOT_NFS=y
|
||||
CONFIG_CIFS=m
|
||||
CONFIG_CIFS_STATS=y
|
||||
CONFIG_CIFS_WEAK_PW_HASH=y
|
||||
CONFIG_CIFS_XATTR=y
|
||||
CONFIG_CIFS_POSIX=y
|
||||
CONFIG_NLS_CODEPAGE_437=y
|
||||
CONFIG_NLS_CODEPAGE_850=y
|
||||
CONFIG_NLS_ISO8859_1=y
|
||||
CONFIG_NLS_UTF8=y
|
||||
CONFIG_DEBUG_FS=y
|
||||
CONFIG_FRAME_POINTER=y
|
||||
CONFIG_MAGIC_SYSRQ=y
|
||||
CONFIG_DETECT_HUNG_TASK=y
|
||||
CONFIG_CRC_CCITT=y
|
|
@ -0,0 +1,144 @@
|
|||
# CONFIG_LOCALVERSION_AUTO is not set
|
||||
CONFIG_SYSVIPC=y
|
||||
CONFIG_POSIX_MQUEUE=y
|
||||
CONFIG_NO_HZ=y
|
||||
CONFIG_HIGH_RES_TIMERS=y
|
||||
CONFIG_LOG_BUF_SHIFT=14
|
||||
CONFIG_RELAY=y
|
||||
CONFIG_BLK_DEV_INITRD=y
|
||||
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
|
||||
# CONFIG_BASE_FULL is not set
|
||||
# CONFIG_COMPAT_BRK is not set
|
||||
CONFIG_PROFILING=y
|
||||
CONFIG_OPROFILE=m
|
||||
CONFIG_MODULES=y
|
||||
CONFIG_MODULE_UNLOAD=y
|
||||
# CONFIG_BLK_DEV_BSG is not set
|
||||
# CONFIG_IOSCHED_DEADLINE is not set
|
||||
CONFIG_BOARD_ATNGW100_MKII=y
|
||||
# CONFIG_OWNERSHIP_TRACE is not set
|
||||
CONFIG_NMI_DEBUGGING=y
|
||||
CONFIG_CPU_FREQ=y
|
||||
# CONFIG_CPU_FREQ_STAT is not set
|
||||
CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
|
||||
CONFIG_CPU_FREQ_GOV_USERSPACE=y
|
||||
CONFIG_AVR32_AT32AP_CPUFREQ=y
|
||||
CONFIG_NET=y
|
||||
CONFIG_PACKET=y
|
||||
CONFIG_UNIX=y
|
||||
CONFIG_XFRM_USER=y
|
||||
CONFIG_NET_KEY=y
|
||||
CONFIG_INET=y
|
||||
CONFIG_IP_MULTICAST=y
|
||||
CONFIG_IP_ADVANCED_ROUTER=y
|
||||
CONFIG_IP_PNP=y
|
||||
CONFIG_IP_PNP_DHCP=y
|
||||
CONFIG_IP_MROUTE=y
|
||||
CONFIG_IP_PIMSM_V1=y
|
||||
CONFIG_SYN_COOKIES=y
|
||||
CONFIG_INET_AH=y
|
||||
CONFIG_INET_ESP=y
|
||||
CONFIG_INET_IPCOMP=y
|
||||
# CONFIG_INET_LRO is not set
|
||||
CONFIG_IPV6=y
|
||||
CONFIG_INET6_AH=y
|
||||
CONFIG_INET6_ESP=y
|
||||
CONFIG_INET6_IPCOMP=y
|
||||
CONFIG_NETFILTER=y
|
||||
# CONFIG_NETFILTER_ADVANCED is not set
|
||||
CONFIG_NETFILTER_XTABLES=y
|
||||
CONFIG_BRIDGE=m
|
||||
CONFIG_VLAN_8021Q=m
|
||||
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
|
||||
# CONFIG_PREVENT_FIRMWARE_BUILD is not set
|
||||
# CONFIG_FW_LOADER is not set
|
||||
CONFIG_MTD=y
|
||||
CONFIG_MTD_CMDLINE_PARTS=y
|
||||
CONFIG_MTD_BLOCK=y
|
||||
CONFIG_MTD_CFI=y
|
||||
CONFIG_MTD_CFI_INTELEXT=y
|
||||
CONFIG_MTD_PHYSMAP=y
|
||||
CONFIG_MTD_DATAFLASH=y
|
||||
CONFIG_MTD_NAND=y
|
||||
CONFIG_MTD_NAND_ATMEL=y
|
||||
CONFIG_MTD_UBI=y
|
||||
CONFIG_BLK_DEV_LOOP=m
|
||||
CONFIG_BLK_DEV_NBD=m
|
||||
CONFIG_BLK_DEV_RAM=m
|
||||
CONFIG_ATMEL_TCLIB=y
|
||||
CONFIG_NETDEVICES=y
|
||||
CONFIG_TUN=m
|
||||
CONFIG_MACB=y
|
||||
CONFIG_PPP=m
|
||||
CONFIG_PPP_BSDCOMP=m
|
||||
CONFIG_PPP_DEFLATE=m
|
||||
CONFIG_PPP_FILTER=y
|
||||
CONFIG_PPP_MPPE=m
|
||||
CONFIG_PPPOE=m
|
||||
CONFIG_PPP_ASYNC=m
|
||||
# CONFIG_INPUT is not set
|
||||
# CONFIG_SERIO is not set
|
||||
# CONFIG_VT is not set
|
||||
# CONFIG_LEGACY_PTYS is not set
|
||||
# CONFIG_DEVKMEM is not set
|
||||
CONFIG_SERIAL_ATMEL=y
|
||||
CONFIG_SERIAL_ATMEL_CONSOLE=y
|
||||
# CONFIG_HW_RANDOM is not set
|
||||
CONFIG_I2C=m
|
||||
CONFIG_I2C_CHARDEV=m
|
||||
CONFIG_I2C_GPIO=m
|
||||
CONFIG_SPI=y
|
||||
CONFIG_SPI_ATMEL=y
|
||||
CONFIG_SPI_SPIDEV=m
|
||||
CONFIG_GPIO_SYSFS=y
|
||||
# CONFIG_HWMON is not set
|
||||
CONFIG_WATCHDOG=y
|
||||
CONFIG_AT32AP700X_WDT=y
|
||||
CONFIG_USB_GADGET=y
|
||||
CONFIG_USB_GADGET_VBUS_DRAW=350
|
||||
CONFIG_USB_ZERO=m
|
||||
CONFIG_USB_ETH=m
|
||||
CONFIG_USB_GADGETFS=m
|
||||
CONFIG_USB_MASS_STORAGE=m
|
||||
CONFIG_USB_G_SERIAL=m
|
||||
CONFIG_USB_CDC_COMPOSITE=m
|
||||
CONFIG_MMC=y
|
||||
CONFIG_MMC_TEST=m
|
||||
CONFIG_MMC_ATMELMCI=y
|
||||
CONFIG_NEW_LEDS=y
|
||||
CONFIG_LEDS_CLASS=y
|
||||
CONFIG_LEDS_GPIO=y
|
||||
CONFIG_LEDS_TRIGGERS=y
|
||||
CONFIG_LEDS_TRIGGER_TIMER=y
|
||||
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
|
||||
CONFIG_RTC_CLASS=y
|
||||
CONFIG_RTC_DRV_AT32AP700X=y
|
||||
CONFIG_DMADEVICES=y
|
||||
CONFIG_EXT2_FS=y
|
||||
CONFIG_EXT3_FS=y
|
||||
# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
|
||||
# CONFIG_EXT3_FS_XATTR is not set
|
||||
CONFIG_EXT4_FS=y
|
||||
# CONFIG_DNOTIFY is not set
|
||||
CONFIG_FUSE_FS=m
|
||||
CONFIG_MSDOS_FS=m
|
||||
CONFIG_VFAT_FS=m
|
||||
CONFIG_FAT_DEFAULT_CODEPAGE=850
|
||||
CONFIG_PROC_KCORE=y
|
||||
CONFIG_TMPFS=y
|
||||
CONFIG_CONFIGFS_FS=y
|
||||
CONFIG_JFFS2_FS=y
|
||||
CONFIG_UBIFS_FS=y
|
||||
CONFIG_NFS_FS=y
|
||||
CONFIG_ROOT_NFS=y
|
||||
CONFIG_NFSD=m
|
||||
CONFIG_NFSD_V3=y
|
||||
CONFIG_CIFS=m
|
||||
CONFIG_NLS_CODEPAGE_437=m
|
||||
CONFIG_NLS_CODEPAGE_850=m
|
||||
CONFIG_NLS_ISO8859_1=m
|
||||
CONFIG_NLS_UTF8=m
|
||||
CONFIG_DEBUG_FS=y
|
||||
CONFIG_FRAME_POINTER=y
|
||||
CONFIG_MAGIC_SYSRQ=y
|
||||
CONFIG_DETECT_HUNG_TASK=y
|
|
@ -0,0 +1,161 @@
|
|||
# CONFIG_LOCALVERSION_AUTO is not set
|
||||
CONFIG_SYSVIPC=y
|
||||
CONFIG_POSIX_MQUEUE=y
|
||||
CONFIG_NO_HZ=y
|
||||
CONFIG_HIGH_RES_TIMERS=y
|
||||
CONFIG_LOG_BUF_SHIFT=14
|
||||
CONFIG_RELAY=y
|
||||
CONFIG_BLK_DEV_INITRD=y
|
||||
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
|
||||
# CONFIG_BASE_FULL is not set
|
||||
# CONFIG_COMPAT_BRK is not set
|
||||
CONFIG_PROFILING=y
|
||||
CONFIG_OPROFILE=m
|
||||
CONFIG_MODULES=y
|
||||
CONFIG_MODULE_UNLOAD=y
|
||||
# CONFIG_BLK_DEV_BSG is not set
|
||||
# CONFIG_IOSCHED_DEADLINE is not set
|
||||
CONFIG_BOARD_ATNGW100_MKII=y
|
||||
CONFIG_BOARD_ATNGW100_MKII_LCD=y
|
||||
CONFIG_BOARD_ATNGW100_EVKLCD10X=y
|
||||
CONFIG_BOARD_ATNGW100_EVKLCD10X_QVGA=y
|
||||
# CONFIG_OWNERSHIP_TRACE is not set
|
||||
CONFIG_NMI_DEBUGGING=y
|
||||
CONFIG_CPU_FREQ=y
|
||||
# CONFIG_CPU_FREQ_STAT is not set
|
||||
CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
|
||||
CONFIG_CPU_FREQ_GOV_USERSPACE=y
|
||||
CONFIG_AVR32_AT32AP_CPUFREQ=y
|
||||
CONFIG_NET=y
|
||||
CONFIG_PACKET=y
|
||||
CONFIG_UNIX=y
|
||||
CONFIG_XFRM_USER=y
|
||||
CONFIG_NET_KEY=y
|
||||
CONFIG_INET=y
|
||||
CONFIG_IP_MULTICAST=y
|
||||
CONFIG_IP_ADVANCED_ROUTER=y
|
||||
CONFIG_IP_PNP=y
|
||||
CONFIG_IP_PNP_DHCP=y
|
||||
CONFIG_IP_MROUTE=y
|
||||
CONFIG_IP_PIMSM_V1=y
|
||||
CONFIG_SYN_COOKIES=y
|
||||
CONFIG_INET_AH=y
|
||||
CONFIG_INET_ESP=y
|
||||
CONFIG_INET_IPCOMP=y
|
||||
# CONFIG_INET_LRO is not set
|
||||
CONFIG_IPV6=y
|
||||
CONFIG_INET6_AH=y
|
||||
CONFIG_INET6_ESP=y
|
||||
CONFIG_INET6_IPCOMP=y
|
||||
CONFIG_NETFILTER=y
|
||||
# CONFIG_NETFILTER_ADVANCED is not set
|
||||
CONFIG_NETFILTER_XTABLES=y
|
||||
CONFIG_BRIDGE=m
|
||||
CONFIG_VLAN_8021Q=m
|
||||
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
|
||||
# CONFIG_PREVENT_FIRMWARE_BUILD is not set
|
||||
# CONFIG_FW_LOADER is not set
|
||||
CONFIG_MTD=y
|
||||
CONFIG_MTD_CMDLINE_PARTS=y
|
||||
CONFIG_MTD_BLOCK=y
|
||||
CONFIG_MTD_CFI=y
|
||||
CONFIG_MTD_CFI_INTELEXT=y
|
||||
CONFIG_MTD_PHYSMAP=y
|
||||
CONFIG_MTD_DATAFLASH=y
|
||||
CONFIG_MTD_NAND=y
|
||||
CONFIG_MTD_NAND_ATMEL=y
|
||||
CONFIG_MTD_UBI=y
|
||||
CONFIG_BLK_DEV_LOOP=m
|
||||
CONFIG_BLK_DEV_NBD=m
|
||||
CONFIG_BLK_DEV_RAM=m
|
||||
CONFIG_ATMEL_TCLIB=y
|
||||
CONFIG_NETDEVICES=y
|
||||
CONFIG_TUN=m
|
||||
CONFIG_MACB=y
|
||||
CONFIG_PPP=m
|
||||
CONFIG_PPP_BSDCOMP=m
|
||||
CONFIG_PPP_DEFLATE=m
|
||||
CONFIG_PPP_FILTER=y
|
||||
CONFIG_PPP_MPPE=m
|
||||
CONFIG_PPPOE=m
|
||||
CONFIG_PPP_ASYNC=m
|
||||
# CONFIG_INPUT_MOUSEDEV is not set
|
||||
CONFIG_INPUT_EVDEV=m
|
||||
# CONFIG_INPUT_KEYBOARD is not set
|
||||
# CONFIG_INPUT_MOUSE is not set
|
||||
CONFIG_INPUT_TOUCHSCREEN=y
|
||||
CONFIG_TOUCHSCREEN_WM97XX=m
|
||||
# CONFIG_SERIO is not set
|
||||
# CONFIG_LEGACY_PTYS is not set
|
||||
CONFIG_SERIAL_ATMEL=y
|
||||
CONFIG_SERIAL_ATMEL_CONSOLE=y
|
||||
# CONFIG_HW_RANDOM is not set
|
||||
CONFIG_I2C=m
|
||||
CONFIG_I2C_CHARDEV=m
|
||||
CONFIG_I2C_GPIO=m
|
||||
CONFIG_SPI=y
|
||||
CONFIG_SPI_ATMEL=y
|
||||
CONFIG_SPI_SPIDEV=m
|
||||
CONFIG_GPIO_SYSFS=y
|
||||
# CONFIG_HWMON is not set
|
||||
CONFIG_WATCHDOG=y
|
||||
CONFIG_AT32AP700X_WDT=y
|
||||
CONFIG_FB=y
|
||||
CONFIG_FB_ATMEL=y
|
||||
CONFIG_SOUND=y
|
||||
CONFIG_SND=y
|
||||
CONFIG_SND_MIXER_OSS=m
|
||||
CONFIG_SND_PCM_OSS=m
|
||||
CONFIG_SND_HRTIMER=y
|
||||
# CONFIG_SND_SUPPORT_OLD_API is not set
|
||||
# CONFIG_SND_DRIVERS is not set
|
||||
CONFIG_SND_ATMEL_AC97C=m
|
||||
# CONFIG_SND_SPI is not set
|
||||
CONFIG_USB_GADGET=y
|
||||
CONFIG_USB_GADGET_VBUS_DRAW=350
|
||||
CONFIG_USB_ZERO=m
|
||||
CONFIG_USB_ETH=m
|
||||
CONFIG_USB_GADGETFS=m
|
||||
CONFIG_USB_MASS_STORAGE=m
|
||||
CONFIG_USB_G_SERIAL=m
|
||||
CONFIG_USB_CDC_COMPOSITE=m
|
||||
CONFIG_MMC=y
|
||||
CONFIG_MMC_TEST=m
|
||||
CONFIG_MMC_ATMELMCI=y
|
||||
CONFIG_NEW_LEDS=y
|
||||
CONFIG_LEDS_CLASS=y
|
||||
CONFIG_LEDS_GPIO=y
|
||||
CONFIG_LEDS_TRIGGERS=y
|
||||
CONFIG_LEDS_TRIGGER_TIMER=y
|
||||
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
|
||||
CONFIG_RTC_CLASS=y
|
||||
CONFIG_RTC_DRV_AT32AP700X=y
|
||||
CONFIG_DMADEVICES=y
|
||||
CONFIG_EXT2_FS=y
|
||||
CONFIG_EXT3_FS=y
|
||||
# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
|
||||
# CONFIG_EXT3_FS_XATTR is not set
|
||||
CONFIG_EXT4_FS=y
|
||||
# CONFIG_DNOTIFY is not set
|
||||
CONFIG_FUSE_FS=m
|
||||
CONFIG_MSDOS_FS=m
|
||||
CONFIG_VFAT_FS=m
|
||||
CONFIG_FAT_DEFAULT_CODEPAGE=850
|
||||
CONFIG_PROC_KCORE=y
|
||||
CONFIG_TMPFS=y
|
||||
CONFIG_CONFIGFS_FS=y
|
||||
CONFIG_JFFS2_FS=y
|
||||
CONFIG_UBIFS_FS=y
|
||||
CONFIG_NFS_FS=y
|
||||
CONFIG_ROOT_NFS=y
|
||||
CONFIG_NFSD=m
|
||||
CONFIG_NFSD_V3=y
|
||||
CONFIG_CIFS=m
|
||||
CONFIG_NLS_CODEPAGE_437=m
|
||||
CONFIG_NLS_CODEPAGE_850=m
|
||||
CONFIG_NLS_ISO8859_1=m
|
||||
CONFIG_NLS_UTF8=m
|
||||
CONFIG_DEBUG_FS=y
|
||||
CONFIG_FRAME_POINTER=y
|
||||
CONFIG_MAGIC_SYSRQ=y
|
||||
CONFIG_DETECT_HUNG_TASK=y
|
|
@ -0,0 +1,160 @@
|
|||
# CONFIG_LOCALVERSION_AUTO is not set
|
||||
CONFIG_SYSVIPC=y
|
||||
CONFIG_POSIX_MQUEUE=y
|
||||
CONFIG_NO_HZ=y
|
||||
CONFIG_HIGH_RES_TIMERS=y
|
||||
CONFIG_LOG_BUF_SHIFT=14
|
||||
CONFIG_RELAY=y
|
||||
CONFIG_BLK_DEV_INITRD=y
|
||||
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
|
||||
# CONFIG_BASE_FULL is not set
|
||||
# CONFIG_COMPAT_BRK is not set
|
||||
CONFIG_PROFILING=y
|
||||
CONFIG_OPROFILE=m
|
||||
CONFIG_MODULES=y
|
||||
CONFIG_MODULE_UNLOAD=y
|
||||
# CONFIG_BLK_DEV_BSG is not set
|
||||
# CONFIG_IOSCHED_DEADLINE is not set
|
||||
CONFIG_BOARD_ATNGW100_MKII=y
|
||||
CONFIG_BOARD_ATNGW100_MKII_LCD=y
|
||||
CONFIG_BOARD_ATNGW100_EVKLCD10X=y
|
||||
# CONFIG_OWNERSHIP_TRACE is not set
|
||||
CONFIG_NMI_DEBUGGING=y
|
||||
CONFIG_CPU_FREQ=y
|
||||
# CONFIG_CPU_FREQ_STAT is not set
|
||||
CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
|
||||
CONFIG_CPU_FREQ_GOV_USERSPACE=y
|
||||
CONFIG_AVR32_AT32AP_CPUFREQ=y
|
||||
CONFIG_NET=y
|
||||
CONFIG_PACKET=y
|
||||
CONFIG_UNIX=y
|
||||
CONFIG_XFRM_USER=y
|
||||
CONFIG_NET_KEY=y
|
||||
CONFIG_INET=y
|
||||
CONFIG_IP_MULTICAST=y
|
||||
CONFIG_IP_ADVANCED_ROUTER=y
|
||||
CONFIG_IP_PNP=y
|
||||
CONFIG_IP_PNP_DHCP=y
|
||||
CONFIG_IP_MROUTE=y
|
||||
CONFIG_IP_PIMSM_V1=y
|
||||
CONFIG_SYN_COOKIES=y
|
||||
CONFIG_INET_AH=y
|
||||
CONFIG_INET_ESP=y
|
||||
CONFIG_INET_IPCOMP=y
|
||||
# CONFIG_INET_LRO is not set
|
||||
CONFIG_IPV6=y
|
||||
CONFIG_INET6_AH=y
|
||||
CONFIG_INET6_ESP=y
|
||||
CONFIG_INET6_IPCOMP=y
|
||||
CONFIG_NETFILTER=y
|
||||
# CONFIG_NETFILTER_ADVANCED is not set
|
||||
CONFIG_NETFILTER_XTABLES=y
|
||||
CONFIG_BRIDGE=m
|
||||
CONFIG_VLAN_8021Q=m
|
||||
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
|
||||
# CONFIG_PREVENT_FIRMWARE_BUILD is not set
|
||||
# CONFIG_FW_LOADER is not set
|
||||
CONFIG_MTD=y
|
||||
CONFIG_MTD_CMDLINE_PARTS=y
|
||||
CONFIG_MTD_BLOCK=y
|
||||
CONFIG_MTD_CFI=y
|
||||
CONFIG_MTD_CFI_INTELEXT=y
|
||||
CONFIG_MTD_PHYSMAP=y
|
||||
CONFIG_MTD_DATAFLASH=y
|
||||
CONFIG_MTD_NAND=y
|
||||
CONFIG_MTD_NAND_ATMEL=y
|
||||
CONFIG_MTD_UBI=y
|
||||
CONFIG_BLK_DEV_LOOP=m
|
||||
CONFIG_BLK_DEV_NBD=m
|
||||
CONFIG_BLK_DEV_RAM=m
|
||||
CONFIG_ATMEL_TCLIB=y
|
||||
CONFIG_NETDEVICES=y
|
||||
CONFIG_TUN=m
|
||||
CONFIG_MACB=y
|
||||
CONFIG_PPP=m
|
||||
CONFIG_PPP_BSDCOMP=m
|
||||
CONFIG_PPP_DEFLATE=m
|
||||
CONFIG_PPP_FILTER=y
|
||||
CONFIG_PPP_MPPE=m
|
||||
CONFIG_PPPOE=m
|
||||
CONFIG_PPP_ASYNC=m
|
||||
# CONFIG_INPUT_MOUSEDEV is not set
|
||||
CONFIG_INPUT_EVDEV=m
|
||||
# CONFIG_INPUT_KEYBOARD is not set
|
||||
# CONFIG_INPUT_MOUSE is not set
|
||||
CONFIG_INPUT_TOUCHSCREEN=y
|
||||
CONFIG_TOUCHSCREEN_WM97XX=m
|
||||
# CONFIG_SERIO is not set
|
||||
# CONFIG_LEGACY_PTYS is not set
|
||||
CONFIG_SERIAL_ATMEL=y
|
||||
CONFIG_SERIAL_ATMEL_CONSOLE=y
|
||||
# CONFIG_HW_RANDOM is not set
|
||||
CONFIG_I2C=m
|
||||
CONFIG_I2C_CHARDEV=m
|
||||
CONFIG_I2C_GPIO=m
|
||||
CONFIG_SPI=y
|
||||
CONFIG_SPI_ATMEL=y
|
||||
CONFIG_SPI_SPIDEV=m
|
||||
CONFIG_GPIO_SYSFS=y
|
||||
# CONFIG_HWMON is not set
|
||||
CONFIG_WATCHDOG=y
|
||||
CONFIG_AT32AP700X_WDT=y
|
||||
CONFIG_FB=y
|
||||
CONFIG_FB_ATMEL=y
|
||||
CONFIG_SOUND=y
|
||||
CONFIG_SND=y
|
||||
CONFIG_SND_MIXER_OSS=m
|
||||
CONFIG_SND_PCM_OSS=m
|
||||
CONFIG_SND_HRTIMER=y
|
||||
# CONFIG_SND_SUPPORT_OLD_API is not set
|
||||
# CONFIG_SND_DRIVERS is not set
|
||||
CONFIG_SND_ATMEL_AC97C=m
|
||||
# CONFIG_SND_SPI is not set
|
||||
CONFIG_USB_GADGET=y
|
||||
CONFIG_USB_GADGET_VBUS_DRAW=350
|
||||
CONFIG_USB_ZERO=m
|
||||
CONFIG_USB_ETH=m
|
||||
CONFIG_USB_GADGETFS=m
|
||||
CONFIG_USB_MASS_STORAGE=m
|
||||
CONFIG_USB_G_SERIAL=m
|
||||
CONFIG_USB_CDC_COMPOSITE=m
|
||||
CONFIG_MMC=y
|
||||
CONFIG_MMC_TEST=m
|
||||
CONFIG_MMC_ATMELMCI=y
|
||||
CONFIG_NEW_LEDS=y
|
||||
CONFIG_LEDS_CLASS=y
|
||||
CONFIG_LEDS_GPIO=y
|
||||
CONFIG_LEDS_TRIGGERS=y
|
||||
CONFIG_LEDS_TRIGGER_TIMER=y
|
||||
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
|
||||
CONFIG_RTC_CLASS=y
|
||||
CONFIG_RTC_DRV_AT32AP700X=y
|
||||
CONFIG_DMADEVICES=y
|
||||
CONFIG_EXT2_FS=y
|
||||
CONFIG_EXT3_FS=y
|
||||
# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
|
||||
# CONFIG_EXT3_FS_XATTR is not set
|
||||
CONFIG_EXT4_FS=y
|
||||
# CONFIG_DNOTIFY is not set
|
||||
CONFIG_FUSE_FS=m
|
||||
CONFIG_MSDOS_FS=m
|
||||
CONFIG_VFAT_FS=m
|
||||
CONFIG_FAT_DEFAULT_CODEPAGE=850
|
||||
CONFIG_PROC_KCORE=y
|
||||
CONFIG_TMPFS=y
|
||||
CONFIG_CONFIGFS_FS=y
|
||||
CONFIG_JFFS2_FS=y
|
||||
CONFIG_UBIFS_FS=y
|
||||
CONFIG_NFS_FS=y
|
||||
CONFIG_ROOT_NFS=y
|
||||
CONFIG_NFSD=m
|
||||
CONFIG_NFSD_V3=y
|
||||
CONFIG_CIFS=m
|
||||
CONFIG_NLS_CODEPAGE_437=m
|
||||
CONFIG_NLS_CODEPAGE_850=m
|
||||
CONFIG_NLS_ISO8859_1=m
|
||||
CONFIG_NLS_UTF8=m
|
||||
CONFIG_DEBUG_FS=y
|
||||
CONFIG_FRAME_POINTER=y
|
||||
CONFIG_MAGIC_SYSRQ=y
|
||||
CONFIG_DETECT_HUNG_TASK=y
|
|
@ -0,0 +1,157 @@
|
|||
# CONFIG_LOCALVERSION_AUTO is not set
|
||||
CONFIG_SYSVIPC=y
|
||||
CONFIG_POSIX_MQUEUE=y
|
||||
CONFIG_NO_HZ=y
|
||||
CONFIG_HIGH_RES_TIMERS=y
|
||||
CONFIG_LOG_BUF_SHIFT=14
|
||||
CONFIG_RELAY=y
|
||||
CONFIG_BLK_DEV_INITRD=y
|
||||
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
|
||||
# CONFIG_BASE_FULL is not set
|
||||
# CONFIG_COMPAT_BRK is not set
|
||||
CONFIG_PROFILING=y
|
||||
CONFIG_OPROFILE=m
|
||||
CONFIG_MODULES=y
|
||||
CONFIG_MODULE_UNLOAD=y
|
||||
# CONFIG_BLK_DEV_BSG is not set
|
||||
# CONFIG_IOSCHED_DEADLINE is not set
|
||||
# CONFIG_OWNERSHIP_TRACE is not set
|
||||
CONFIG_NMI_DEBUGGING=y
|
||||
CONFIG_CPU_FREQ=y
|
||||
# CONFIG_CPU_FREQ_STAT is not set
|
||||
CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
|
||||
CONFIG_CPU_FREQ_GOV_USERSPACE=y
|
||||
CONFIG_AVR32_AT32AP_CPUFREQ=y
|
||||
CONFIG_NET=y
|
||||
CONFIG_PACKET=y
|
||||
CONFIG_UNIX=y
|
||||
CONFIG_XFRM_USER=m
|
||||
CONFIG_NET_KEY=m
|
||||
CONFIG_INET=y
|
||||
CONFIG_IP_PNP=y
|
||||
CONFIG_IP_PNP_DHCP=y
|
||||
CONFIG_NET_IPIP=m
|
||||
CONFIG_NET_IPGRE_DEMUX=m
|
||||
CONFIG_NET_IPGRE=m
|
||||
CONFIG_INET_AH=m
|
||||
CONFIG_INET_ESP=m
|
||||
CONFIG_INET_XFRM_MODE_TRANSPORT=m
|
||||
CONFIG_INET_XFRM_MODE_TUNNEL=m
|
||||
CONFIG_INET_XFRM_MODE_BEET=m
|
||||
# CONFIG_INET_LRO is not set
|
||||
CONFIG_INET6_AH=m
|
||||
CONFIG_INET6_ESP=m
|
||||
CONFIG_INET6_IPCOMP=m
|
||||
CONFIG_IPV6_TUNNEL=m
|
||||
CONFIG_BRIDGE=m
|
||||
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
|
||||
# CONFIG_PREVENT_FIRMWARE_BUILD is not set
|
||||
# CONFIG_FW_LOADER is not set
|
||||
CONFIG_MTD=y
|
||||
CONFIG_MTD_CMDLINE_PARTS=y
|
||||
CONFIG_MTD_BLOCK=y
|
||||
CONFIG_MTD_CFI=y
|
||||
CONFIG_MTD_CFI_AMDSTD=y
|
||||
CONFIG_MTD_PHYSMAP=y
|
||||
CONFIG_MTD_UBI=y
|
||||
CONFIG_BLK_DEV_LOOP=m
|
||||
CONFIG_BLK_DEV_NBD=m
|
||||
CONFIG_BLK_DEV_RAM=m
|
||||
CONFIG_ATMEL_TCLIB=y
|
||||
CONFIG_ATMEL_SSC=m
|
||||
# CONFIG_SCSI_PROC_FS is not set
|
||||
CONFIG_BLK_DEV_SD=m
|
||||
CONFIG_BLK_DEV_SR=m
|
||||
# CONFIG_SCSI_LOWLEVEL is not set
|
||||
CONFIG_ATA=m
|
||||
# CONFIG_SATA_PMP is not set
|
||||
CONFIG_PATA_AT32=m
|
||||
CONFIG_NETDEVICES=y
|
||||
CONFIG_TUN=m
|
||||
CONFIG_MACB=y
|
||||
CONFIG_PPP=m
|
||||
CONFIG_PPP_BSDCOMP=m
|
||||
CONFIG_PPP_DEFLATE=m
|
||||
CONFIG_PPP_ASYNC=m
|
||||
CONFIG_INPUT=m
|
||||
CONFIG_INPUT_EVDEV=m
|
||||
# CONFIG_KEYBOARD_ATKBD is not set
|
||||
CONFIG_KEYBOARD_GPIO=m
|
||||
# CONFIG_MOUSE_PS2 is not set
|
||||
CONFIG_MOUSE_GPIO=m
|
||||
# CONFIG_SERIO is not set
|
||||
# CONFIG_VT is not set
|
||||
# CONFIG_LEGACY_PTYS is not set
|
||||
# CONFIG_DEVKMEM is not set
|
||||
CONFIG_SERIAL_ATMEL=y
|
||||
CONFIG_SERIAL_ATMEL_CONSOLE=y
|
||||
# CONFIG_HW_RANDOM is not set
|
||||
CONFIG_I2C=m
|
||||
CONFIG_I2C_CHARDEV=m
|
||||
CONFIG_I2C_GPIO=m
|
||||
CONFIG_SPI=y
|
||||
CONFIG_SPI_ATMEL=y
|
||||
CONFIG_SPI_SPIDEV=m
|
||||
CONFIG_GPIO_SYSFS=y
|
||||
# CONFIG_HWMON is not set
|
||||
CONFIG_WATCHDOG=y
|
||||
CONFIG_AT32AP700X_WDT=y
|
||||
CONFIG_FB=y
|
||||
CONFIG_FB_ATMEL=y
|
||||
CONFIG_LCD_CLASS_DEVICE=y
|
||||
CONFIG_LCD_LTV350QV=y
|
||||
CONFIG_SOUND=m
|
||||
CONFIG_SND=m
|
||||
CONFIG_SND_MIXER_OSS=m
|
||||
CONFIG_SND_PCM_OSS=m
|
||||
# CONFIG_SND_SUPPORT_OLD_API is not set
|
||||
# CONFIG_SND_VERBOSE_PROCFS is not set
|
||||
CONFIG_SND_AT73C213=m
|
||||
CONFIG_USB_GADGET=y
|
||||
CONFIG_USB_ZERO=m
|
||||
CONFIG_USB_ETH=m
|
||||
CONFIG_USB_GADGETFS=m
|
||||
CONFIG_USB_MASS_STORAGE=m
|
||||
CONFIG_USB_G_SERIAL=m
|
||||
CONFIG_USB_CDC_COMPOSITE=m
|
||||
CONFIG_MMC=y
|
||||
CONFIG_MMC_TEST=m
|
||||
CONFIG_MMC_ATMELMCI=y
|
||||
CONFIG_NEW_LEDS=y
|
||||
CONFIG_LEDS_CLASS=y
|
||||
CONFIG_LEDS_GPIO=m
|
||||
CONFIG_LEDS_PWM=m
|
||||
CONFIG_LEDS_TRIGGERS=y
|
||||
CONFIG_LEDS_TRIGGER_TIMER=m
|
||||
CONFIG_LEDS_TRIGGER_HEARTBEAT=m
|
||||
CONFIG_RTC_CLASS=y
|
||||
CONFIG_RTC_DRV_AT32AP700X=y
|
||||
CONFIG_DMADEVICES=y
|
||||
CONFIG_PWM=y
|
||||
CONFIG_PWM_ATMEL=m
|
||||
CONFIG_EXT2_FS=y
|
||||
CONFIG_EXT3_FS=y
|
||||
# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
|
||||
# CONFIG_EXT3_FS_XATTR is not set
|
||||
CONFIG_EXT4_FS=y
|
||||
# CONFIG_DNOTIFY is not set
|
||||
CONFIG_FUSE_FS=m
|
||||
CONFIG_MSDOS_FS=m
|
||||
CONFIG_VFAT_FS=m
|
||||
CONFIG_FAT_DEFAULT_CODEPAGE=850
|
||||
CONFIG_PROC_KCORE=y
|
||||
CONFIG_TMPFS=y
|
||||
CONFIG_CONFIGFS_FS=y
|
||||
CONFIG_JFFS2_FS=y
|
||||
CONFIG_UBIFS_FS=y
|
||||
CONFIG_NFS_FS=y
|
||||
CONFIG_ROOT_NFS=y
|
||||
CONFIG_CIFS=m
|
||||
CONFIG_NLS_CODEPAGE_437=m
|
||||
CONFIG_NLS_CODEPAGE_850=m
|
||||
CONFIG_NLS_ISO8859_1=m
|
||||
CONFIG_NLS_UTF8=m
|
||||
CONFIG_DEBUG_FS=y
|
||||
CONFIG_FRAME_POINTER=y
|
||||
CONFIG_MAGIC_SYSRQ=y
|
||||
CONFIG_DETECT_HUNG_TASK=y
|
|
@ -0,0 +1,137 @@
|
|||
# CONFIG_LOCALVERSION_AUTO is not set
|
||||
CONFIG_SYSVIPC=y
|
||||
CONFIG_POSIX_MQUEUE=y
|
||||
CONFIG_NO_HZ=y
|
||||
CONFIG_HIGH_RES_TIMERS=y
|
||||
CONFIG_LOG_BUF_SHIFT=14
|
||||
CONFIG_RELAY=y
|
||||
CONFIG_BLK_DEV_INITRD=y
|
||||
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
|
||||
# CONFIG_BASE_FULL is not set
|
||||
# CONFIG_COMPAT_BRK is not set
|
||||
CONFIG_PROFILING=y
|
||||
CONFIG_OPROFILE=m
|
||||
CONFIG_MODULES=y
|
||||
CONFIG_MODULE_UNLOAD=y
|
||||
# CONFIG_BLK_DEV_BSG is not set
|
||||
# CONFIG_IOSCHED_DEADLINE is not set
|
||||
CONFIG_BOARD_ATSTK1003=y
|
||||
# CONFIG_OWNERSHIP_TRACE is not set
|
||||
CONFIG_NMI_DEBUGGING=y
|
||||
CONFIG_CPU_FREQ=y
|
||||
# CONFIG_CPU_FREQ_STAT is not set
|
||||
CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
|
||||
CONFIG_CPU_FREQ_GOV_USERSPACE=y
|
||||
CONFIG_AVR32_AT32AP_CPUFREQ=y
|
||||
CONFIG_NET=y
|
||||
CONFIG_PACKET=y
|
||||
CONFIG_UNIX=y
|
||||
CONFIG_INET=y
|
||||
# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
|
||||
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
|
||||
# CONFIG_INET_XFRM_MODE_BEET is not set
|
||||
# CONFIG_INET_LRO is not set
|
||||
# CONFIG_INET_DIAG is not set
|
||||
# CONFIG_IPV6 is not set
|
||||
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
|
||||
# CONFIG_PREVENT_FIRMWARE_BUILD is not set
|
||||
# CONFIG_FW_LOADER is not set
|
||||
CONFIG_MTD=y
|
||||
CONFIG_MTD_CMDLINE_PARTS=y
|
||||
CONFIG_MTD_BLOCK=y
|
||||
CONFIG_MTD_CFI=y
|
||||
CONFIG_MTD_CFI_AMDSTD=y
|
||||
CONFIG_MTD_PHYSMAP=y
|
||||
CONFIG_MTD_UBI=y
|
||||
CONFIG_BLK_DEV_LOOP=m
|
||||
CONFIG_BLK_DEV_NBD=m
|
||||
CONFIG_BLK_DEV_RAM=m
|
||||
CONFIG_ATMEL_TCLIB=y
|
||||
CONFIG_ATMEL_SSC=m
|
||||
# CONFIG_SCSI_PROC_FS is not set
|
||||
CONFIG_BLK_DEV_SD=m
|
||||
CONFIG_BLK_DEV_SR=m
|
||||
# CONFIG_SCSI_LOWLEVEL is not set
|
||||
CONFIG_ATA=m
|
||||
# CONFIG_SATA_PMP is not set
|
||||
CONFIG_PATA_AT32=m
|
||||
CONFIG_NETDEVICES=y
|
||||
CONFIG_PPP=m
|
||||
CONFIG_PPP_BSDCOMP=m
|
||||
CONFIG_PPP_DEFLATE=m
|
||||
CONFIG_PPP_ASYNC=m
|
||||
CONFIG_INPUT=m
|
||||
CONFIG_INPUT_EVDEV=m
|
||||
# CONFIG_KEYBOARD_ATKBD is not set
|
||||
CONFIG_KEYBOARD_GPIO=m
|
||||
# CONFIG_MOUSE_PS2 is not set
|
||||
CONFIG_MOUSE_GPIO=m
|
||||
# CONFIG_SERIO is not set
|
||||
# CONFIG_VT is not set
|
||||
# CONFIG_LEGACY_PTYS is not set
|
||||
# CONFIG_DEVKMEM is not set
|
||||
CONFIG_SERIAL_ATMEL=y
|
||||
CONFIG_SERIAL_ATMEL_CONSOLE=y
|
||||
# CONFIG_HW_RANDOM is not set
|
||||
CONFIG_I2C=m
|
||||
CONFIG_I2C_CHARDEV=m
|
||||
CONFIG_I2C_GPIO=m
|
||||
CONFIG_SPI=y
|
||||
CONFIG_SPI_ATMEL=y
|
||||
CONFIG_SPI_SPIDEV=m
|
||||
CONFIG_GPIO_SYSFS=y
|
||||
# CONFIG_HWMON is not set
|
||||
CONFIG_WATCHDOG=y
|
||||
CONFIG_AT32AP700X_WDT=y
|
||||
CONFIG_SOUND=m
|
||||
CONFIG_SND=m
|
||||
CONFIG_SND_MIXER_OSS=m
|
||||
CONFIG_SND_PCM_OSS=m
|
||||
# CONFIG_SND_DRIVERS is not set
|
||||
CONFIG_SND_AT73C213=m
|
||||
CONFIG_USB_GADGET=y
|
||||
CONFIG_USB_ZERO=m
|
||||
CONFIG_USB_ETH=m
|
||||
CONFIG_USB_GADGETFS=m
|
||||
CONFIG_USB_MASS_STORAGE=m
|
||||
CONFIG_USB_G_SERIAL=m
|
||||
CONFIG_USB_CDC_COMPOSITE=m
|
||||
CONFIG_MMC=y
|
||||
CONFIG_MMC_TEST=m
|
||||
CONFIG_MMC_ATMELMCI=y
|
||||
CONFIG_NEW_LEDS=y
|
||||
CONFIG_LEDS_CLASS=y
|
||||
CONFIG_LEDS_GPIO=m
|
||||
CONFIG_LEDS_PWM=m
|
||||
CONFIG_LEDS_TRIGGERS=y
|
||||
CONFIG_LEDS_TRIGGER_TIMER=m
|
||||
CONFIG_LEDS_TRIGGER_HEARTBEAT=m
|
||||
CONFIG_RTC_CLASS=y
|
||||
CONFIG_RTC_DRV_AT32AP700X=y
|
||||
CONFIG_DMADEVICES=y
|
||||
CONFIG_PWM=y
|
||||
CONFIG_PWM_ATMEL=m
|
||||
CONFIG_EXT2_FS=y
|
||||
CONFIG_EXT3_FS=y
|
||||
# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
|
||||
# CONFIG_EXT3_FS_XATTR is not set
|
||||
CONFIG_EXT4_FS=y
|
||||
# CONFIG_DNOTIFY is not set
|
||||
CONFIG_FUSE_FS=m
|
||||
CONFIG_MSDOS_FS=m
|
||||
CONFIG_VFAT_FS=m
|
||||
CONFIG_FAT_DEFAULT_CODEPAGE=850
|
||||
CONFIG_PROC_KCORE=y
|
||||
CONFIG_TMPFS=y
|
||||
CONFIG_CONFIGFS_FS=y
|
||||
CONFIG_JFFS2_FS=y
|
||||
CONFIG_UBIFS_FS=y
|
||||
# CONFIG_NETWORK_FILESYSTEMS is not set
|
||||
CONFIG_NLS_CODEPAGE_437=m
|
||||
CONFIG_NLS_CODEPAGE_850=m
|
||||
CONFIG_NLS_ISO8859_1=m
|
||||
CONFIG_NLS_UTF8=m
|
||||
CONFIG_DEBUG_FS=y
|
||||
CONFIG_FRAME_POINTER=y
|
||||
CONFIG_MAGIC_SYSRQ=y
|
||||
CONFIG_DETECT_HUNG_TASK=y
|
|
@ -0,0 +1,135 @@
|
|||
# CONFIG_LOCALVERSION_AUTO is not set
|
||||
CONFIG_SYSVIPC=y
|
||||
CONFIG_POSIX_MQUEUE=y
|
||||
CONFIG_NO_HZ=y
|
||||
CONFIG_HIGH_RES_TIMERS=y
|
||||
CONFIG_LOG_BUF_SHIFT=14
|
||||
CONFIG_RELAY=y
|
||||
CONFIG_BLK_DEV_INITRD=y
|
||||
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
|
||||
# CONFIG_BASE_FULL is not set
|
||||
# CONFIG_COMPAT_BRK is not set
|
||||
CONFIG_PROFILING=y
|
||||
CONFIG_OPROFILE=m
|
||||
CONFIG_MODULES=y
|
||||
CONFIG_MODULE_UNLOAD=y
|
||||
# CONFIG_BLK_DEV_BSG is not set
|
||||
# CONFIG_IOSCHED_DEADLINE is not set
|
||||
CONFIG_BOARD_ATSTK1004=y
|
||||
# CONFIG_OWNERSHIP_TRACE is not set
|
||||
CONFIG_NMI_DEBUGGING=y
|
||||
CONFIG_CPU_FREQ=y
|
||||
# CONFIG_CPU_FREQ_STAT is not set
|
||||
CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
|
||||
CONFIG_CPU_FREQ_GOV_USERSPACE=y
|
||||
CONFIG_AVR32_AT32AP_CPUFREQ=y
|
||||
CONFIG_NET=y
|
||||
CONFIG_PACKET=y
|
||||
CONFIG_UNIX=y
|
||||
CONFIG_INET=y
|
||||
# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
|
||||
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
|
||||
# CONFIG_INET_XFRM_MODE_BEET is not set
|
||||
# CONFIG_INET_LRO is not set
|
||||
# CONFIG_INET_DIAG is not set
|
||||
# CONFIG_IPV6 is not set
|
||||
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
|
||||
# CONFIG_PREVENT_FIRMWARE_BUILD is not set
|
||||
# CONFIG_FW_LOADER is not set
|
||||
CONFIG_MTD=y
|
||||
CONFIG_MTD_CMDLINE_PARTS=y
|
||||
CONFIG_MTD_BLOCK=y
|
||||
CONFIG_MTD_CFI=y
|
||||
CONFIG_MTD_CFI_AMDSTD=y
|
||||
CONFIG_MTD_PHYSMAP=y
|
||||
CONFIG_MTD_UBI=y
|
||||
CONFIG_BLK_DEV_LOOP=m
|
||||
CONFIG_BLK_DEV_NBD=m
|
||||
CONFIG_BLK_DEV_RAM=m
|
||||
CONFIG_ATMEL_TCLIB=y
|
||||
CONFIG_ATMEL_SSC=m
|
||||
# CONFIG_SCSI_PROC_FS is not set
|
||||
CONFIG_BLK_DEV_SD=m
|
||||
CONFIG_BLK_DEV_SR=m
|
||||
# CONFIG_SCSI_LOWLEVEL is not set
|
||||
CONFIG_ATA=m
|
||||
# CONFIG_SATA_PMP is not set
|
||||
CONFIG_PATA_AT32=m
|
||||
CONFIG_NETDEVICES=y
|
||||
CONFIG_PPP=m
|
||||
CONFIG_PPP_BSDCOMP=m
|
||||
CONFIG_PPP_DEFLATE=m
|
||||
CONFIG_PPP_ASYNC=m
|
||||
CONFIG_INPUT=m
|
||||
CONFIG_INPUT_EVDEV=m
|
||||
# CONFIG_KEYBOARD_ATKBD is not set
|
||||
CONFIG_KEYBOARD_GPIO=m
|
||||
# CONFIG_MOUSE_PS2 is not set
|
||||
CONFIG_MOUSE_GPIO=m
|
||||
# CONFIG_SERIO is not set
|
||||
# CONFIG_VT is not set
|
||||
# CONFIG_LEGACY_PTYS is not set
|
||||
# CONFIG_DEVKMEM is not set
|
||||
CONFIG_SERIAL_ATMEL=y
|
||||
CONFIG_SERIAL_ATMEL_CONSOLE=y
|
||||
# CONFIG_HW_RANDOM is not set
|
||||
CONFIG_I2C=m
|
||||
CONFIG_I2C_CHARDEV=m
|
||||
CONFIG_I2C_GPIO=m
|
||||
CONFIG_SPI=y
|
||||
CONFIG_SPI_ATMEL=y
|
||||
CONFIG_SPI_SPIDEV=m
|
||||
CONFIG_GPIO_SYSFS=y
|
||||
# CONFIG_HWMON is not set
|
||||
CONFIG_WATCHDOG=y
|
||||
CONFIG_AT32AP700X_WDT=y
|
||||
CONFIG_FB=y
|
||||
CONFIG_FB_ATMEL=y
|
||||
CONFIG_LCD_CLASS_DEVICE=y
|
||||
CONFIG_LCD_LTV350QV=y
|
||||
CONFIG_USB_GADGET=y
|
||||
CONFIG_USB_ZERO=m
|
||||
CONFIG_USB_ETH=m
|
||||
CONFIG_USB_GADGETFS=m
|
||||
CONFIG_USB_MASS_STORAGE=m
|
||||
CONFIG_USB_G_SERIAL=m
|
||||
CONFIG_USB_CDC_COMPOSITE=m
|
||||
CONFIG_MMC=y
|
||||
CONFIG_MMC_TEST=m
|
||||
CONFIG_MMC_ATMELMCI=y
|
||||
CONFIG_NEW_LEDS=y
|
||||
CONFIG_LEDS_CLASS=y
|
||||
CONFIG_LEDS_GPIO=m
|
||||
CONFIG_LEDS_PWM=m
|
||||
CONFIG_LEDS_TRIGGERS=y
|
||||
CONFIG_LEDS_TRIGGER_TIMER=m
|
||||
CONFIG_LEDS_TRIGGER_HEARTBEAT=m
|
||||
CONFIG_RTC_CLASS=y
|
||||
CONFIG_RTC_DRV_AT32AP700X=y
|
||||
CONFIG_DMADEVICES=y
|
||||
CONFIG_PWM=y
|
||||
CONFIG_PWM_ATMEL=m
|
||||
CONFIG_EXT2_FS=y
|
||||
CONFIG_EXT3_FS=y
|
||||
# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
|
||||
# CONFIG_EXT3_FS_XATTR is not set
|
||||
CONFIG_EXT4_FS=y
|
||||
# CONFIG_DNOTIFY is not set
|
||||
CONFIG_FUSE_FS=m
|
||||
CONFIG_MSDOS_FS=m
|
||||
CONFIG_VFAT_FS=m
|
||||
CONFIG_FAT_DEFAULT_CODEPAGE=850
|
||||
CONFIG_PROC_KCORE=y
|
||||
CONFIG_TMPFS=y
|
||||
CONFIG_CONFIGFS_FS=y
|
||||
CONFIG_JFFS2_FS=y
|
||||
CONFIG_UBIFS_FS=y
|
||||
# CONFIG_NETWORK_FILESYSTEMS is not set
|
||||
CONFIG_NLS_CODEPAGE_437=m
|
||||
CONFIG_NLS_CODEPAGE_850=m
|
||||
CONFIG_NLS_ISO8859_1=m
|
||||
CONFIG_NLS_UTF8=m
|
||||
CONFIG_DEBUG_FS=y
|
||||
CONFIG_FRAME_POINTER=y
|
||||
CONFIG_MAGIC_SYSRQ=y
|
||||
CONFIG_DETECT_HUNG_TASK=y
|
|
@ -0,0 +1,160 @@
|
|||
# CONFIG_LOCALVERSION_AUTO is not set
|
||||
CONFIG_SYSVIPC=y
|
||||
CONFIG_POSIX_MQUEUE=y
|
||||
CONFIG_NO_HZ=y
|
||||
CONFIG_HIGH_RES_TIMERS=y
|
||||
CONFIG_LOG_BUF_SHIFT=14
|
||||
CONFIG_RELAY=y
|
||||
CONFIG_BLK_DEV_INITRD=y
|
||||
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
|
||||
# CONFIG_BASE_FULL is not set
|
||||
# CONFIG_COMPAT_BRK is not set
|
||||
CONFIG_PROFILING=y
|
||||
CONFIG_OPROFILE=m
|
||||
CONFIG_MODULES=y
|
||||
CONFIG_MODULE_UNLOAD=y
|
||||
# CONFIG_BLK_DEV_BSG is not set
|
||||
# CONFIG_IOSCHED_DEADLINE is not set
|
||||
CONFIG_BOARD_ATSTK1006=y
|
||||
# CONFIG_OWNERSHIP_TRACE is not set
|
||||
CONFIG_NMI_DEBUGGING=y
|
||||
CONFIG_CPU_FREQ=y
|
||||
# CONFIG_CPU_FREQ_STAT is not set
|
||||
CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
|
||||
CONFIG_CPU_FREQ_GOV_USERSPACE=y
|
||||
CONFIG_AVR32_AT32AP_CPUFREQ=y
|
||||
CONFIG_NET=y
|
||||
CONFIG_PACKET=y
|
||||
CONFIG_UNIX=y
|
||||
CONFIG_XFRM_USER=m
|
||||
CONFIG_NET_KEY=m
|
||||
CONFIG_INET=y
|
||||
CONFIG_IP_PNP=y
|
||||
CONFIG_IP_PNP_DHCP=y
|
||||
CONFIG_NET_IPIP=m
|
||||
CONFIG_NET_IPGRE_DEMUX=m
|
||||
CONFIG_NET_IPGRE=m
|
||||
CONFIG_INET_AH=m
|
||||
CONFIG_INET_ESP=m
|
||||
CONFIG_INET_XFRM_MODE_TRANSPORT=m
|
||||
CONFIG_INET_XFRM_MODE_TUNNEL=m
|
||||
CONFIG_INET_XFRM_MODE_BEET=m
|
||||
# CONFIG_INET_LRO is not set
|
||||
CONFIG_INET6_AH=m
|
||||
CONFIG_INET6_ESP=m
|
||||
CONFIG_INET6_IPCOMP=m
|
||||
CONFIG_IPV6_TUNNEL=m
|
||||
CONFIG_BRIDGE=m
|
||||
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
|
||||
# CONFIG_PREVENT_FIRMWARE_BUILD is not set
|
||||
# CONFIG_FW_LOADER is not set
|
||||
CONFIG_MTD=y
|
||||
CONFIG_MTD_CMDLINE_PARTS=y
|
||||
CONFIG_MTD_BLOCK=y
|
||||
CONFIG_MTD_CFI=y
|
||||
CONFIG_MTD_CFI_AMDSTD=y
|
||||
CONFIG_MTD_PHYSMAP=y
|
||||
CONFIG_MTD_NAND=y
|
||||
CONFIG_MTD_NAND_ATMEL=y
|
||||
CONFIG_MTD_UBI=y
|
||||
CONFIG_BLK_DEV_LOOP=m
|
||||
CONFIG_BLK_DEV_NBD=m
|
||||
CONFIG_BLK_DEV_RAM=m
|
||||
CONFIG_ATMEL_TCLIB=y
|
||||
CONFIG_ATMEL_SSC=m
|
||||
# CONFIG_SCSI_PROC_FS is not set
|
||||
CONFIG_BLK_DEV_SD=m
|
||||
CONFIG_BLK_DEV_SR=m
|
||||
# CONFIG_SCSI_LOWLEVEL is not set
|
||||
CONFIG_ATA=m
|
||||
# CONFIG_SATA_PMP is not set
|
||||
CONFIG_PATA_AT32=m
|
||||
CONFIG_NETDEVICES=y
|
||||
CONFIG_TUN=m
|
||||
CONFIG_MACB=y
|
||||
CONFIG_PPP=m
|
||||
CONFIG_PPP_BSDCOMP=m
|
||||
CONFIG_PPP_DEFLATE=m
|
||||
CONFIG_PPP_ASYNC=m
|
||||
CONFIG_INPUT=m
|
||||
CONFIG_INPUT_EVDEV=m
|
||||
# CONFIG_KEYBOARD_ATKBD is not set
|
||||
CONFIG_KEYBOARD_GPIO=m
|
||||
# CONFIG_MOUSE_PS2 is not set
|
||||
CONFIG_MOUSE_GPIO=m
|
||||
# CONFIG_SERIO is not set
|
||||
# CONFIG_VT is not set
|
||||
# CONFIG_LEGACY_PTYS is not set
|
||||
# CONFIG_DEVKMEM is not set
|
||||
CONFIG_SERIAL_ATMEL=y
|
||||
CONFIG_SERIAL_ATMEL_CONSOLE=y
|
||||
# CONFIG_HW_RANDOM is not set
|
||||
CONFIG_I2C=m
|
||||
CONFIG_I2C_CHARDEV=m
|
||||
CONFIG_I2C_GPIO=m
|
||||
CONFIG_SPI=y
|
||||
CONFIG_SPI_ATMEL=y
|
||||
CONFIG_SPI_SPIDEV=m
|
||||
CONFIG_GPIO_SYSFS=y
|
||||
# CONFIG_HWMON is not set
|
||||
CONFIG_WATCHDOG=y
|
||||
CONFIG_AT32AP700X_WDT=y
|
||||
CONFIG_FB=y
|
||||
CONFIG_FB_ATMEL=y
|
||||
CONFIG_LCD_CLASS_DEVICE=y
|
||||
CONFIG_LCD_LTV350QV=y
|
||||
CONFIG_SOUND=m
|
||||
CONFIG_SND=m
|
||||
CONFIG_SND_MIXER_OSS=m
|
||||
CONFIG_SND_PCM_OSS=m
|
||||
# CONFIG_SND_SUPPORT_OLD_API is not set
|
||||
# CONFIG_SND_VERBOSE_PROCFS is not set
|
||||
CONFIG_SND_AT73C213=m
|
||||
CONFIG_USB_GADGET=y
|
||||
CONFIG_USB_ZERO=m
|
||||
CONFIG_USB_ETH=m
|
||||
CONFIG_USB_GADGETFS=m
|
||||
CONFIG_USB_MASS_STORAGE=m
|
||||
CONFIG_USB_G_SERIAL=m
|
||||
CONFIG_USB_CDC_COMPOSITE=m
|
||||
CONFIG_MMC=y
|
||||
CONFIG_MMC_TEST=m
|
||||
CONFIG_MMC_ATMELMCI=y
|
||||
CONFIG_NEW_LEDS=y
|
||||
CONFIG_LEDS_CLASS=y
|
||||
CONFIG_LEDS_GPIO=m
|
||||
CONFIG_LEDS_PWM=m
|
||||
CONFIG_LEDS_TRIGGERS=y
|
||||
CONFIG_LEDS_TRIGGER_TIMER=m
|
||||
CONFIG_LEDS_TRIGGER_HEARTBEAT=m
|
||||
CONFIG_RTC_CLASS=y
|
||||
CONFIG_RTC_DRV_AT32AP700X=y
|
||||
CONFIG_DMADEVICES=y
|
||||
CONFIG_PWM=y
|
||||
CONFIG_PWM_ATMEL=m
|
||||
CONFIG_EXT2_FS=y
|
||||
CONFIG_EXT3_FS=y
|
||||
# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
|
||||
# CONFIG_EXT3_FS_XATTR is not set
|
||||
CONFIG_EXT4_FS=y
|
||||
# CONFIG_DNOTIFY is not set
|
||||
CONFIG_FUSE_FS=m
|
||||
CONFIG_MSDOS_FS=m
|
||||
CONFIG_VFAT_FS=m
|
||||
CONFIG_FAT_DEFAULT_CODEPAGE=850
|
||||
CONFIG_PROC_KCORE=y
|
||||
CONFIG_TMPFS=y
|
||||
CONFIG_CONFIGFS_FS=y
|
||||
CONFIG_JFFS2_FS=y
|
||||
CONFIG_UBIFS_FS=y
|
||||
CONFIG_NFS_FS=y
|
||||
CONFIG_ROOT_NFS=y
|
||||
CONFIG_CIFS=m
|
||||
CONFIG_NLS_CODEPAGE_437=m
|
||||
CONFIG_NLS_CODEPAGE_850=m
|
||||
CONFIG_NLS_ISO8859_1=m
|
||||
CONFIG_NLS_UTF8=m
|
||||
CONFIG_DEBUG_FS=y
|
||||
CONFIG_FRAME_POINTER=y
|
||||
CONFIG_MAGIC_SYSRQ=y
|
||||
CONFIG_DETECT_HUNG_TASK=y
|
|
@ -0,0 +1,143 @@
|
|||
# CONFIG_LOCALVERSION_AUTO is not set
|
||||
CONFIG_SYSVIPC=y
|
||||
CONFIG_POSIX_MQUEUE=y
|
||||
CONFIG_NO_HZ=y
|
||||
CONFIG_HIGH_RES_TIMERS=y
|
||||
CONFIG_LOG_BUF_SHIFT=14
|
||||
CONFIG_RELAY=y
|
||||
CONFIG_BLK_DEV_INITRD=y
|
||||
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
|
||||
# CONFIG_BASE_FULL is not set
|
||||
# CONFIG_COMPAT_BRK is not set
|
||||
CONFIG_PROFILING=y
|
||||
CONFIG_OPROFILE=m
|
||||
CONFIG_MODULES=y
|
||||
CONFIG_MODULE_UNLOAD=y
|
||||
# CONFIG_BLK_DEV_BSG is not set
|
||||
# CONFIG_IOSCHED_DEADLINE is not set
|
||||
CONFIG_BOARD_FAVR_32=y
|
||||
# CONFIG_OWNERSHIP_TRACE is not set
|
||||
CONFIG_NMI_DEBUGGING=y
|
||||
CONFIG_CPU_FREQ=y
|
||||
# CONFIG_CPU_FREQ_STAT is not set
|
||||
CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
|
||||
CONFIG_CPU_FREQ_GOV_USERSPACE=y
|
||||
CONFIG_AVR32_AT32AP_CPUFREQ=y
|
||||
CONFIG_NET=y
|
||||
CONFIG_PACKET=y
|
||||
CONFIG_UNIX=y
|
||||
CONFIG_XFRM_USER=m
|
||||
CONFIG_NET_KEY=m
|
||||
CONFIG_INET=y
|
||||
CONFIG_IP_PNP=y
|
||||
CONFIG_IP_PNP_DHCP=y
|
||||
CONFIG_NET_IPIP=m
|
||||
CONFIG_INET_AH=m
|
||||
CONFIG_INET_ESP=m
|
||||
CONFIG_INET_XFRM_MODE_TRANSPORT=m
|
||||
CONFIG_INET_XFRM_MODE_TUNNEL=m
|
||||
CONFIG_INET_XFRM_MODE_BEET=m
|
||||
# CONFIG_INET_LRO is not set
|
||||
CONFIG_IPV6=y
|
||||
CONFIG_INET6_AH=m
|
||||
CONFIG_INET6_ESP=m
|
||||
CONFIG_INET6_IPCOMP=m
|
||||
CONFIG_INET6_XFRM_MODE_TRANSPORT=m
|
||||
CONFIG_INET6_XFRM_MODE_TUNNEL=m
|
||||
CONFIG_INET6_XFRM_MODE_BEET=m
|
||||
CONFIG_IPV6_SIT=m
|
||||
CONFIG_IPV6_TUNNEL=m
|
||||
CONFIG_BRIDGE=m
|
||||
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
|
||||
# CONFIG_PREVENT_FIRMWARE_BUILD is not set
|
||||
# CONFIG_FW_LOADER is not set
|
||||
CONFIG_MTD=y
|
||||
CONFIG_MTD_CMDLINE_PARTS=y
|
||||
CONFIG_MTD_BLOCK=y
|
||||
CONFIG_MTD_CFI=y
|
||||
CONFIG_MTD_CFI_AMDSTD=y
|
||||
CONFIG_MTD_PHYSMAP=y
|
||||
CONFIG_BLK_DEV_LOOP=m
|
||||
CONFIG_BLK_DEV_NBD=m
|
||||
CONFIG_BLK_DEV_RAM=m
|
||||
CONFIG_ATMEL_TCLIB=y
|
||||
CONFIG_ATMEL_SSC=m
|
||||
CONFIG_NETDEVICES=y
|
||||
CONFIG_MACB=y
|
||||
CONFIG_PPP=m
|
||||
CONFIG_PPP_BSDCOMP=m
|
||||
CONFIG_PPP_DEFLATE=m
|
||||
CONFIG_PPP_ASYNC=m
|
||||
CONFIG_INPUT_MOUSEDEV=m
|
||||
CONFIG_INPUT_EVDEV=m
|
||||
# CONFIG_KEYBOARD_ATKBD is not set
|
||||
CONFIG_KEYBOARD_GPIO=m
|
||||
# CONFIG_MOUSE_PS2 is not set
|
||||
CONFIG_MOUSE_GPIO=m
|
||||
CONFIG_INPUT_TOUCHSCREEN=y
|
||||
CONFIG_TOUCHSCREEN_ADS7846=m
|
||||
# CONFIG_SERIO is not set
|
||||
# CONFIG_CONSOLE_TRANSLATIONS is not set
|
||||
# CONFIG_LEGACY_PTYS is not set
|
||||
# CONFIG_DEVKMEM is not set
|
||||
CONFIG_SERIAL_ATMEL=y
|
||||
CONFIG_SERIAL_ATMEL_CONSOLE=y
|
||||
# CONFIG_HW_RANDOM is not set
|
||||
CONFIG_I2C=m
|
||||
CONFIG_I2C_CHARDEV=m
|
||||
CONFIG_I2C_GPIO=m
|
||||
CONFIG_SPI=y
|
||||
CONFIG_SPI_ATMEL=y
|
||||
CONFIG_SPI_SPIDEV=m
|
||||
CONFIG_GPIO_SYSFS=y
|
||||
# CONFIG_HWMON is not set
|
||||
CONFIG_WATCHDOG=y
|
||||
CONFIG_AT32AP700X_WDT=y
|
||||
CONFIG_FB=y
|
||||
CONFIG_FB_ATMEL=y
|
||||
# CONFIG_LCD_CLASS_DEVICE is not set
|
||||
CONFIG_BACKLIGHT_PWM=m
|
||||
CONFIG_SOUND=m
|
||||
CONFIG_SOUND_PRIME=m
|
||||
CONFIG_USB_GADGET=y
|
||||
CONFIG_USB_ZERO=m
|
||||
CONFIG_USB_ETH=m
|
||||
CONFIG_USB_GADGETFS=m
|
||||
CONFIG_USB_MASS_STORAGE=m
|
||||
CONFIG_USB_G_SERIAL=m
|
||||
CONFIG_USB_CDC_COMPOSITE=m
|
||||
CONFIG_MMC=y
|
||||
CONFIG_MMC_ATMELMCI=y
|
||||
CONFIG_NEW_LEDS=y
|
||||
CONFIG_LEDS_CLASS=y
|
||||
CONFIG_LEDS_GPIO=y
|
||||
CONFIG_LEDS_TRIGGERS=y
|
||||
CONFIG_LEDS_TRIGGER_TIMER=y
|
||||
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
|
||||
CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
|
||||
CONFIG_RTC_CLASS=y
|
||||
CONFIG_RTC_DRV_AT32AP700X=y
|
||||
CONFIG_DMADEVICES=y
|
||||
CONFIG_PWM=y
|
||||
CONFIG_PWM_ATMEL=y
|
||||
CONFIG_EXT2_FS=y
|
||||
CONFIG_EXT3_FS=y
|
||||
# CONFIG_EXT3_FS_XATTR is not set
|
||||
# CONFIG_DNOTIFY is not set
|
||||
CONFIG_FUSE_FS=m
|
||||
CONFIG_MSDOS_FS=m
|
||||
CONFIG_VFAT_FS=m
|
||||
CONFIG_PROC_KCORE=y
|
||||
CONFIG_TMPFS=y
|
||||
CONFIG_CONFIGFS_FS=y
|
||||
CONFIG_JFFS2_FS=y
|
||||
# CONFIG_JFFS2_FS_WRITEBUFFER is not set
|
||||
CONFIG_NFS_FS=y
|
||||
CONFIG_ROOT_NFS=y
|
||||
CONFIG_NLS_CODEPAGE_437=m
|
||||
CONFIG_NLS_ISO8859_1=m
|
||||
CONFIG_NLS_UTF8=m
|
||||
CONFIG_DEBUG_FS=y
|
||||
CONFIG_FRAME_POINTER=y
|
||||
CONFIG_MAGIC_SYSRQ=y
|
||||
# CONFIG_CRYPTO_HW is not set
|
|
@ -0,0 +1,145 @@
|
|||
# CONFIG_LOCALVERSION_AUTO is not set
|
||||
CONFIG_SYSVIPC=y
|
||||
CONFIG_POSIX_MQUEUE=y
|
||||
CONFIG_NO_HZ=y
|
||||
CONFIG_HIGH_RES_TIMERS=y
|
||||
CONFIG_BSD_PROCESS_ACCT=y
|
||||
CONFIG_BSD_PROCESS_ACCT_V3=y
|
||||
CONFIG_LOG_BUF_SHIFT=14
|
||||
CONFIG_BLK_DEV_INITRD=y
|
||||
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
|
||||
# CONFIG_BASE_FULL is not set
|
||||
# CONFIG_COMPAT_BRK is not set
|
||||
CONFIG_PROFILING=y
|
||||
CONFIG_OPROFILE=m
|
||||
CONFIG_MODULES=y
|
||||
CONFIG_MODULE_UNLOAD=y
|
||||
CONFIG_MODULE_FORCE_UNLOAD=y
|
||||
# CONFIG_BLK_DEV_BSG is not set
|
||||
# CONFIG_IOSCHED_DEADLINE is not set
|
||||
CONFIG_BOARD_HAMMERHEAD=y
|
||||
CONFIG_BOARD_HAMMERHEAD_USB=y
|
||||
CONFIG_BOARD_HAMMERHEAD_LCD=y
|
||||
CONFIG_BOARD_HAMMERHEAD_SND=y
|
||||
# CONFIG_BOARD_HAMMERHEAD_FPGA is not set
|
||||
# CONFIG_OWNERSHIP_TRACE is not set
|
||||
CONFIG_CPU_FREQ=y
|
||||
# CONFIG_CPU_FREQ_STAT is not set
|
||||
CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
|
||||
CONFIG_CPU_FREQ_GOV_USERSPACE=y
|
||||
CONFIG_AVR32_AT32AP_CPUFREQ=y
|
||||
CONFIG_NET=y
|
||||
CONFIG_PACKET=y
|
||||
CONFIG_UNIX=y
|
||||
CONFIG_XFRM_USER=y
|
||||
CONFIG_NET_KEY=y
|
||||
CONFIG_INET=y
|
||||
CONFIG_IP_MULTICAST=y
|
||||
CONFIG_IP_ADVANCED_ROUTER=y
|
||||
CONFIG_IP_PNP=y
|
||||
CONFIG_IP_PNP_DHCP=y
|
||||
CONFIG_IP_MROUTE=y
|
||||
CONFIG_IP_PIMSM_V1=y
|
||||
CONFIG_SYN_COOKIES=y
|
||||
CONFIG_INET_AH=y
|
||||
CONFIG_INET_ESP=y
|
||||
CONFIG_INET_IPCOMP=y
|
||||
# CONFIG_INET_LRO is not set
|
||||
# CONFIG_IPV6 is not set
|
||||
CONFIG_NETFILTER=y
|
||||
# CONFIG_NETFILTER_ADVANCED is not set
|
||||
CONFIG_NETFILTER_XTABLES=y
|
||||
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
|
||||
# CONFIG_PREVENT_FIRMWARE_BUILD is not set
|
||||
# CONFIG_FW_LOADER is not set
|
||||
CONFIG_MTD=y
|
||||
CONFIG_MTD_CMDLINE_PARTS=y
|
||||
CONFIG_MTD_BLOCK=y
|
||||
CONFIG_MTD_CFI=y
|
||||
CONFIG_MTD_CFI_AMDSTD=y
|
||||
CONFIG_MTD_PHYSMAP=y
|
||||
CONFIG_MTD_DATAFLASH=y
|
||||
CONFIG_BLK_DEV_RAM=m
|
||||
CONFIG_ATMEL_TCLIB=y
|
||||
CONFIG_SCSI=m
|
||||
CONFIG_BLK_DEV_SD=m
|
||||
CONFIG_NETDEVICES=y
|
||||
CONFIG_MACB=y
|
||||
CONFIG_INPUT_FF_MEMLESS=m
|
||||
CONFIG_INPUT_EVDEV=m
|
||||
CONFIG_INPUT_TOUCHSCREEN=y
|
||||
# CONFIG_LEGACY_PTYS is not set
|
||||
CONFIG_SERIAL_ATMEL=y
|
||||
CONFIG_SERIAL_ATMEL_CONSOLE=y
|
||||
# CONFIG_HW_RANDOM is not set
|
||||
CONFIG_I2C=m
|
||||
CONFIG_I2C_CHARDEV=m
|
||||
CONFIG_I2C_GPIO=m
|
||||
CONFIG_SPI=y
|
||||
CONFIG_SPI_ATMEL=y
|
||||
CONFIG_SPI_SPIDEV=m
|
||||
# CONFIG_HWMON is not set
|
||||
CONFIG_WATCHDOG=y
|
||||
CONFIG_AT32AP700X_WDT=y
|
||||
CONFIG_FB=y
|
||||
CONFIG_FB_ATMEL=y
|
||||
CONFIG_FRAMEBUFFER_CONSOLE=y
|
||||
CONFIG_SOUND=m
|
||||
CONFIG_SND=m
|
||||
CONFIG_SND_SEQUENCER=m
|
||||
CONFIG_SND_MIXER_OSS=m
|
||||
CONFIG_SND_PCM_OSS=m
|
||||
CONFIG_SND_SEQUENCER_OSS=y
|
||||
# CONFIG_SND_SUPPORT_OLD_API is not set
|
||||
CONFIG_HID_A4TECH=m
|
||||
CONFIG_HID_APPLE=m
|
||||
CONFIG_HID_BELKIN=m
|
||||
CONFIG_HID_CHERRY=m
|
||||
CONFIG_HID_CHICONY=m
|
||||
CONFIG_HID_CYPRESS=m
|
||||
CONFIG_HID_EZKEY=m
|
||||
CONFIG_HID_GYRATION=m
|
||||
CONFIG_HID_LOGITECH=m
|
||||
CONFIG_HID_MICROSOFT=m
|
||||
CONFIG_HID_MONTEREY=m
|
||||
CONFIG_HID_PANTHERLORD=m
|
||||
CONFIG_HID_PETALYNX=m
|
||||
CONFIG_HID_SAMSUNG=m
|
||||
CONFIG_HID_SUNPLUS=m
|
||||
CONFIG_USB=m
|
||||
CONFIG_USB_MON=m
|
||||
CONFIG_USB_ISP116X_HCD=m
|
||||
CONFIG_USB_STORAGE=m
|
||||
CONFIG_USB_GADGET=y
|
||||
CONFIG_USB_ZERO=m
|
||||
CONFIG_USB_ETH=m
|
||||
CONFIG_USB_GADGETFS=m
|
||||
CONFIG_USB_MASS_STORAGE=m
|
||||
CONFIG_USB_G_SERIAL=m
|
||||
CONFIG_MMC=m
|
||||
CONFIG_MMC_ATMELMCI=m
|
||||
CONFIG_RTC_CLASS=y
|
||||
CONFIG_RTC_DRV_AT32AP700X=y
|
||||
CONFIG_EXT2_FS=m
|
||||
# CONFIG_DNOTIFY is not set
|
||||
CONFIG_MSDOS_FS=y
|
||||
CONFIG_VFAT_FS=m
|
||||
CONFIG_FAT_DEFAULT_CODEPAGE=850
|
||||
CONFIG_TMPFS=y
|
||||
CONFIG_CONFIGFS_FS=y
|
||||
CONFIG_JFFS2_FS=y
|
||||
CONFIG_NFS_FS=y
|
||||
CONFIG_ROOT_NFS=y
|
||||
CONFIG_NLS_CODEPAGE_437=m
|
||||
CONFIG_NLS_CODEPAGE_850=m
|
||||
CONFIG_NLS_ISO8859_1=m
|
||||
CONFIG_NLS_UTF8=m
|
||||
CONFIG_FRAME_POINTER=y
|
||||
CONFIG_MAGIC_SYSRQ=y
|
||||
CONFIG_CRYPTO_ECB=m
|
||||
CONFIG_CRYPTO_PCBC=m
|
||||
CONFIG_CRYPTO_ARC4=m
|
||||
# CONFIG_CRYPTO_ANSI_CPRNG is not set
|
||||
CONFIG_CRC_CCITT=m
|
||||
CONFIG_CRC_ITU_T=m
|
||||
CONFIG_CRC7=m
|
|
@ -0,0 +1,115 @@
|
|||
# CONFIG_LOCALVERSION_AUTO is not set
|
||||
CONFIG_SYSVIPC=y
|
||||
CONFIG_POSIX_MQUEUE=y
|
||||
CONFIG_NO_HZ=y
|
||||
CONFIG_HIGH_RES_TIMERS=y
|
||||
CONFIG_BSD_PROCESS_ACCT=y
|
||||
CONFIG_BSD_PROCESS_ACCT_V3=y
|
||||
CONFIG_LOG_BUF_SHIFT=14
|
||||
CONFIG_BLK_DEV_INITRD=y
|
||||
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
|
||||
# CONFIG_BASE_FULL is not set
|
||||
CONFIG_MODULES=y
|
||||
CONFIG_MODULE_UNLOAD=y
|
||||
CONFIG_MODULE_FORCE_UNLOAD=y
|
||||
# CONFIG_BLK_DEV_BSG is not set
|
||||
# CONFIG_IOSCHED_DEADLINE is not set
|
||||
CONFIG_BOARD_MERISC=y
|
||||
CONFIG_AP700X_32_BIT_SMC=y
|
||||
# CONFIG_OWNERSHIP_TRACE is not set
|
||||
CONFIG_NET=y
|
||||
CONFIG_PACKET=y
|
||||
CONFIG_UNIX=y
|
||||
CONFIG_XFRM_USER=y
|
||||
CONFIG_NET_KEY=y
|
||||
CONFIG_INET=y
|
||||
CONFIG_IP_MULTICAST=y
|
||||
CONFIG_IP_ADVANCED_ROUTER=y
|
||||
CONFIG_IP_PNP=y
|
||||
CONFIG_IP_PNP_DHCP=y
|
||||
CONFIG_IP_MROUTE=y
|
||||
CONFIG_IP_PIMSM_V1=y
|
||||
CONFIG_SYN_COOKIES=y
|
||||
CONFIG_INET_AH=y
|
||||
CONFIG_INET_ESP=y
|
||||
CONFIG_INET_IPCOMP=y
|
||||
# CONFIG_INET_LRO is not set
|
||||
# CONFIG_IPV6 is not set
|
||||
CONFIG_CAN=y
|
||||
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
|
||||
# CONFIG_PREVENT_FIRMWARE_BUILD is not set
|
||||
# CONFIG_FW_LOADER is not set
|
||||
CONFIG_MTD=y
|
||||
CONFIG_MTD_BLOCK=y
|
||||
CONFIG_MTD_CFI=y
|
||||
CONFIG_MTD_JEDECPROBE=y
|
||||
CONFIG_MTD_CFI_AMDSTD=y
|
||||
CONFIG_MTD_ABSENT=y
|
||||
CONFIG_MTD_PHYSMAP=y
|
||||
CONFIG_MTD_BLOCK2MTD=y
|
||||
CONFIG_BLK_DEV_LOOP=y
|
||||
CONFIG_ATMEL_SSC=y
|
||||
CONFIG_SCSI=y
|
||||
CONFIG_BLK_DEV_SD=y
|
||||
# CONFIG_SCSI_LOWLEVEL is not set
|
||||
CONFIG_NETDEVICES=y
|
||||
CONFIG_MACB=y
|
||||
# CONFIG_INPUT_MOUSEDEV is not set
|
||||
CONFIG_INPUT_EVDEV=y
|
||||
# CONFIG_KEYBOARD_ATKBD is not set
|
||||
# CONFIG_INPUT_MOUSE is not set
|
||||
CONFIG_INPUT_TOUCHSCREEN=y
|
||||
CONFIG_TOUCHSCREEN_ADS7846=y
|
||||
CONFIG_INPUT_MISC=y
|
||||
CONFIG_INPUT_UINPUT=y
|
||||
# CONFIG_SERIO is not set
|
||||
# CONFIG_CONSOLE_TRANSLATIONS is not set
|
||||
# CONFIG_LEGACY_PTYS is not set
|
||||
# CONFIG_DEVKMEM is not set
|
||||
CONFIG_SERIAL_ATMEL=y
|
||||
CONFIG_SERIAL_ATMEL_CONSOLE=y
|
||||
# CONFIG_HW_RANDOM is not set
|
||||
CONFIG_I2C=y
|
||||
CONFIG_I2C_CHARDEV=y
|
||||
CONFIG_I2C_GPIO=y
|
||||
CONFIG_SPI=y
|
||||
CONFIG_SPI_ATMEL=y
|
||||
CONFIG_SPI_SPIDEV=y
|
||||
CONFIG_GPIO_SYSFS=y
|
||||
# CONFIG_HWMON is not set
|
||||
CONFIG_WATCHDOG=y
|
||||
CONFIG_FB=y
|
||||
CONFIG_FB_ATMEL=y
|
||||
# CONFIG_LCD_CLASS_DEVICE is not set
|
||||
CONFIG_FRAMEBUFFER_CONSOLE=y
|
||||
CONFIG_LOGO=y
|
||||
CONFIG_MMC=y
|
||||
CONFIG_MMC_ATMELMCI=y
|
||||
CONFIG_NEW_LEDS=y
|
||||
CONFIG_LEDS_CLASS=y
|
||||
CONFIG_LEDS_PWM=y
|
||||
CONFIG_RTC_CLASS=y
|
||||
# CONFIG_RTC_HCTOSYS is not set
|
||||
CONFIG_RTC_DRV_PCF8563=y
|
||||
CONFIG_DMADEVICES=y
|
||||
CONFIG_UIO=y
|
||||
CONFIG_PWM=y
|
||||
CONFIG_PWM_ATMEL=m
|
||||
CONFIG_EXT2_FS=y
|
||||
# CONFIG_DNOTIFY is not set
|
||||
CONFIG_FUSE_FS=y
|
||||
CONFIG_MSDOS_FS=y
|
||||
CONFIG_VFAT_FS=y
|
||||
CONFIG_TMPFS=y
|
||||
CONFIG_CONFIGFS_FS=y
|
||||
CONFIG_JFFS2_FS=y
|
||||
CONFIG_JFFS2_FS_WBUF_VERIFY=y
|
||||
CONFIG_CRAMFS=y
|
||||
CONFIG_NFS_FS=y
|
||||
CONFIG_ROOT_NFS=y
|
||||
CONFIG_NLS_CODEPAGE_437=y
|
||||
CONFIG_NLS_CODEPAGE_850=y
|
||||
CONFIG_NLS_ISO8859_1=y
|
||||
CONFIG_NLS_UTF8=y
|
||||
# CONFIG_CRYPTO_ANSI_CPRNG is not set
|
||||
# CONFIG_CRYPTO_HW is not set
|
|
@ -0,0 +1,114 @@
|
|||
# CONFIG_LOCALVERSION_AUTO is not set
|
||||
CONFIG_SYSVIPC=y
|
||||
CONFIG_POSIX_MQUEUE=y
|
||||
CONFIG_NO_HZ=y
|
||||
CONFIG_HIGH_RES_TIMERS=y
|
||||
CONFIG_BSD_PROCESS_ACCT=y
|
||||
CONFIG_BSD_PROCESS_ACCT_V3=y
|
||||
CONFIG_LOG_BUF_SHIFT=14
|
||||
CONFIG_BLK_DEV_INITRD=y
|
||||
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
|
||||
# CONFIG_BASE_FULL is not set
|
||||
# CONFIG_COMPAT_BRK is not set
|
||||
CONFIG_PROFILING=y
|
||||
# CONFIG_BLK_DEV_BSG is not set
|
||||
# CONFIG_IOSCHED_DEADLINE is not set
|
||||
CONFIG_BOARD_MIMC200=y
|
||||
# CONFIG_OWNERSHIP_TRACE is not set
|
||||
CONFIG_NMI_DEBUGGING=y
|
||||
CONFIG_CPU_FREQ=y
|
||||
# CONFIG_CPU_FREQ_STAT is not set
|
||||
CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
|
||||
CONFIG_CPU_FREQ_GOV_USERSPACE=y
|
||||
CONFIG_AVR32_AT32AP_CPUFREQ=y
|
||||
CONFIG_NET=y
|
||||
CONFIG_PACKET=y
|
||||
CONFIG_UNIX=y
|
||||
CONFIG_XFRM_USER=y
|
||||
CONFIG_NET_KEY=y
|
||||
CONFIG_INET=y
|
||||
CONFIG_IP_MULTICAST=y
|
||||
CONFIG_IP_ADVANCED_ROUTER=y
|
||||
CONFIG_IP_PNP=y
|
||||
CONFIG_IP_PNP_DHCP=y
|
||||
CONFIG_IP_MROUTE=y
|
||||
CONFIG_IP_PIMSM_V1=y
|
||||
CONFIG_SYN_COOKIES=y
|
||||
CONFIG_INET_AH=y
|
||||
CONFIG_INET_ESP=y
|
||||
CONFIG_INET_IPCOMP=y
|
||||
# CONFIG_INET_LRO is not set
|
||||
CONFIG_INET6_AH=y
|
||||
CONFIG_INET6_ESP=y
|
||||
CONFIG_INET6_IPCOMP=y
|
||||
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
|
||||
# CONFIG_PREVENT_FIRMWARE_BUILD is not set
|
||||
# CONFIG_FW_LOADER is not set
|
||||
CONFIG_MTD=y
|
||||
CONFIG_MTD_CMDLINE_PARTS=y
|
||||
CONFIG_MTD_BLOCK=y
|
||||
CONFIG_MTD_CFI=y
|
||||
CONFIG_MTD_CFI_AMDSTD=y
|
||||
CONFIG_MTD_PHYSMAP=y
|
||||
CONFIG_MTD_DATAFLASH=y
|
||||
CONFIG_ATMEL_TCLIB=y
|
||||
CONFIG_EEPROM_AT24=y
|
||||
CONFIG_EEPROM_AT25=y
|
||||
CONFIG_NETDEVICES=y
|
||||
CONFIG_MACB=y
|
||||
# CONFIG_INPUT is not set
|
||||
# CONFIG_SERIO is not set
|
||||
# CONFIG_VT is not set
|
||||
# CONFIG_LEGACY_PTYS is not set
|
||||
# CONFIG_DEVKMEM is not set
|
||||
CONFIG_SERIAL_ATMEL=y
|
||||
CONFIG_SERIAL_ATMEL_CONSOLE=y
|
||||
# CONFIG_HW_RANDOM is not set
|
||||
CONFIG_I2C=y
|
||||
CONFIG_I2C_CHARDEV=y
|
||||
CONFIG_I2C_GPIO=y
|
||||
CONFIG_SPI=y
|
||||
CONFIG_SPI_ATMEL=y
|
||||
CONFIG_GPIO_SYSFS=y
|
||||
# CONFIG_HWMON is not set
|
||||
CONFIG_WATCHDOG=y
|
||||
CONFIG_AT32AP700X_WDT=y
|
||||
CONFIG_FB=y
|
||||
CONFIG_FB_ATMEL=y
|
||||
# CONFIG_USB_SUPPORT is not set
|
||||
CONFIG_MMC=y
|
||||
CONFIG_MMC_TEST=y
|
||||
CONFIG_MMC_ATMELMCI=y
|
||||
CONFIG_MMC_SPI=y
|
||||
CONFIG_NEW_LEDS=y
|
||||
CONFIG_LEDS_CLASS=y
|
||||
CONFIG_LEDS_GPIO=y
|
||||
CONFIG_LEDS_TRIGGERS=y
|
||||
CONFIG_LEDS_TRIGGER_TIMER=y
|
||||
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
|
||||
CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
|
||||
CONFIG_RTC_CLASS=y
|
||||
CONFIG_RTC_DRV_DS1390=y
|
||||
CONFIG_DMADEVICES=y
|
||||
CONFIG_EXT2_FS=y
|
||||
CONFIG_EXT3_FS=y
|
||||
# CONFIG_EXT3_FS_XATTR is not set
|
||||
# CONFIG_DNOTIFY is not set
|
||||
CONFIG_MSDOS_FS=y
|
||||
CONFIG_VFAT_FS=y
|
||||
CONFIG_FAT_DEFAULT_CODEPAGE=850
|
||||
CONFIG_TMPFS=y
|
||||
CONFIG_CONFIGFS_FS=y
|
||||
CONFIG_JFFS2_FS=y
|
||||
CONFIG_NFS_FS=y
|
||||
CONFIG_ROOT_NFS=y
|
||||
CONFIG_NLS_CODEPAGE_437=y
|
||||
CONFIG_NLS_CODEPAGE_850=y
|
||||
CONFIG_NLS_ISO8859_1=y
|
||||
CONFIG_NLS_UTF8=y
|
||||
CONFIG_FRAME_POINTER=y
|
||||
CONFIG_MAGIC_SYSRQ=y
|
||||
CONFIG_CRYPTO_ECB=y
|
||||
CONFIG_CRYPTO_PCBC=y
|
||||
CONFIG_CRYPTO_ARC4=y
|
||||
CONFIG_CRC_CCITT=y
|
|
@ -0,0 +1,24 @@
|
|||
|
||||
generic-y += clkdev.h
|
||||
generic-y += cputime.h
|
||||
generic-y += delay.h
|
||||
generic-y += device.h
|
||||
generic-y += div64.h
|
||||
generic-y += emergency-restart.h
|
||||
generic-y += exec.h
|
||||
generic-y += futex.h
|
||||
generic-y += irq_regs.h
|
||||
generic-y += irq_work.h
|
||||
generic-y += local.h
|
||||
generic-y += local64.h
|
||||
generic-y += mcs_spinlock.h
|
||||
generic-y += mm-arch-hooks.h
|
||||
generic-y += param.h
|
||||
generic-y += percpu.h
|
||||
generic-y += preempt.h
|
||||
generic-y += sections.h
|
||||
generic-y += topology.h
|
||||
generic-y += trace_clock.h
|
||||
generic-y += vga.h
|
||||
generic-y += word-at-a-time.h
|
||||
generic-y += xor.h
|
|
@ -0,0 +1,43 @@
|
|||
/*
|
||||
* Defitions for the address spaces of the AVR32 CPUs. Heavily based on
|
||||
* include/asm-sh/addrspace.h
|
||||
*
|
||||
* Copyright (C) 2004-2006 Atmel Corporation
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
#ifndef __ASM_AVR32_ADDRSPACE_H
|
||||
#define __ASM_AVR32_ADDRSPACE_H
|
||||
|
||||
#ifdef CONFIG_MMU
|
||||
|
||||
/* Memory segments when segmentation is enabled */
|
||||
#define P0SEG 0x00000000
|
||||
#define P1SEG 0x80000000
|
||||
#define P2SEG 0xa0000000
|
||||
#define P3SEG 0xc0000000
|
||||
#define P4SEG 0xe0000000
|
||||
|
||||
/* Returns the privileged segment base of a given address */
|
||||
#define PXSEG(a) (((unsigned long)(a)) & 0xe0000000)
|
||||
|
||||
/* Returns the physical address of a PnSEG (n=1,2) address */
|
||||
#define PHYSADDR(a) (((unsigned long)(a)) & 0x1fffffff)
|
||||
|
||||
/*
|
||||
* Map an address to a certain privileged segment
|
||||
*/
|
||||
#define P1SEGADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) \
|
||||
| P1SEG))
|
||||
#define P2SEGADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) \
|
||||
| P2SEG))
|
||||
#define P3SEGADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) \
|
||||
| P3SEG))
|
||||
#define P4SEGADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) \
|
||||
| P4SEG))
|
||||
|
||||
#endif /* CONFIG_MMU */
|
||||
|
||||
#endif /* __ASM_AVR32_ADDRSPACE_H */
|
|
@ -0,0 +1 @@
|
|||
#include <generated/asm-offsets.h>
|
|
@ -0,0 +1,102 @@
|
|||
/*
|
||||
* Copyright (C) 2004-2006 Atmel Corporation
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
#ifndef __ASM_AVR32_ASM_H__
|
||||
#define __ASM_AVR32_ASM_H__
|
||||
|
||||
#include <asm/sysreg.h>
|
||||
#include <asm/asm-offsets.h>
|
||||
#include <asm/thread_info.h>
|
||||
|
||||
#define mask_interrupts ssrf SYSREG_GM_OFFSET
|
||||
#define mask_exceptions ssrf SYSREG_EM_OFFSET
|
||||
#define unmask_interrupts csrf SYSREG_GM_OFFSET
|
||||
#define unmask_exceptions csrf SYSREG_EM_OFFSET
|
||||
|
||||
#ifdef CONFIG_FRAME_POINTER
|
||||
.macro save_fp
|
||||
st.w --sp, r7
|
||||
.endm
|
||||
.macro restore_fp
|
||||
ld.w r7, sp++
|
||||
.endm
|
||||
.macro zero_fp
|
||||
mov r7, 0
|
||||
.endm
|
||||
#else
|
||||
.macro save_fp
|
||||
.endm
|
||||
.macro restore_fp
|
||||
.endm
|
||||
.macro zero_fp
|
||||
.endm
|
||||
#endif
|
||||
.macro get_thread_info reg
|
||||
mov \reg, sp
|
||||
andl \reg, ~(THREAD_SIZE - 1) & 0xffff
|
||||
.endm
|
||||
|
||||
/* Save and restore registers */
|
||||
.macro save_min sr, tmp=lr
|
||||
pushm lr
|
||||
mfsr \tmp, \sr
|
||||
zero_fp
|
||||
st.w --sp, \tmp
|
||||
.endm
|
||||
|
||||
.macro restore_min sr, tmp=lr
|
||||
ld.w \tmp, sp++
|
||||
mtsr \sr, \tmp
|
||||
popm lr
|
||||
.endm
|
||||
|
||||
.macro save_half sr, tmp=lr
|
||||
save_fp
|
||||
pushm r8-r9,r10,r11,r12,lr
|
||||
zero_fp
|
||||
mfsr \tmp, \sr
|
||||
st.w --sp, \tmp
|
||||
.endm
|
||||
|
||||
.macro restore_half sr, tmp=lr
|
||||
ld.w \tmp, sp++
|
||||
mtsr \sr, \tmp
|
||||
popm r8-r9,r10,r11,r12,lr
|
||||
restore_fp
|
||||
.endm
|
||||
|
||||
.macro save_full_user sr, tmp=lr
|
||||
stmts --sp, r0,r1,r2,r3,r4,r5,r6,r7,r8,r9,r10,r11,r12,sp,lr
|
||||
st.w --sp, lr
|
||||
zero_fp
|
||||
mfsr \tmp, \sr
|
||||
st.w --sp, \tmp
|
||||
.endm
|
||||
|
||||
.macro restore_full_user sr, tmp=lr
|
||||
ld.w \tmp, sp++
|
||||
mtsr \sr, \tmp
|
||||
ld.w lr, sp++
|
||||
ldmts sp++, r0,r1,r2,r3,r4,r5,r6,r7,r8,r9,r10,r11,r12,sp,lr
|
||||
.endm
|
||||
|
||||
/* uaccess macros */
|
||||
.macro branch_if_kernel scratch, label
|
||||
get_thread_info \scratch
|
||||
ld.w \scratch, \scratch[TI_flags]
|
||||
bld \scratch, TIF_USERSPACE
|
||||
brcc \label
|
||||
.endm
|
||||
|
||||
.macro ret_if_privileged scratch, addr, size, ret
|
||||
sub \scratch, \size, 1
|
||||
add \scratch, \addr
|
||||
retcs \ret
|
||||
retmi \ret
|
||||
.endm
|
||||
|
||||
#endif /* __ASM_AVR32_ASM_H__ */
|
|
@ -0,0 +1,199 @@
|
|||
/*
|
||||
* Atomic operations that C can't guarantee us. Useful for
|
||||
* resource counting etc.
|
||||
*
|
||||
* But use these as seldom as possible since they are slower than
|
||||
* regular operations.
|
||||
*
|
||||
* Copyright (C) 2004-2006 Atmel Corporation
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
#ifndef __ASM_AVR32_ATOMIC_H
|
||||
#define __ASM_AVR32_ATOMIC_H
|
||||
|
||||
#include <linux/types.h>
|
||||
#include <asm/cmpxchg.h>
|
||||
|
||||
#define ATOMIC_INIT(i) { (i) }
|
||||
|
||||
#define atomic_read(v) READ_ONCE((v)->counter)
|
||||
#define atomic_set(v, i) WRITE_ONCE(((v)->counter), (i))
|
||||
|
||||
#define ATOMIC_OP_RETURN(op, asm_op, asm_con) \
|
||||
static inline int __atomic_##op##_return(int i, atomic_t *v) \
|
||||
{ \
|
||||
int result; \
|
||||
\
|
||||
asm volatile( \
|
||||
"/* atomic_" #op "_return */\n" \
|
||||
"1: ssrf 5\n" \
|
||||
" ld.w %0, %2\n" \
|
||||
" " #asm_op " %0, %3\n" \
|
||||
" stcond %1, %0\n" \
|
||||
" brne 1b" \
|
||||
: "=&r" (result), "=o" (v->counter) \
|
||||
: "m" (v->counter), #asm_con (i) \
|
||||
: "cc"); \
|
||||
\
|
||||
return result; \
|
||||
}
|
||||
|
||||
ATOMIC_OP_RETURN(sub, sub, rKs21)
|
||||
ATOMIC_OP_RETURN(add, add, r)
|
||||
|
||||
#define ATOMIC_OP(op, asm_op) \
|
||||
ATOMIC_OP_RETURN(op, asm_op, r) \
|
||||
static inline void atomic_##op(int i, atomic_t *v) \
|
||||
{ \
|
||||
(void)__atomic_##op##_return(i, v); \
|
||||
}
|
||||
|
||||
ATOMIC_OP(and, and)
|
||||
ATOMIC_OP(or, or)
|
||||
ATOMIC_OP(xor, eor)
|
||||
|
||||
#undef ATOMIC_OP
|
||||
#undef ATOMIC_OP_RETURN
|
||||
|
||||
/*
|
||||
* Probably found the reason why we want to use sub with the signed 21-bit
|
||||
* limit, it uses one less register than the add instruction that can add up to
|
||||
* 32-bit values.
|
||||
*
|
||||
* Both instructions are 32-bit, to use a 16-bit instruction the immediate is
|
||||
* very small; 4 bit.
|
||||
*
|
||||
* sub 32-bit, type IV, takes a register and subtracts a 21-bit immediate.
|
||||
* add 32-bit, type II, adds two register values together.
|
||||
*/
|
||||
#define IS_21BIT_CONST(i) \
|
||||
(__builtin_constant_p(i) && ((i) >= -1048575) && ((i) <= 1048576))
|
||||
|
||||
/*
|
||||
* atomic_add_return - add integer to atomic variable
|
||||
* @i: integer value to add
|
||||
* @v: pointer of type atomic_t
|
||||
*
|
||||
* Atomically adds @i to @v. Returns the resulting value.
|
||||
*/
|
||||
static inline int atomic_add_return(int i, atomic_t *v)
|
||||
{
|
||||
if (IS_21BIT_CONST(i))
|
||||
return __atomic_sub_return(-i, v);
|
||||
|
||||
return __atomic_add_return(i, v);
|
||||
}
|
||||
|
||||
/*
|
||||
* atomic_sub_return - subtract the atomic variable
|
||||
* @i: integer value to subtract
|
||||
* @v: pointer of type atomic_t
|
||||
*
|
||||
* Atomically subtracts @i from @v. Returns the resulting value.
|
||||
*/
|
||||
static inline int atomic_sub_return(int i, atomic_t *v)
|
||||
{
|
||||
if (IS_21BIT_CONST(i))
|
||||
return __atomic_sub_return(i, v);
|
||||
|
||||
return __atomic_add_return(-i, v);
|
||||
}
|
||||
|
||||
/*
|
||||
* __atomic_add_unless - add unless the number is a given value
|
||||
* @v: pointer of type atomic_t
|
||||
* @a: the amount to add to v...
|
||||
* @u: ...unless v is equal to u.
|
||||
*
|
||||
* Atomically adds @a to @v, so long as it was not @u.
|
||||
* Returns the old value of @v.
|
||||
*/
|
||||
static inline int __atomic_add_unless(atomic_t *v, int a, int u)
|
||||
{
|
||||
int tmp, old = atomic_read(v);
|
||||
|
||||
if (IS_21BIT_CONST(a)) {
|
||||
asm volatile(
|
||||
"/* __atomic_sub_unless */\n"
|
||||
"1: ssrf 5\n"
|
||||
" ld.w %0, %2\n"
|
||||
" cp.w %0, %4\n"
|
||||
" breq 1f\n"
|
||||
" sub %0, %3\n"
|
||||
" stcond %1, %0\n"
|
||||
" brne 1b\n"
|
||||
"1:"
|
||||
: "=&r"(tmp), "=o"(v->counter)
|
||||
: "m"(v->counter), "rKs21"(-a), "rKs21"(u)
|
||||
: "cc", "memory");
|
||||
} else {
|
||||
asm volatile(
|
||||
"/* __atomic_add_unless */\n"
|
||||
"1: ssrf 5\n"
|
||||
" ld.w %0, %2\n"
|
||||
" cp.w %0, %4\n"
|
||||
" breq 1f\n"
|
||||
" add %0, %3\n"
|
||||
" stcond %1, %0\n"
|
||||
" brne 1b\n"
|
||||
"1:"
|
||||
: "=&r"(tmp), "=o"(v->counter)
|
||||
: "m"(v->counter), "r"(a), "ir"(u)
|
||||
: "cc", "memory");
|
||||
}
|
||||
|
||||
return old;
|
||||
}
|
||||
|
||||
#undef IS_21BIT_CONST
|
||||
|
||||
/*
|
||||
* atomic_sub_if_positive - conditionally subtract integer from atomic variable
|
||||
* @i: integer value to subtract
|
||||
* @v: pointer of type atomic_t
|
||||
*
|
||||
* Atomically test @v and subtract @i if @v is greater or equal than @i.
|
||||
* The function returns the old value of @v minus @i.
|
||||
*/
|
||||
static inline int atomic_sub_if_positive(int i, atomic_t *v)
|
||||
{
|
||||
int result;
|
||||
|
||||
asm volatile(
|
||||
"/* atomic_sub_if_positive */\n"
|
||||
"1: ssrf 5\n"
|
||||
" ld.w %0, %2\n"
|
||||
" sub %0, %3\n"
|
||||
" brlt 1f\n"
|
||||
" stcond %1, %0\n"
|
||||
" brne 1b\n"
|
||||
"1:"
|
||||
: "=&r"(result), "=o"(v->counter)
|
||||
: "m"(v->counter), "ir"(i)
|
||||
: "cc", "memory");
|
||||
|
||||
return result;
|
||||
}
|
||||
|
||||
#define atomic_xchg(v, new) (xchg(&((v)->counter), new))
|
||||
#define atomic_cmpxchg(v, o, n) (cmpxchg(&((v)->counter), (o), (n)))
|
||||
|
||||
#define atomic_sub(i, v) (void)atomic_sub_return(i, v)
|
||||
#define atomic_add(i, v) (void)atomic_add_return(i, v)
|
||||
#define atomic_dec(v) atomic_sub(1, (v))
|
||||
#define atomic_inc(v) atomic_add(1, (v))
|
||||
|
||||
#define atomic_dec_return(v) atomic_sub_return(1, v)
|
||||
#define atomic_inc_return(v) atomic_add_return(1, v)
|
||||
|
||||
#define atomic_sub_and_test(i, v) (atomic_sub_return(i, v) == 0)
|
||||
#define atomic_inc_and_test(v) (atomic_add_return(1, v) == 0)
|
||||
#define atomic_dec_and_test(v) (atomic_sub_return(1, v) == 0)
|
||||
#define atomic_add_negative(i, v) (atomic_add_return(i, v) < 0)
|
||||
|
||||
#define atomic_dec_if_positive(v) atomic_sub_if_positive(1, v)
|
||||
|
||||
#endif /* __ASM_AVR32_ATOMIC_H */
|
|
@ -0,0 +1,22 @@
|
|||
/*
|
||||
* Copyright (C) 2004-2006 Atmel Corporation
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
#ifndef __ASM_AVR32_BARRIER_H
|
||||
#define __ASM_AVR32_BARRIER_H
|
||||
|
||||
/*
|
||||
* Weirdest thing ever.. no full barrier, but it has a write barrier!
|
||||
*/
|
||||
#define wmb() asm volatile("sync 0" : : : "memory")
|
||||
|
||||
#ifdef CONFIG_SMP
|
||||
# error "The AVR32 port does not support SMP"
|
||||
#endif
|
||||
|
||||
#include <asm-generic/barrier.h>
|
||||
|
||||
#endif /* __ASM_AVR32_BARRIER_H */
|
|
@ -0,0 +1,314 @@
|
|||
/*
|
||||
* Copyright (C) 2004-2006 Atmel Corporation
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
#ifndef __ASM_AVR32_BITOPS_H
|
||||
#define __ASM_AVR32_BITOPS_H
|
||||
|
||||
#ifndef _LINUX_BITOPS_H
|
||||
#error only <linux/bitops.h> can be included directly
|
||||
#endif
|
||||
|
||||
#include <asm/byteorder.h>
|
||||
#include <asm/barrier.h>
|
||||
|
||||
/*
|
||||
* set_bit - Atomically set a bit in memory
|
||||
* @nr: the bit to set
|
||||
* @addr: the address to start counting from
|
||||
*
|
||||
* This function is atomic and may not be reordered. See __set_bit()
|
||||
* if you do not require the atomic guarantees.
|
||||
*
|
||||
* Note that @nr may be almost arbitrarily large; this function is not
|
||||
* restricted to acting on a single-word quantity.
|
||||
*/
|
||||
static inline void set_bit(int nr, volatile void * addr)
|
||||
{
|
||||
unsigned long *p = ((unsigned long *)addr) + nr / BITS_PER_LONG;
|
||||
unsigned long tmp;
|
||||
|
||||
if (__builtin_constant_p(nr)) {
|
||||
asm volatile(
|
||||
"1: ssrf 5\n"
|
||||
" ld.w %0, %2\n"
|
||||
" sbr %0, %3\n"
|
||||
" stcond %1, %0\n"
|
||||
" brne 1b"
|
||||
: "=&r"(tmp), "=o"(*p)
|
||||
: "m"(*p), "i"(nr)
|
||||
: "cc");
|
||||
} else {
|
||||
unsigned long mask = 1UL << (nr % BITS_PER_LONG);
|
||||
asm volatile(
|
||||
"1: ssrf 5\n"
|
||||
" ld.w %0, %2\n"
|
||||
" or %0, %3\n"
|
||||
" stcond %1, %0\n"
|
||||
" brne 1b"
|
||||
: "=&r"(tmp), "=o"(*p)
|
||||
: "m"(*p), "r"(mask)
|
||||
: "cc");
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* clear_bit - Clears a bit in memory
|
||||
* @nr: Bit to clear
|
||||
* @addr: Address to start counting from
|
||||
*
|
||||
* clear_bit() is atomic and may not be reordered. However, it does
|
||||
* not contain a memory barrier, so if it is used for locking purposes,
|
||||
* you should call smp_mb__before_atomic() and/or smp_mb__after_atomic()
|
||||
* in order to ensure changes are visible on other processors.
|
||||
*/
|
||||
static inline void clear_bit(int nr, volatile void * addr)
|
||||
{
|
||||
unsigned long *p = ((unsigned long *)addr) + nr / BITS_PER_LONG;
|
||||
unsigned long tmp;
|
||||
|
||||
if (__builtin_constant_p(nr)) {
|
||||
asm volatile(
|
||||
"1: ssrf 5\n"
|
||||
" ld.w %0, %2\n"
|
||||
" cbr %0, %3\n"
|
||||
" stcond %1, %0\n"
|
||||
" brne 1b"
|
||||
: "=&r"(tmp), "=o"(*p)
|
||||
: "m"(*p), "i"(nr)
|
||||
: "cc");
|
||||
} else {
|
||||
unsigned long mask = 1UL << (nr % BITS_PER_LONG);
|
||||
asm volatile(
|
||||
"1: ssrf 5\n"
|
||||
" ld.w %0, %2\n"
|
||||
" andn %0, %3\n"
|
||||
" stcond %1, %0\n"
|
||||
" brne 1b"
|
||||
: "=&r"(tmp), "=o"(*p)
|
||||
: "m"(*p), "r"(mask)
|
||||
: "cc");
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* change_bit - Toggle a bit in memory
|
||||
* @nr: Bit to change
|
||||
* @addr: Address to start counting from
|
||||
*
|
||||
* change_bit() is atomic and may not be reordered.
|
||||
* Note that @nr may be almost arbitrarily large; this function is not
|
||||
* restricted to acting on a single-word quantity.
|
||||
*/
|
||||
static inline void change_bit(int nr, volatile void * addr)
|
||||
{
|
||||
unsigned long *p = ((unsigned long *)addr) + nr / BITS_PER_LONG;
|
||||
unsigned long mask = 1UL << (nr % BITS_PER_LONG);
|
||||
unsigned long tmp;
|
||||
|
||||
asm volatile(
|
||||
"1: ssrf 5\n"
|
||||
" ld.w %0, %2\n"
|
||||
" eor %0, %3\n"
|
||||
" stcond %1, %0\n"
|
||||
" brne 1b"
|
||||
: "=&r"(tmp), "=o"(*p)
|
||||
: "m"(*p), "r"(mask)
|
||||
: "cc");
|
||||
}
|
||||
|
||||
/*
|
||||
* test_and_set_bit - Set a bit and return its old value
|
||||
* @nr: Bit to set
|
||||
* @addr: Address to count from
|
||||
*
|
||||
* This operation is atomic and cannot be reordered.
|
||||
* It also implies a memory barrier.
|
||||
*/
|
||||
static inline int test_and_set_bit(int nr, volatile void * addr)
|
||||
{
|
||||
unsigned long *p = ((unsigned long *)addr) + nr / BITS_PER_LONG;
|
||||
unsigned long mask = 1UL << (nr % BITS_PER_LONG);
|
||||
unsigned long tmp, old;
|
||||
|
||||
if (__builtin_constant_p(nr)) {
|
||||
asm volatile(
|
||||
"1: ssrf 5\n"
|
||||
" ld.w %0, %3\n"
|
||||
" mov %2, %0\n"
|
||||
" sbr %0, %4\n"
|
||||
" stcond %1, %0\n"
|
||||
" brne 1b"
|
||||
: "=&r"(tmp), "=o"(*p), "=&r"(old)
|
||||
: "m"(*p), "i"(nr)
|
||||
: "memory", "cc");
|
||||
} else {
|
||||
asm volatile(
|
||||
"1: ssrf 5\n"
|
||||
" ld.w %2, %3\n"
|
||||
" or %0, %2, %4\n"
|
||||
" stcond %1, %0\n"
|
||||
" brne 1b"
|
||||
: "=&r"(tmp), "=o"(*p), "=&r"(old)
|
||||
: "m"(*p), "r"(mask)
|
||||
: "memory", "cc");
|
||||
}
|
||||
|
||||
return (old & mask) != 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* test_and_clear_bit - Clear a bit and return its old value
|
||||
* @nr: Bit to clear
|
||||
* @addr: Address to count from
|
||||
*
|
||||
* This operation is atomic and cannot be reordered.
|
||||
* It also implies a memory barrier.
|
||||
*/
|
||||
static inline int test_and_clear_bit(int nr, volatile void * addr)
|
||||
{
|
||||
unsigned long *p = ((unsigned long *)addr) + nr / BITS_PER_LONG;
|
||||
unsigned long mask = 1UL << (nr % BITS_PER_LONG);
|
||||
unsigned long tmp, old;
|
||||
|
||||
if (__builtin_constant_p(nr)) {
|
||||
asm volatile(
|
||||
"1: ssrf 5\n"
|
||||
" ld.w %0, %3\n"
|
||||
" mov %2, %0\n"
|
||||
" cbr %0, %4\n"
|
||||
" stcond %1, %0\n"
|
||||
" brne 1b"
|
||||
: "=&r"(tmp), "=o"(*p), "=&r"(old)
|
||||
: "m"(*p), "i"(nr)
|
||||
: "memory", "cc");
|
||||
} else {
|
||||
asm volatile(
|
||||
"1: ssrf 5\n"
|
||||
" ld.w %0, %3\n"
|
||||
" mov %2, %0\n"
|
||||
" andn %0, %4\n"
|
||||
" stcond %1, %0\n"
|
||||
" brne 1b"
|
||||
: "=&r"(tmp), "=o"(*p), "=&r"(old)
|
||||
: "m"(*p), "r"(mask)
|
||||
: "memory", "cc");
|
||||
}
|
||||
|
||||
return (old & mask) != 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* test_and_change_bit - Change a bit and return its old value
|
||||
* @nr: Bit to change
|
||||
* @addr: Address to count from
|
||||
*
|
||||
* This operation is atomic and cannot be reordered.
|
||||
* It also implies a memory barrier.
|
||||
*/
|
||||
static inline int test_and_change_bit(int nr, volatile void * addr)
|
||||
{
|
||||
unsigned long *p = ((unsigned long *)addr) + nr / BITS_PER_LONG;
|
||||
unsigned long mask = 1UL << (nr % BITS_PER_LONG);
|
||||
unsigned long tmp, old;
|
||||
|
||||
asm volatile(
|
||||
"1: ssrf 5\n"
|
||||
" ld.w %2, %3\n"
|
||||
" eor %0, %2, %4\n"
|
||||
" stcond %1, %0\n"
|
||||
" brne 1b"
|
||||
: "=&r"(tmp), "=o"(*p), "=&r"(old)
|
||||
: "m"(*p), "r"(mask)
|
||||
: "memory", "cc");
|
||||
|
||||
return (old & mask) != 0;
|
||||
}
|
||||
|
||||
#include <asm-generic/bitops/non-atomic.h>
|
||||
|
||||
/* Find First bit Set */
|
||||
static inline unsigned long __ffs(unsigned long word)
|
||||
{
|
||||
unsigned long result;
|
||||
|
||||
asm("brev %1\n\t"
|
||||
"clz %0,%1"
|
||||
: "=r"(result), "=&r"(word)
|
||||
: "1"(word));
|
||||
return result;
|
||||
}
|
||||
|
||||
/* Find First Zero */
|
||||
static inline unsigned long ffz(unsigned long word)
|
||||
{
|
||||
return __ffs(~word);
|
||||
}
|
||||
|
||||
/* Find Last bit Set */
|
||||
static inline int fls(unsigned long word)
|
||||
{
|
||||
unsigned long result;
|
||||
|
||||
asm("clz %0,%1" : "=r"(result) : "r"(word));
|
||||
return 32 - result;
|
||||
}
|
||||
|
||||
static inline int __fls(unsigned long word)
|
||||
{
|
||||
return fls(word) - 1;
|
||||
}
|
||||
|
||||
unsigned long find_first_zero_bit(const unsigned long *addr,
|
||||
unsigned long size);
|
||||
#define find_first_zero_bit find_first_zero_bit
|
||||
|
||||
unsigned long find_next_zero_bit(const unsigned long *addr,
|
||||
unsigned long size,
|
||||
unsigned long offset);
|
||||
#define find_next_zero_bit find_next_zero_bit
|
||||
|
||||
unsigned long find_first_bit(const unsigned long *addr,
|
||||
unsigned long size);
|
||||
#define find_first_bit find_first_bit
|
||||
|
||||
unsigned long find_next_bit(const unsigned long *addr,
|
||||
unsigned long size,
|
||||
unsigned long offset);
|
||||
#define find_next_bit find_next_bit
|
||||
|
||||
/*
|
||||
* ffs: find first bit set. This is defined the same way as
|
||||
* the libc and compiler builtin ffs routines, therefore
|
||||
* differs in spirit from the above ffz (man ffs).
|
||||
*
|
||||
* The difference is that bit numbering starts at 1, and if no bit is set,
|
||||
* the function returns 0.
|
||||
*/
|
||||
static inline int ffs(unsigned long word)
|
||||
{
|
||||
if(word == 0)
|
||||
return 0;
|
||||
return __ffs(word) + 1;
|
||||
}
|
||||
|
||||
#include <asm-generic/bitops/fls64.h>
|
||||
#include <asm-generic/bitops/sched.h>
|
||||
#include <asm-generic/bitops/hweight.h>
|
||||
#include <asm-generic/bitops/lock.h>
|
||||
|
||||
extern unsigned long find_next_zero_bit_le(const void *addr,
|
||||
unsigned long size, unsigned long offset);
|
||||
#define find_next_zero_bit_le find_next_zero_bit_le
|
||||
|
||||
extern unsigned long find_next_bit_le(const void *addr,
|
||||
unsigned long size, unsigned long offset);
|
||||
#define find_next_bit_le find_next_bit_le
|
||||
|
||||
#include <asm-generic/bitops/le.h>
|
||||
#include <asm-generic/bitops/ext2-atomic.h>
|
||||
|
||||
#endif /* __ASM_AVR32_BITOPS_H */
|
|
@ -0,0 +1,78 @@
|
|||
/*
|
||||
* Copyright (C) 2006 Atmel Corporation
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
#ifndef __ASM_AVR32_BUG_H
|
||||
#define __ASM_AVR32_BUG_H
|
||||
|
||||
#ifdef CONFIG_BUG
|
||||
|
||||
/*
|
||||
* According to our Chief Architect, this compact opcode is very
|
||||
* unlikely to ever be implemented.
|
||||
*/
|
||||
#define AVR32_BUG_OPCODE 0x5df0
|
||||
|
||||
#ifdef CONFIG_DEBUG_BUGVERBOSE
|
||||
|
||||
#define _BUG_OR_WARN(flags) \
|
||||
asm volatile( \
|
||||
"1: .hword %0\n" \
|
||||
" .section __bug_table,\"a\",@progbits\n" \
|
||||
"2: .long 1b\n" \
|
||||
" .long %1\n" \
|
||||
" .short %2\n" \
|
||||
" .short %3\n" \
|
||||
" .org 2b + %4\n" \
|
||||
" .previous" \
|
||||
: \
|
||||
: "i"(AVR32_BUG_OPCODE), "i"(__FILE__), \
|
||||
"i"(__LINE__), "i"(flags), \
|
||||
"i"(sizeof(struct bug_entry)))
|
||||
|
||||
#else
|
||||
|
||||
#define _BUG_OR_WARN(flags) \
|
||||
asm volatile( \
|
||||
"1: .hword %0\n" \
|
||||
" .section __bug_table,\"a\",@progbits\n" \
|
||||
"2: .long 1b\n" \
|
||||
" .short %1\n" \
|
||||
" .org 2b + %2\n" \
|
||||
" .previous" \
|
||||
: \
|
||||
: "i"(AVR32_BUG_OPCODE), "i"(flags), \
|
||||
"i"(sizeof(struct bug_entry)))
|
||||
|
||||
#endif /* CONFIG_DEBUG_BUGVERBOSE */
|
||||
|
||||
#define BUG() \
|
||||
do { \
|
||||
_BUG_OR_WARN(0); \
|
||||
unreachable(); \
|
||||
} while (0)
|
||||
|
||||
#define WARN_ON(condition) \
|
||||
({ \
|
||||
int __ret_warn_on = !!(condition); \
|
||||
if (unlikely(__ret_warn_on)) \
|
||||
_BUG_OR_WARN(BUGFLAG_WARNING); \
|
||||
unlikely(__ret_warn_on); \
|
||||
})
|
||||
|
||||
#define HAVE_ARCH_BUG
|
||||
#define HAVE_ARCH_WARN_ON
|
||||
|
||||
#endif /* CONFIG_BUG */
|
||||
|
||||
#include <asm-generic/bug.h>
|
||||
|
||||
struct pt_regs;
|
||||
void die(const char *str, struct pt_regs *regs, long err);
|
||||
void _exception(long signr, struct pt_regs *regs, int code,
|
||||
unsigned long addr);
|
||||
|
||||
#endif /* __ASM_AVR32_BUG_H */
|
|
@ -0,0 +1,15 @@
|
|||
/*
|
||||
* This is included by init/main.c to check for architecture-dependent bugs.
|
||||
*
|
||||
* Needs:
|
||||
* void check_bugs(void);
|
||||
*/
|
||||
#ifndef __ASM_AVR32_BUGS_H
|
||||
#define __ASM_AVR32_BUGS_H
|
||||
|
||||
static void __init check_bugs(void)
|
||||
{
|
||||
boot_cpu_data.loops_per_jiffy = loops_per_jiffy;
|
||||
}
|
||||
|
||||
#endif /* __ASM_AVR32_BUGS_H */
|
|
@ -0,0 +1,38 @@
|
|||
#ifndef __ASM_AVR32_CACHE_H
|
||||
#define __ASM_AVR32_CACHE_H
|
||||
|
||||
#define L1_CACHE_SHIFT 5
|
||||
#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
|
||||
|
||||
/*
|
||||
* Memory returned by kmalloc() may be used for DMA, so we must make
|
||||
* sure that all such allocations are cache aligned. Otherwise,
|
||||
* unrelated code may cause parts of the buffer to be read into the
|
||||
* cache before the transfer is done, causing old data to be seen by
|
||||
* the CPU.
|
||||
*/
|
||||
#define ARCH_DMA_MINALIGN L1_CACHE_BYTES
|
||||
|
||||
#ifndef __ASSEMBLER__
|
||||
struct cache_info {
|
||||
unsigned int ways;
|
||||
unsigned int sets;
|
||||
unsigned int linesz;
|
||||
};
|
||||
#endif /* __ASSEMBLER */
|
||||
|
||||
/* Cache operation constants */
|
||||
#define ICACHE_FLUSH 0x00
|
||||
#define ICACHE_INVALIDATE 0x01
|
||||
#define ICACHE_LOCK 0x02
|
||||
#define ICACHE_UNLOCK 0x03
|
||||
#define ICACHE_PREFETCH 0x04
|
||||
|
||||
#define DCACHE_FLUSH 0x08
|
||||
#define DCACHE_LOCK 0x09
|
||||
#define DCACHE_UNLOCK 0x0a
|
||||
#define DCACHE_INVALIDATE 0x0b
|
||||
#define DCACHE_CLEAN 0x0c
|
||||
#define DCACHE_CLEAN_INVAL 0x0d
|
||||
|
||||
#endif /* __ASM_AVR32_CACHE_H */
|
|
@ -0,0 +1,132 @@
|
|||
/*
|
||||
* Copyright (C) 2004-2006 Atmel Corporation
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
#ifndef __ASM_AVR32_CACHEFLUSH_H
|
||||
#define __ASM_AVR32_CACHEFLUSH_H
|
||||
|
||||
/* Keep includes the same across arches. */
|
||||
#include <linux/mm.h>
|
||||
|
||||
#define CACHE_OP_ICACHE_INVALIDATE 0x01
|
||||
#define CACHE_OP_DCACHE_INVALIDATE 0x0b
|
||||
#define CACHE_OP_DCACHE_CLEAN 0x0c
|
||||
#define CACHE_OP_DCACHE_CLEAN_INVAL 0x0d
|
||||
|
||||
/*
|
||||
* Invalidate any cacheline containing virtual address vaddr without
|
||||
* writing anything back to memory.
|
||||
*
|
||||
* Note that this function may corrupt unrelated data structures when
|
||||
* applied on buffers that are not cacheline aligned in both ends.
|
||||
*/
|
||||
static inline void invalidate_dcache_line(void *vaddr)
|
||||
{
|
||||
asm volatile("cache %0[0], %1"
|
||||
:
|
||||
: "r"(vaddr), "n"(CACHE_OP_DCACHE_INVALIDATE)
|
||||
: "memory");
|
||||
}
|
||||
|
||||
/*
|
||||
* Make sure any cacheline containing virtual address vaddr is written
|
||||
* to memory.
|
||||
*/
|
||||
static inline void clean_dcache_line(void *vaddr)
|
||||
{
|
||||
asm volatile("cache %0[0], %1"
|
||||
:
|
||||
: "r"(vaddr), "n"(CACHE_OP_DCACHE_CLEAN)
|
||||
: "memory");
|
||||
}
|
||||
|
||||
/*
|
||||
* Make sure any cacheline containing virtual address vaddr is written
|
||||
* to memory and then invalidate it.
|
||||
*/
|
||||
static inline void flush_dcache_line(void *vaddr)
|
||||
{
|
||||
asm volatile("cache %0[0], %1"
|
||||
:
|
||||
: "r"(vaddr), "n"(CACHE_OP_DCACHE_CLEAN_INVAL)
|
||||
: "memory");
|
||||
}
|
||||
|
||||
/*
|
||||
* Invalidate any instruction cacheline containing virtual address
|
||||
* vaddr.
|
||||
*/
|
||||
static inline void invalidate_icache_line(void *vaddr)
|
||||
{
|
||||
asm volatile("cache %0[0], %1"
|
||||
:
|
||||
: "r"(vaddr), "n"(CACHE_OP_ICACHE_INVALIDATE)
|
||||
: "memory");
|
||||
}
|
||||
|
||||
/*
|
||||
* Applies the above functions on all lines that are touched by the
|
||||
* specified virtual address range.
|
||||
*/
|
||||
void invalidate_dcache_region(void *start, size_t len);
|
||||
void clean_dcache_region(void *start, size_t len);
|
||||
void flush_dcache_region(void *start, size_t len);
|
||||
void invalidate_icache_region(void *start, size_t len);
|
||||
|
||||
/*
|
||||
* Make sure any pending writes are completed before continuing.
|
||||
*/
|
||||
#define flush_write_buffer() asm volatile("sync 0" : : : "memory")
|
||||
|
||||
/*
|
||||
* The following functions are called when a virtual mapping changes.
|
||||
* We do not need to flush anything in this case.
|
||||
*/
|
||||
#define flush_cache_all() do { } while (0)
|
||||
#define flush_cache_mm(mm) do { } while (0)
|
||||
#define flush_cache_dup_mm(mm) do { } while (0)
|
||||
#define flush_cache_range(vma, start, end) do { } while (0)
|
||||
#define flush_cache_page(vma, vmaddr, pfn) do { } while (0)
|
||||
#define flush_cache_vmap(start, end) do { } while (0)
|
||||
#define flush_cache_vunmap(start, end) do { } while (0)
|
||||
|
||||
/*
|
||||
* I think we need to implement this one to be able to reliably
|
||||
* execute pages from RAMDISK. However, if we implement the
|
||||
* flush_dcache_*() functions, it might not be needed anymore.
|
||||
*
|
||||
* #define flush_icache_page(vma, page) do { } while (0)
|
||||
*/
|
||||
extern void flush_icache_page(struct vm_area_struct *vma, struct page *page);
|
||||
|
||||
/*
|
||||
* These are (I think) related to D-cache aliasing. We might need to
|
||||
* do something here, but only for certain configurations. No such
|
||||
* configurations exist at this time.
|
||||
*/
|
||||
#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 0
|
||||
#define flush_dcache_page(page) do { } while (0)
|
||||
#define flush_dcache_mmap_lock(page) do { } while (0)
|
||||
#define flush_dcache_mmap_unlock(page) do { } while (0)
|
||||
|
||||
/*
|
||||
* These are for I/D cache coherency. In this case, we do need to
|
||||
* flush with all configurations.
|
||||
*/
|
||||
extern void flush_icache_range(unsigned long start, unsigned long end);
|
||||
|
||||
extern void copy_to_user_page(struct vm_area_struct *vma, struct page *page,
|
||||
unsigned long vaddr, void *dst, const void *src,
|
||||
unsigned long len);
|
||||
|
||||
static inline void copy_from_user_page(struct vm_area_struct *vma,
|
||||
struct page *page, unsigned long vaddr, void *dst,
|
||||
const void *src, unsigned long len)
|
||||
{
|
||||
memcpy(dst, src, len);
|
||||
}
|
||||
|
||||
#endif /* __ASM_AVR32_CACHEFLUSH_H */
|
|
@ -0,0 +1,152 @@
|
|||
/*
|
||||
* Copyright (C) 2004-2006 Atmel Corporation
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
#ifndef __ASM_AVR32_CHECKSUM_H
|
||||
#define __ASM_AVR32_CHECKSUM_H
|
||||
|
||||
/*
|
||||
* computes the checksum of a memory block at buff, length len,
|
||||
* and adds in "sum" (32-bit)
|
||||
*
|
||||
* returns a 32-bit number suitable for feeding into itself
|
||||
* or csum_tcpudp_magic
|
||||
*
|
||||
* this function must be called with even lengths, except
|
||||
* for the last fragment, which may be odd
|
||||
*
|
||||
* it's best to have buff aligned on a 32-bit boundary
|
||||
*/
|
||||
__wsum csum_partial(const void *buff, int len, __wsum sum);
|
||||
|
||||
/*
|
||||
* the same as csum_partial, but copies from src while it
|
||||
* checksums, and handles user-space pointer exceptions correctly, when needed.
|
||||
*
|
||||
* here even more important to align src and dst on a 32-bit (or even
|
||||
* better 64-bit) boundary
|
||||
*/
|
||||
__wsum csum_partial_copy_generic(const void *src, void *dst, int len,
|
||||
__wsum sum, int *src_err_ptr,
|
||||
int *dst_err_ptr);
|
||||
|
||||
/*
|
||||
* Note: when you get a NULL pointer exception here this means someone
|
||||
* passed in an incorrect kernel address to one of these functions.
|
||||
*
|
||||
* If you use these functions directly please don't forget the
|
||||
* access_ok().
|
||||
*/
|
||||
static inline
|
||||
__wsum csum_partial_copy_nocheck(const void *src, void *dst,
|
||||
int len, __wsum sum)
|
||||
{
|
||||
return csum_partial_copy_generic(src, dst, len, sum, NULL, NULL);
|
||||
}
|
||||
|
||||
static inline
|
||||
__wsum csum_partial_copy_from_user(const void __user *src, void *dst,
|
||||
int len, __wsum sum, int *err_ptr)
|
||||
{
|
||||
return csum_partial_copy_generic((const void __force *)src, dst, len,
|
||||
sum, err_ptr, NULL);
|
||||
}
|
||||
|
||||
/*
|
||||
* This is a version of ip_compute_csum() optimized for IP headers,
|
||||
* which always checksum on 4 octet boundaries.
|
||||
*/
|
||||
static inline __sum16 ip_fast_csum(const void *iph, unsigned int ihl)
|
||||
{
|
||||
unsigned int sum, tmp;
|
||||
|
||||
__asm__ __volatile__(
|
||||
" ld.w %0, %1++\n"
|
||||
" ld.w %3, %1++\n"
|
||||
" sub %2, 4\n"
|
||||
" add %0, %3\n"
|
||||
" ld.w %3, %1++\n"
|
||||
" adc %0, %0, %3\n"
|
||||
" ld.w %3, %1++\n"
|
||||
" adc %0, %0, %3\n"
|
||||
" acr %0\n"
|
||||
"1: ld.w %3, %1++\n"
|
||||
" add %0, %3\n"
|
||||
" acr %0\n"
|
||||
" sub %2, 1\n"
|
||||
" brne 1b\n"
|
||||
" lsl %3, %0, 16\n"
|
||||
" andl %0, 0\n"
|
||||
" mov %2, 0xffff\n"
|
||||
" add %0, %3\n"
|
||||
" adc %0, %0, %2\n"
|
||||
" com %0\n"
|
||||
" lsr %0, 16\n"
|
||||
: "=r"(sum), "=r"(iph), "=r"(ihl), "=r"(tmp)
|
||||
: "1"(iph), "2"(ihl)
|
||||
: "memory", "cc");
|
||||
return (__force __sum16)sum;
|
||||
}
|
||||
|
||||
/*
|
||||
* Fold a partial checksum
|
||||
*/
|
||||
|
||||
static inline __sum16 csum_fold(__wsum sum)
|
||||
{
|
||||
unsigned int tmp;
|
||||
|
||||
asm(" bfextu %1, %0, 0, 16\n"
|
||||
" lsr %0, 16\n"
|
||||
" add %0, %1\n"
|
||||
" bfextu %1, %0, 16, 16\n"
|
||||
" add %0, %1"
|
||||
: "=&r"(sum), "=&r"(tmp)
|
||||
: "0"(sum));
|
||||
|
||||
return (__force __sum16)~sum;
|
||||
}
|
||||
|
||||
static inline __wsum csum_tcpudp_nofold(__be32 saddr, __be32 daddr,
|
||||
unsigned short len,
|
||||
unsigned short proto,
|
||||
__wsum sum)
|
||||
{
|
||||
asm(" add %0, %1\n"
|
||||
" adc %0, %0, %2\n"
|
||||
" adc %0, %0, %3\n"
|
||||
" acr %0"
|
||||
: "=r"(sum)
|
||||
: "r"(daddr), "r"(saddr), "r"(len + proto),
|
||||
"0"(sum)
|
||||
: "cc");
|
||||
|
||||
return sum;
|
||||
}
|
||||
|
||||
/*
|
||||
* computes the checksum of the TCP/UDP pseudo-header
|
||||
* returns a 16-bit checksum, already complemented
|
||||
*/
|
||||
static inline __sum16 csum_tcpudp_magic(__be32 saddr, __be32 daddr,
|
||||
unsigned short len,
|
||||
unsigned short proto,
|
||||
__wsum sum)
|
||||
{
|
||||
return csum_fold(csum_tcpudp_nofold(saddr,daddr,len,proto,sum));
|
||||
}
|
||||
|
||||
/*
|
||||
* this routine is used for miscellaneous IP-like checksums, mainly
|
||||
* in icmp.c
|
||||
*/
|
||||
|
||||
static inline __sum16 ip_compute_csum(const void *buff, int len)
|
||||
{
|
||||
return csum_fold(csum_partial(buff, len, 0));
|
||||
}
|
||||
|
||||
#endif /* __ASM_AVR32_CHECKSUM_H */
|
|
@ -0,0 +1,115 @@
|
|||
/*
|
||||
* Atomic operations that C can't guarantee us. Useful for
|
||||
* resource counting etc.
|
||||
*
|
||||
* But use these as seldom as possible since they are slower than
|
||||
* regular operations.
|
||||
*
|
||||
* Copyright (C) 2004-2006 Atmel Corporation
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
#ifndef __ASM_AVR32_CMPXCHG_H
|
||||
#define __ASM_AVR32_CMPXCHG_H
|
||||
|
||||
#define xchg(ptr,x) \
|
||||
((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
|
||||
|
||||
extern void __xchg_called_with_bad_pointer(void);
|
||||
|
||||
static inline unsigned long xchg_u32(u32 val, volatile u32 *m)
|
||||
{
|
||||
u32 ret;
|
||||
|
||||
asm volatile("xchg %[ret], %[m], %[val]"
|
||||
: [ret] "=&r"(ret), "=m"(*m)
|
||||
: "m"(*m), [m] "r"(m), [val] "r"(val)
|
||||
: "memory");
|
||||
return ret;
|
||||
}
|
||||
|
||||
static inline unsigned long __xchg(unsigned long x,
|
||||
volatile void *ptr,
|
||||
int size)
|
||||
{
|
||||
switch(size) {
|
||||
case 4:
|
||||
return xchg_u32(x, ptr);
|
||||
default:
|
||||
__xchg_called_with_bad_pointer();
|
||||
return x;
|
||||
}
|
||||
}
|
||||
|
||||
static inline unsigned long __cmpxchg_u32(volatile int *m, unsigned long old,
|
||||
unsigned long new)
|
||||
{
|
||||
__u32 ret;
|
||||
|
||||
asm volatile(
|
||||
"1: ssrf 5\n"
|
||||
" ld.w %[ret], %[m]\n"
|
||||
" cp.w %[ret], %[old]\n"
|
||||
" brne 2f\n"
|
||||
" stcond %[m], %[new]\n"
|
||||
" brne 1b\n"
|
||||
"2:\n"
|
||||
: [ret] "=&r"(ret), [m] "=m"(*m)
|
||||
: "m"(m), [old] "ir"(old), [new] "r"(new)
|
||||
: "memory", "cc");
|
||||
return ret;
|
||||
}
|
||||
|
||||
extern unsigned long __cmpxchg_u64_unsupported_on_32bit_kernels(
|
||||
volatile int * m, unsigned long old, unsigned long new);
|
||||
#define __cmpxchg_u64 __cmpxchg_u64_unsupported_on_32bit_kernels
|
||||
|
||||
/* This function doesn't exist, so you'll get a linker error
|
||||
if something tries to do an invalid cmpxchg(). */
|
||||
extern void __cmpxchg_called_with_bad_pointer(void);
|
||||
|
||||
static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old,
|
||||
unsigned long new, int size)
|
||||
{
|
||||
switch (size) {
|
||||
case 4:
|
||||
return __cmpxchg_u32(ptr, old, new);
|
||||
case 8:
|
||||
return __cmpxchg_u64(ptr, old, new);
|
||||
}
|
||||
|
||||
__cmpxchg_called_with_bad_pointer();
|
||||
return old;
|
||||
}
|
||||
|
||||
#define cmpxchg(ptr, old, new) \
|
||||
((typeof(*(ptr)))__cmpxchg((ptr), (unsigned long)(old), \
|
||||
(unsigned long)(new), \
|
||||
sizeof(*(ptr))))
|
||||
|
||||
#include <asm-generic/cmpxchg-local.h>
|
||||
|
||||
static inline unsigned long __cmpxchg_local(volatile void *ptr,
|
||||
unsigned long old,
|
||||
unsigned long new, int size)
|
||||
{
|
||||
switch (size) {
|
||||
case 4:
|
||||
return __cmpxchg_u32(ptr, old, new);
|
||||
default:
|
||||
return __cmpxchg_local_generic(ptr, old, new, size);
|
||||
}
|
||||
|
||||
return old;
|
||||
}
|
||||
|
||||
#define cmpxchg_local(ptr, old, new) \
|
||||
((typeof(*(ptr)))__cmpxchg_local((ptr), (unsigned long)(old), \
|
||||
(unsigned long)(new), \
|
||||
sizeof(*(ptr))))
|
||||
|
||||
#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
|
||||
|
||||
#endif /* __ASM_AVR32_CMPXCHG_H */
|
|
@ -0,0 +1,15 @@
|
|||
#ifndef __ASM_AVR32_CURRENT_H
|
||||
#define __ASM_AVR32_CURRENT_H
|
||||
|
||||
#include <linux/thread_info.h>
|
||||
|
||||
struct task_struct;
|
||||
|
||||
inline static struct task_struct * get_current(void)
|
||||
{
|
||||
return current_thread_info()->task;
|
||||
}
|
||||
|
||||
#define current get_current()
|
||||
|
||||
#endif /* __ASM_AVR32_CURRENT_H */
|
|
@ -0,0 +1,350 @@
|
|||
#ifndef __ASM_AVR32_DMA_MAPPING_H
|
||||
#define __ASM_AVR32_DMA_MAPPING_H
|
||||
|
||||
#include <linux/mm.h>
|
||||
#include <linux/device.h>
|
||||
#include <linux/scatterlist.h>
|
||||
#include <asm/processor.h>
|
||||
#include <asm/cacheflush.h>
|
||||
#include <asm/io.h>
|
||||
|
||||
extern void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
|
||||
int direction);
|
||||
|
||||
/*
|
||||
* Return whether the given device DMA address mask can be supported
|
||||
* properly. For example, if your device can only drive the low 24-bits
|
||||
* during bus mastering, then you would pass 0x00ffffff as the mask
|
||||
* to this function.
|
||||
*/
|
||||
static inline int dma_supported(struct device *dev, u64 mask)
|
||||
{
|
||||
/* Fix when needed. I really don't know of any limitations */
|
||||
return 1;
|
||||
}
|
||||
|
||||
static inline int dma_set_mask(struct device *dev, u64 dma_mask)
|
||||
{
|
||||
if (!dev->dma_mask || !dma_supported(dev, dma_mask))
|
||||
return -EIO;
|
||||
|
||||
*dev->dma_mask = dma_mask;
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* dma_map_single can't fail as it is implemented now.
|
||||
*/
|
||||
static inline int dma_mapping_error(struct device *dev, dma_addr_t addr)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* dma_alloc_coherent - allocate consistent memory for DMA
|
||||
* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
|
||||
* @size: required memory size
|
||||
* @handle: bus-specific DMA address
|
||||
*
|
||||
* Allocate some uncached, unbuffered memory for a device for
|
||||
* performing DMA. This function allocates pages, and will
|
||||
* return the CPU-viewed address, and sets @handle to be the
|
||||
* device-viewed address.
|
||||
*/
|
||||
extern void *dma_alloc_coherent(struct device *dev, size_t size,
|
||||
dma_addr_t *handle, gfp_t gfp);
|
||||
|
||||
/**
|
||||
* dma_free_coherent - free memory allocated by dma_alloc_coherent
|
||||
* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
|
||||
* @size: size of memory originally requested in dma_alloc_coherent
|
||||
* @cpu_addr: CPU-view address returned from dma_alloc_coherent
|
||||
* @handle: device-view address returned from dma_alloc_coherent
|
||||
*
|
||||
* Free (and unmap) a DMA buffer previously allocated by
|
||||
* dma_alloc_coherent().
|
||||
*
|
||||
* References to memory and mappings associated with cpu_addr/handle
|
||||
* during and after this call executing are illegal.
|
||||
*/
|
||||
extern void dma_free_coherent(struct device *dev, size_t size,
|
||||
void *cpu_addr, dma_addr_t handle);
|
||||
|
||||
/**
|
||||
* dma_alloc_writecombine - allocate write-combining memory for DMA
|
||||
* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
|
||||
* @size: required memory size
|
||||
* @handle: bus-specific DMA address
|
||||
*
|
||||
* Allocate some uncached, buffered memory for a device for
|
||||
* performing DMA. This function allocates pages, and will
|
||||
* return the CPU-viewed address, and sets @handle to be the
|
||||
* device-viewed address.
|
||||
*/
|
||||
extern void *dma_alloc_writecombine(struct device *dev, size_t size,
|
||||
dma_addr_t *handle, gfp_t gfp);
|
||||
|
||||
/**
|
||||
* dma_free_coherent - free memory allocated by dma_alloc_writecombine
|
||||
* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
|
||||
* @size: size of memory originally requested in dma_alloc_writecombine
|
||||
* @cpu_addr: CPU-view address returned from dma_alloc_writecombine
|
||||
* @handle: device-view address returned from dma_alloc_writecombine
|
||||
*
|
||||
* Free (and unmap) a DMA buffer previously allocated by
|
||||
* dma_alloc_writecombine().
|
||||
*
|
||||
* References to memory and mappings associated with cpu_addr/handle
|
||||
* during and after this call executing are illegal.
|
||||
*/
|
||||
extern void dma_free_writecombine(struct device *dev, size_t size,
|
||||
void *cpu_addr, dma_addr_t handle);
|
||||
|
||||
/**
|
||||
* dma_map_single - map a single buffer for streaming DMA
|
||||
* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
|
||||
* @cpu_addr: CPU direct mapped address of buffer
|
||||
* @size: size of buffer to map
|
||||
* @dir: DMA transfer direction
|
||||
*
|
||||
* Ensure that any data held in the cache is appropriately discarded
|
||||
* or written back.
|
||||
*
|
||||
* The device owns this memory once this call has completed. The CPU
|
||||
* can regain ownership by calling dma_unmap_single() or dma_sync_single().
|
||||
*/
|
||||
static inline dma_addr_t
|
||||
dma_map_single(struct device *dev, void *cpu_addr, size_t size,
|
||||
enum dma_data_direction direction)
|
||||
{
|
||||
dma_cache_sync(dev, cpu_addr, size, direction);
|
||||
return virt_to_bus(cpu_addr);
|
||||
}
|
||||
|
||||
/**
|
||||
* dma_unmap_single - unmap a single buffer previously mapped
|
||||
* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
|
||||
* @handle: DMA address of buffer
|
||||
* @size: size of buffer to map
|
||||
* @dir: DMA transfer direction
|
||||
*
|
||||
* Unmap a single streaming mode DMA translation. The handle and size
|
||||
* must match what was provided in the previous dma_map_single() call.
|
||||
* All other usages are undefined.
|
||||
*
|
||||
* After this call, reads by the CPU to the buffer are guaranteed to see
|
||||
* whatever the device wrote there.
|
||||
*/
|
||||
static inline void
|
||||
dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
|
||||
enum dma_data_direction direction)
|
||||
{
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* dma_map_page - map a portion of a page for streaming DMA
|
||||
* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
|
||||
* @page: page that buffer resides in
|
||||
* @offset: offset into page for start of buffer
|
||||
* @size: size of buffer to map
|
||||
* @dir: DMA transfer direction
|
||||
*
|
||||
* Ensure that any data held in the cache is appropriately discarded
|
||||
* or written back.
|
||||
*
|
||||
* The device owns this memory once this call has completed. The CPU
|
||||
* can regain ownership by calling dma_unmap_page() or dma_sync_single().
|
||||
*/
|
||||
static inline dma_addr_t
|
||||
dma_map_page(struct device *dev, struct page *page,
|
||||
unsigned long offset, size_t size,
|
||||
enum dma_data_direction direction)
|
||||
{
|
||||
return dma_map_single(dev, page_address(page) + offset,
|
||||
size, direction);
|
||||
}
|
||||
|
||||
/**
|
||||
* dma_unmap_page - unmap a buffer previously mapped through dma_map_page()
|
||||
* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
|
||||
* @handle: DMA address of buffer
|
||||
* @size: size of buffer to map
|
||||
* @dir: DMA transfer direction
|
||||
*
|
||||
* Unmap a single streaming mode DMA translation. The handle and size
|
||||
* must match what was provided in the previous dma_map_single() call.
|
||||
* All other usages are undefined.
|
||||
*
|
||||
* After this call, reads by the CPU to the buffer are guaranteed to see
|
||||
* whatever the device wrote there.
|
||||
*/
|
||||
static inline void
|
||||
dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size,
|
||||
enum dma_data_direction direction)
|
||||
{
|
||||
dma_unmap_single(dev, dma_address, size, direction);
|
||||
}
|
||||
|
||||
/**
|
||||
* dma_map_sg - map a set of SG buffers for streaming mode DMA
|
||||
* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
|
||||
* @sg: list of buffers
|
||||
* @nents: number of buffers to map
|
||||
* @dir: DMA transfer direction
|
||||
*
|
||||
* Map a set of buffers described by scatterlist in streaming
|
||||
* mode for DMA. This is the scatter-gather version of the
|
||||
* above pci_map_single interface. Here the scatter gather list
|
||||
* elements are each tagged with the appropriate dma address
|
||||
* and length. They are obtained via sg_dma_{address,length}(SG).
|
||||
*
|
||||
* NOTE: An implementation may be able to use a smaller number of
|
||||
* DMA address/length pairs than there are SG table elements.
|
||||
* (for example via virtual mapping capabilities)
|
||||
* The routine returns the number of addr/length pairs actually
|
||||
* used, at most nents.
|
||||
*
|
||||
* Device ownership issues as mentioned above for pci_map_single are
|
||||
* the same here.
|
||||
*/
|
||||
static inline int
|
||||
dma_map_sg(struct device *dev, struct scatterlist *sglist, int nents,
|
||||
enum dma_data_direction direction)
|
||||
{
|
||||
int i;
|
||||
struct scatterlist *sg;
|
||||
|
||||
for_each_sg(sglist, sg, nents, i) {
|
||||
char *virt;
|
||||
|
||||
sg->dma_address = page_to_bus(sg_page(sg)) + sg->offset;
|
||||
virt = sg_virt(sg);
|
||||
dma_cache_sync(dev, virt, sg->length, direction);
|
||||
}
|
||||
|
||||
return nents;
|
||||
}
|
||||
|
||||
/**
|
||||
* dma_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
|
||||
* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
|
||||
* @sg: list of buffers
|
||||
* @nents: number of buffers to map
|
||||
* @dir: DMA transfer direction
|
||||
*
|
||||
* Unmap a set of streaming mode DMA translations.
|
||||
* Again, CPU read rules concerning calls here are the same as for
|
||||
* pci_unmap_single() above.
|
||||
*/
|
||||
static inline void
|
||||
dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries,
|
||||
enum dma_data_direction direction)
|
||||
{
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* dma_sync_single_for_cpu
|
||||
* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
|
||||
* @handle: DMA address of buffer
|
||||
* @size: size of buffer to map
|
||||
* @dir: DMA transfer direction
|
||||
*
|
||||
* Make physical memory consistent for a single streaming mode DMA
|
||||
* translation after a transfer.
|
||||
*
|
||||
* If you perform a dma_map_single() but wish to interrogate the
|
||||
* buffer using the cpu, yet do not wish to teardown the DMA mapping,
|
||||
* you must call this function before doing so. At the next point you
|
||||
* give the DMA address back to the card, you must first perform a
|
||||
* dma_sync_single_for_device, and then the device again owns the
|
||||
* buffer.
|
||||
*/
|
||||
static inline void
|
||||
dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle,
|
||||
size_t size, enum dma_data_direction direction)
|
||||
{
|
||||
/*
|
||||
* No need to do anything since the CPU isn't supposed to
|
||||
* touch this memory after we flushed it at mapping- or
|
||||
* sync-for-device time.
|
||||
*/
|
||||
}
|
||||
|
||||
static inline void
|
||||
dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle,
|
||||
size_t size, enum dma_data_direction direction)
|
||||
{
|
||||
dma_cache_sync(dev, bus_to_virt(dma_handle), size, direction);
|
||||
}
|
||||
|
||||
static inline void
|
||||
dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t dma_handle,
|
||||
unsigned long offset, size_t size,
|
||||
enum dma_data_direction direction)
|
||||
{
|
||||
/* just sync everything, that's all the pci API can do */
|
||||
dma_sync_single_for_cpu(dev, dma_handle, offset+size, direction);
|
||||
}
|
||||
|
||||
static inline void
|
||||
dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle,
|
||||
unsigned long offset, size_t size,
|
||||
enum dma_data_direction direction)
|
||||
{
|
||||
/* just sync everything, that's all the pci API can do */
|
||||
dma_sync_single_for_device(dev, dma_handle, offset+size, direction);
|
||||
}
|
||||
|
||||
/**
|
||||
* dma_sync_sg_for_cpu
|
||||
* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
|
||||
* @sg: list of buffers
|
||||
* @nents: number of buffers to map
|
||||
* @dir: DMA transfer direction
|
||||
*
|
||||
* Make physical memory consistent for a set of streaming
|
||||
* mode DMA translations after a transfer.
|
||||
*
|
||||
* The same as dma_sync_single_for_* but for a scatter-gather list,
|
||||
* same rules and usage.
|
||||
*/
|
||||
static inline void
|
||||
dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
|
||||
int nents, enum dma_data_direction direction)
|
||||
{
|
||||
/*
|
||||
* No need to do anything since the CPU isn't supposed to
|
||||
* touch this memory after we flushed it at mapping- or
|
||||
* sync-for-device time.
|
||||
*/
|
||||
}
|
||||
|
||||
static inline void
|
||||
dma_sync_sg_for_device(struct device *dev, struct scatterlist *sglist,
|
||||
int nents, enum dma_data_direction direction)
|
||||
{
|
||||
int i;
|
||||
struct scatterlist *sg;
|
||||
|
||||
for_each_sg(sglist, sg, nents, i)
|
||||
dma_cache_sync(dev, sg_virt(sg), sg->length, direction);
|
||||
}
|
||||
|
||||
/* Now for the API extensions over the pci_ one */
|
||||
|
||||
#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
|
||||
#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
|
||||
|
||||
/* drivers/base/dma-mapping.c */
|
||||
extern int dma_common_mmap(struct device *dev, struct vm_area_struct *vma,
|
||||
void *cpu_addr, dma_addr_t dma_addr, size_t size);
|
||||
extern int dma_common_get_sgtable(struct device *dev, struct sg_table *sgt,
|
||||
void *cpu_addr, dma_addr_t dma_addr,
|
||||
size_t size);
|
||||
|
||||
#define dma_mmap_coherent(d, v, c, h, s) dma_common_mmap(d, v, c, h, s)
|
||||
#define dma_get_sgtable(d, t, v, h, s) dma_common_get_sgtable(d, t, v, h, s)
|
||||
|
||||
#endif /* __ASM_AVR32_DMA_MAPPING_H */
|
|
@ -0,0 +1,8 @@
|
|||
#ifndef __ASM_AVR32_DMA_H
|
||||
#define __ASM_AVR32_DMA_H
|
||||
|
||||
/* The maximum address that we can perform a DMA transfer to on this platform.
|
||||
* Not really applicable to AVR32, but some functions need it. */
|
||||
#define MAX_DMA_ADDRESS 0xffffffff
|
||||
|
||||
#endif /* __ASM_AVR32_DMA_H */
|
|
@ -0,0 +1,105 @@
|
|||
#ifndef __ASM_AVR32_ELF_H
|
||||
#define __ASM_AVR32_ELF_H
|
||||
|
||||
/* AVR32 relocation numbers */
|
||||
#define R_AVR32_NONE 0
|
||||
#define R_AVR32_32 1
|
||||
#define R_AVR32_16 2
|
||||
#define R_AVR32_8 3
|
||||
#define R_AVR32_32_PCREL 4
|
||||
#define R_AVR32_16_PCREL 5
|
||||
#define R_AVR32_8_PCREL 6
|
||||
#define R_AVR32_DIFF32 7
|
||||
#define R_AVR32_DIFF16 8
|
||||
#define R_AVR32_DIFF8 9
|
||||
#define R_AVR32_GOT32 10
|
||||
#define R_AVR32_GOT16 11
|
||||
#define R_AVR32_GOT8 12
|
||||
#define R_AVR32_21S 13
|
||||
#define R_AVR32_16U 14
|
||||
#define R_AVR32_16S 15
|
||||
#define R_AVR32_8S 16
|
||||
#define R_AVR32_8S_EXT 17
|
||||
#define R_AVR32_22H_PCREL 18
|
||||
#define R_AVR32_18W_PCREL 19
|
||||
#define R_AVR32_16B_PCREL 20
|
||||
#define R_AVR32_16N_PCREL 21
|
||||
#define R_AVR32_14UW_PCREL 22
|
||||
#define R_AVR32_11H_PCREL 23
|
||||
#define R_AVR32_10UW_PCREL 24
|
||||
#define R_AVR32_9H_PCREL 25
|
||||
#define R_AVR32_9UW_PCREL 26
|
||||
#define R_AVR32_HI16 27
|
||||
#define R_AVR32_LO16 28
|
||||
#define R_AVR32_GOTPC 29
|
||||
#define R_AVR32_GOTCALL 30
|
||||
#define R_AVR32_LDA_GOT 31
|
||||
#define R_AVR32_GOT21S 32
|
||||
#define R_AVR32_GOT18SW 33
|
||||
#define R_AVR32_GOT16S 34
|
||||
#define R_AVR32_GOT7UW 35
|
||||
#define R_AVR32_32_CPENT 36
|
||||
#define R_AVR32_CPCALL 37
|
||||
#define R_AVR32_16_CP 38
|
||||
#define R_AVR32_9W_CP 39
|
||||
#define R_AVR32_RELATIVE 40
|
||||
#define R_AVR32_GLOB_DAT 41
|
||||
#define R_AVR32_JMP_SLOT 42
|
||||
#define R_AVR32_ALIGN 43
|
||||
|
||||
/*
|
||||
* ELF register definitions..
|
||||
*/
|
||||
|
||||
#include <asm/ptrace.h>
|
||||
#include <asm/user.h>
|
||||
|
||||
typedef unsigned long elf_greg_t;
|
||||
|
||||
#define ELF_NGREG (sizeof (struct pt_regs) / sizeof (elf_greg_t))
|
||||
typedef elf_greg_t elf_gregset_t[ELF_NGREG];
|
||||
|
||||
typedef struct user_fpu_struct elf_fpregset_t;
|
||||
|
||||
/*
|
||||
* This is used to ensure we don't load something for the wrong architecture.
|
||||
*/
|
||||
#define elf_check_arch(x) ( (x)->e_machine == EM_AVR32 )
|
||||
|
||||
/*
|
||||
* These are used to set parameters in the core dumps.
|
||||
*/
|
||||
#define ELF_CLASS ELFCLASS32
|
||||
#ifdef __LITTLE_ENDIAN__
|
||||
#define ELF_DATA ELFDATA2LSB
|
||||
#else
|
||||
#define ELF_DATA ELFDATA2MSB
|
||||
#endif
|
||||
#define ELF_ARCH EM_AVR32
|
||||
|
||||
#define ELF_EXEC_PAGESIZE 4096
|
||||
|
||||
/* This is the location that an ET_DYN program is loaded if exec'ed. Typical
|
||||
use of this is to invoke "./ld.so someprog" to test out a new version of
|
||||
the loader. We need to make sure that it is out of the way of the program
|
||||
that it will "exec", and that there is sufficient room for the brk. */
|
||||
|
||||
#define ELF_ET_DYN_BASE (TASK_SIZE / 3 * 2)
|
||||
|
||||
|
||||
/* This yields a mask that user programs can use to figure out what
|
||||
instruction set this CPU supports. This could be done in user space,
|
||||
but it's not easy, and we've already done it here. */
|
||||
|
||||
#define ELF_HWCAP (0)
|
||||
|
||||
/* This yields a string that ld.so will use to load implementation
|
||||
specific libraries for optimization. This is more specific in
|
||||
intent than poking at uname or /proc/cpuinfo.
|
||||
|
||||
For the moment, we have only optimizations for the Intel generations,
|
||||
but that could change... */
|
||||
|
||||
#define ELF_PLATFORM (NULL)
|
||||
|
||||
#endif /* __ASM_AVR32_ELF_H */
|
|
@ -0,0 +1,21 @@
|
|||
#ifndef _ASM_FB_H_
|
||||
#define _ASM_FB_H_
|
||||
|
||||
#include <linux/fb.h>
|
||||
#include <linux/fs.h>
|
||||
#include <asm/page.h>
|
||||
|
||||
static inline void fb_pgprotect(struct file *file, struct vm_area_struct *vma,
|
||||
unsigned long off)
|
||||
{
|
||||
vma->vm_page_prot = __pgprot((pgprot_val(vma->vm_page_prot)
|
||||
& ~_PAGE_CACHABLE)
|
||||
| (_PAGE_BUFFER | _PAGE_DIRTY));
|
||||
}
|
||||
|
||||
static inline int fb_is_primary_device(struct fb_info *info)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
#endif /* _ASM_FB_H_ */
|
|
@ -0,0 +1 @@
|
|||
/* empty */
|
|
@ -0,0 +1,6 @@
|
|||
#ifndef __ASM_AVR32_GPIO_H
|
||||
#define __ASM_AVR32_GPIO_H
|
||||
|
||||
#include <mach/gpio.h>
|
||||
|
||||
#endif /* __ASM_AVR32_GPIO_H */
|
|
@ -0,0 +1,6 @@
|
|||
#ifndef __ASM_AVR32_HARDIRQ_H
|
||||
#define __ASM_AVR32_HARDIRQ_H
|
||||
#ifndef __ASSEMBLY__
|
||||
#include <asm-generic/hardirq.h>
|
||||
#endif /* __ASSEMBLY__ */
|
||||
#endif /* __ASM_AVR32_HARDIRQ_H */
|
|
@ -0,0 +1,9 @@
|
|||
#ifndef __ASM_AVR32_HW_IRQ_H
|
||||
#define __ASM_AVR32_HW_IRQ_H
|
||||
|
||||
static inline void hw_resend_irq(struct irq_chip *h, unsigned int i)
|
||||
{
|
||||
/* Nothing to do */
|
||||
}
|
||||
|
||||
#endif /* __ASM_AVR32_HW_IRQ_H */
|
|
@ -0,0 +1,329 @@
|
|||
#ifndef __ASM_AVR32_IO_H
|
||||
#define __ASM_AVR32_IO_H
|
||||
|
||||
#include <linux/bug.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/string.h>
|
||||
#include <linux/types.h>
|
||||
|
||||
#include <asm/addrspace.h>
|
||||
#include <asm/byteorder.h>
|
||||
|
||||
#include <mach/io.h>
|
||||
|
||||
/* virt_to_phys will only work when address is in P1 or P2 */
|
||||
static __inline__ unsigned long virt_to_phys(volatile void *address)
|
||||
{
|
||||
return PHYSADDR(address);
|
||||
}
|
||||
|
||||
static __inline__ void * phys_to_virt(unsigned long address)
|
||||
{
|
||||
return (void *)P1SEGADDR(address);
|
||||
}
|
||||
|
||||
#define cached_to_phys(addr) ((unsigned long)PHYSADDR(addr))
|
||||
#define uncached_to_phys(addr) ((unsigned long)PHYSADDR(addr))
|
||||
#define phys_to_cached(addr) ((void *)P1SEGADDR(addr))
|
||||
#define phys_to_uncached(addr) ((void *)P2SEGADDR(addr))
|
||||
|
||||
/*
|
||||
* Generic IO read/write. These perform native-endian accesses. Note
|
||||
* that some architectures will want to re-define __raw_{read,write}w.
|
||||
*/
|
||||
extern void __raw_writesb(void __iomem *addr, const void *data, int bytelen);
|
||||
extern void __raw_writesw(void __iomem *addr, const void *data, int wordlen);
|
||||
extern void __raw_writesl(void __iomem *addr, const void *data, int longlen);
|
||||
|
||||
extern void __raw_readsb(const void __iomem *addr, void *data, int bytelen);
|
||||
extern void __raw_readsw(const void __iomem *addr, void *data, int wordlen);
|
||||
extern void __raw_readsl(const void __iomem *addr, void *data, int longlen);
|
||||
|
||||
static inline void __raw_writeb(u8 v, volatile void __iomem *addr)
|
||||
{
|
||||
*(volatile u8 __force *)addr = v;
|
||||
}
|
||||
static inline void __raw_writew(u16 v, volatile void __iomem *addr)
|
||||
{
|
||||
*(volatile u16 __force *)addr = v;
|
||||
}
|
||||
static inline void __raw_writel(u32 v, volatile void __iomem *addr)
|
||||
{
|
||||
*(volatile u32 __force *)addr = v;
|
||||
}
|
||||
|
||||
static inline u8 __raw_readb(const volatile void __iomem *addr)
|
||||
{
|
||||
return *(const volatile u8 __force *)addr;
|
||||
}
|
||||
static inline u16 __raw_readw(const volatile void __iomem *addr)
|
||||
{
|
||||
return *(const volatile u16 __force *)addr;
|
||||
}
|
||||
static inline u32 __raw_readl(const volatile void __iomem *addr)
|
||||
{
|
||||
return *(const volatile u32 __force *)addr;
|
||||
}
|
||||
|
||||
/* Convert I/O port address to virtual address */
|
||||
#ifndef __io
|
||||
# define __io(p) ((void *)phys_to_uncached(p))
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Not really sure about the best way to slow down I/O on
|
||||
* AVR32. Defining it as a no-op until we have an actual test case.
|
||||
*/
|
||||
#define SLOW_DOWN_IO do { } while (0)
|
||||
|
||||
#define __BUILD_MEMORY_SINGLE(pfx, bwl, type) \
|
||||
static inline void \
|
||||
pfx##write##bwl(type val, volatile void __iomem *addr) \
|
||||
{ \
|
||||
volatile type *__addr; \
|
||||
type __val; \
|
||||
\
|
||||
__addr = (void *)__swizzle_addr_##bwl((unsigned long)(addr)); \
|
||||
__val = pfx##ioswab##bwl(__addr, val); \
|
||||
\
|
||||
BUILD_BUG_ON(sizeof(type) > sizeof(unsigned long)); \
|
||||
\
|
||||
*__addr = __val; \
|
||||
} \
|
||||
\
|
||||
static inline type pfx##read##bwl(const volatile void __iomem *addr) \
|
||||
{ \
|
||||
volatile type *__addr; \
|
||||
type __val; \
|
||||
\
|
||||
__addr = (void *)__swizzle_addr_##bwl((unsigned long)(addr)); \
|
||||
\
|
||||
BUILD_BUG_ON(sizeof(type) > sizeof(unsigned long)); \
|
||||
\
|
||||
__val = *__addr; \
|
||||
return pfx##ioswab##bwl(__addr, __val); \
|
||||
}
|
||||
|
||||
#define __BUILD_IOPORT_SINGLE(pfx, bwl, type, p, slow) \
|
||||
static inline void pfx##out##bwl##p(type val, unsigned long port) \
|
||||
{ \
|
||||
volatile type *__addr; \
|
||||
type __val; \
|
||||
\
|
||||
__addr = __io(__swizzle_addr_##bwl(port)); \
|
||||
__val = pfx##ioswab##bwl(__addr, val); \
|
||||
\
|
||||
BUILD_BUG_ON(sizeof(type) > sizeof(unsigned long)); \
|
||||
\
|
||||
*__addr = __val; \
|
||||
slow; \
|
||||
} \
|
||||
\
|
||||
static inline type pfx##in##bwl##p(unsigned long port) \
|
||||
{ \
|
||||
volatile type *__addr; \
|
||||
type __val; \
|
||||
\
|
||||
__addr = __io(__swizzle_addr_##bwl(port)); \
|
||||
\
|
||||
BUILD_BUG_ON(sizeof(type) > sizeof(unsigned long)); \
|
||||
\
|
||||
__val = *__addr; \
|
||||
slow; \
|
||||
\
|
||||
return pfx##ioswab##bwl(__addr, __val); \
|
||||
}
|
||||
|
||||
#define __BUILD_MEMORY_PFX(bus, bwl, type) \
|
||||
__BUILD_MEMORY_SINGLE(bus, bwl, type)
|
||||
|
||||
#define BUILDIO_MEM(bwl, type) \
|
||||
__BUILD_MEMORY_PFX(, bwl, type) \
|
||||
__BUILD_MEMORY_PFX(__mem_, bwl, type)
|
||||
|
||||
#define __BUILD_IOPORT_PFX(bus, bwl, type) \
|
||||
__BUILD_IOPORT_SINGLE(bus, bwl, type, ,) \
|
||||
__BUILD_IOPORT_SINGLE(bus, bwl, type, _p, SLOW_DOWN_IO)
|
||||
|
||||
#define BUILDIO_IOPORT(bwl, type) \
|
||||
__BUILD_IOPORT_PFX(, bwl, type) \
|
||||
__BUILD_IOPORT_PFX(__mem_, bwl, type)
|
||||
|
||||
BUILDIO_MEM(b, u8)
|
||||
BUILDIO_MEM(w, u16)
|
||||
BUILDIO_MEM(l, u32)
|
||||
|
||||
BUILDIO_IOPORT(b, u8)
|
||||
BUILDIO_IOPORT(w, u16)
|
||||
BUILDIO_IOPORT(l, u32)
|
||||
|
||||
#define readb_relaxed readb
|
||||
#define readw_relaxed readw
|
||||
#define readl_relaxed readl
|
||||
|
||||
#define readb_be __raw_readb
|
||||
#define readw_be __raw_readw
|
||||
#define readl_be __raw_readl
|
||||
|
||||
#define writeb_relaxed writeb
|
||||
#define writew_relaxed writew
|
||||
#define writel_relaxed writel
|
||||
|
||||
#define writeb_be __raw_writeb
|
||||
#define writew_be __raw_writew
|
||||
#define writel_be __raw_writel
|
||||
|
||||
#define __BUILD_MEMORY_STRING(bwl, type) \
|
||||
static inline void writes##bwl(volatile void __iomem *addr, \
|
||||
const void *data, unsigned int count) \
|
||||
{ \
|
||||
const type *__data = data; \
|
||||
\
|
||||
while (count--) \
|
||||
__mem_write##bwl(*__data++, addr); \
|
||||
} \
|
||||
\
|
||||
static inline void reads##bwl(const volatile void __iomem *addr, \
|
||||
void *data, unsigned int count) \
|
||||
{ \
|
||||
type *__data = data; \
|
||||
\
|
||||
while (count--) \
|
||||
*__data++ = __mem_read##bwl(addr); \
|
||||
}
|
||||
|
||||
#define __BUILD_IOPORT_STRING(bwl, type) \
|
||||
static inline void outs##bwl(unsigned long port, const void *data, \
|
||||
unsigned int count) \
|
||||
{ \
|
||||
const type *__data = data; \
|
||||
\
|
||||
while (count--) \
|
||||
__mem_out##bwl(*__data++, port); \
|
||||
} \
|
||||
\
|
||||
static inline void ins##bwl(unsigned long port, void *data, \
|
||||
unsigned int count) \
|
||||
{ \
|
||||
type *__data = data; \
|
||||
\
|
||||
while (count--) \
|
||||
*__data++ = __mem_in##bwl(port); \
|
||||
}
|
||||
|
||||
#define BUILDSTRING(bwl, type) \
|
||||
__BUILD_MEMORY_STRING(bwl, type) \
|
||||
__BUILD_IOPORT_STRING(bwl, type)
|
||||
|
||||
BUILDSTRING(b, u8)
|
||||
BUILDSTRING(w, u16)
|
||||
BUILDSTRING(l, u32)
|
||||
|
||||
/*
|
||||
* io{read,write}{8,16,32} macros in both le (for PCI style consumers) and native be
|
||||
*/
|
||||
#ifndef ioread8
|
||||
|
||||
#define ioread8(p) ((unsigned int)readb(p))
|
||||
|
||||
#define ioread16(p) ((unsigned int)readw(p))
|
||||
#define ioread16be(p) ((unsigned int)__raw_readw(p))
|
||||
|
||||
#define ioread32(p) ((unsigned int)readl(p))
|
||||
#define ioread32be(p) ((unsigned int)__raw_readl(p))
|
||||
|
||||
#define iowrite8(v,p) writeb(v, p)
|
||||
|
||||
#define iowrite16(v,p) writew(v, p)
|
||||
#define iowrite16be(v,p) __raw_writew(v, p)
|
||||
|
||||
#define iowrite32(v,p) writel(v, p)
|
||||
#define iowrite32be(v,p) __raw_writel(v, p)
|
||||
|
||||
#define ioread8_rep(p,d,c) readsb(p,d,c)
|
||||
#define ioread16_rep(p,d,c) readsw(p,d,c)
|
||||
#define ioread32_rep(p,d,c) readsl(p,d,c)
|
||||
|
||||
#define iowrite8_rep(p,s,c) writesb(p,s,c)
|
||||
#define iowrite16_rep(p,s,c) writesw(p,s,c)
|
||||
#define iowrite32_rep(p,s,c) writesl(p,s,c)
|
||||
|
||||
#endif
|
||||
|
||||
static inline void memcpy_fromio(void * to, const volatile void __iomem *from,
|
||||
unsigned long count)
|
||||
{
|
||||
memcpy(to, (const void __force *)from, count);
|
||||
}
|
||||
|
||||
static inline void memcpy_toio(volatile void __iomem *to, const void * from,
|
||||
unsigned long count)
|
||||
{
|
||||
memcpy((void __force *)to, from, count);
|
||||
}
|
||||
|
||||
static inline void memset_io(volatile void __iomem *addr, unsigned char val,
|
||||
unsigned long count)
|
||||
{
|
||||
memset((void __force *)addr, val, count);
|
||||
}
|
||||
|
||||
#define mmiowb()
|
||||
|
||||
#define IO_SPACE_LIMIT 0xffffffff
|
||||
|
||||
extern void __iomem *__ioremap(unsigned long offset, size_t size,
|
||||
unsigned long flags);
|
||||
extern void __iounmap(void __iomem *addr);
|
||||
|
||||
/*
|
||||
* ioremap - map bus memory into CPU space
|
||||
* @offset bus address of the memory
|
||||
* @size size of the resource to map
|
||||
*
|
||||
* ioremap performs a platform specific sequence of operations to make
|
||||
* bus memory CPU accessible via the readb/.../writel functions and
|
||||
* the other mmio helpers. The returned address is not guaranteed to
|
||||
* be usable directly as a virtual address.
|
||||
*/
|
||||
#define ioremap(offset, size) \
|
||||
__ioremap((offset), (size), 0)
|
||||
|
||||
#define ioremap_nocache(offset, size) \
|
||||
__ioremap((offset), (size), 0)
|
||||
|
||||
#define iounmap(addr) \
|
||||
__iounmap(addr)
|
||||
|
||||
#define ioremap_wc ioremap_nocache
|
||||
#define ioremap_wt ioremap_nocache
|
||||
#define ioremap_uc ioremap_nocache
|
||||
|
||||
#define cached(addr) P1SEGADDR(addr)
|
||||
#define uncached(addr) P2SEGADDR(addr)
|
||||
|
||||
#define virt_to_bus virt_to_phys
|
||||
#define bus_to_virt phys_to_virt
|
||||
#define page_to_bus page_to_phys
|
||||
#define bus_to_page phys_to_page
|
||||
|
||||
/*
|
||||
* Create a virtual mapping cookie for an IO port range. There exists
|
||||
* no such thing as port-based I/O on AVR32, so a regular ioremap()
|
||||
* should do what we need.
|
||||
*/
|
||||
#define ioport_map(port, nr) ioremap(port, nr)
|
||||
#define ioport_unmap(port) iounmap(port)
|
||||
|
||||
/*
|
||||
* Convert a physical pointer to a virtual kernel pointer for /dev/mem
|
||||
* access
|
||||
*/
|
||||
#define xlate_dev_mem_ptr(p) __va(p)
|
||||
|
||||
/*
|
||||
* Convert a virtual cached pointer to an uncached pointer
|
||||
*/
|
||||
#define xlate_dev_kmem_ptr(p) p
|
||||
|
||||
#endif /* __ASM_AVR32_IO_H */
|
|
@ -0,0 +1,24 @@
|
|||
#ifndef __ASM_AVR32_IRQ_H
|
||||
#define __ASM_AVR32_IRQ_H
|
||||
|
||||
#define NR_INTERNAL_IRQS 64
|
||||
|
||||
#include <mach/irq.h>
|
||||
|
||||
#ifndef NR_IRQS
|
||||
#define NR_IRQS (NR_INTERNAL_IRQS)
|
||||
#endif
|
||||
|
||||
#define irq_canonicalize(i) (i)
|
||||
|
||||
#ifndef __ASSEMBLER__
|
||||
int nmi_enable(void);
|
||||
void nmi_disable(void);
|
||||
|
||||
/*
|
||||
* Returns a bitmask of pending interrupts in a group.
|
||||
*/
|
||||
extern unsigned long intc_get_pending(unsigned int group);
|
||||
#endif
|
||||
|
||||
#endif /* __ASM_AVR32_IOCTLS_H */
|
|
@ -0,0 +1,61 @@
|
|||
/*
|
||||
* Copyright (C) 2004-2006 Atmel Corporation
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
#ifndef __ASM_AVR32_IRQFLAGS_H
|
||||
#define __ASM_AVR32_IRQFLAGS_H
|
||||
|
||||
#include <linux/types.h>
|
||||
#include <asm/sysreg.h>
|
||||
|
||||
static inline unsigned long arch_local_save_flags(void)
|
||||
{
|
||||
return sysreg_read(SR);
|
||||
}
|
||||
|
||||
/*
|
||||
* This will restore ALL status register flags, not only the interrupt
|
||||
* mask flag.
|
||||
*
|
||||
* The empty asm statement informs the compiler of this fact while
|
||||
* also serving as a barrier.
|
||||
*/
|
||||
static inline void arch_local_irq_restore(unsigned long flags)
|
||||
{
|
||||
sysreg_write(SR, flags);
|
||||
asm volatile("" : : : "memory", "cc");
|
||||
}
|
||||
|
||||
static inline void arch_local_irq_disable(void)
|
||||
{
|
||||
asm volatile("ssrf %0" : : "n"(SYSREG_GM_OFFSET) : "memory");
|
||||
}
|
||||
|
||||
static inline void arch_local_irq_enable(void)
|
||||
{
|
||||
asm volatile("csrf %0" : : "n"(SYSREG_GM_OFFSET) : "memory");
|
||||
}
|
||||
|
||||
static inline bool arch_irqs_disabled_flags(unsigned long flags)
|
||||
{
|
||||
return (flags & SYSREG_BIT(GM)) != 0;
|
||||
}
|
||||
|
||||
static inline bool arch_irqs_disabled(void)
|
||||
{
|
||||
return arch_irqs_disabled_flags(arch_local_save_flags());
|
||||
}
|
||||
|
||||
static inline unsigned long arch_local_irq_save(void)
|
||||
{
|
||||
unsigned long flags = arch_local_save_flags();
|
||||
|
||||
arch_local_irq_disable();
|
||||
|
||||
return flags;
|
||||
}
|
||||
|
||||
#endif /* __ASM_AVR32_IRQFLAGS_H */
|
|
@ -0,0 +1,12 @@
|
|||
#ifndef __ASM_AVR32_KDEBUG_H
|
||||
#define __ASM_AVR32_KDEBUG_H
|
||||
|
||||
/* Grossly misnamed. */
|
||||
enum die_val {
|
||||
DIE_BREAKPOINT,
|
||||
DIE_SSTEP,
|
||||
DIE_NMI,
|
||||
DIE_OOPS,
|
||||
};
|
||||
|
||||
#endif /* __ASM_AVR32_KDEBUG_H */
|
|
@ -0,0 +1,10 @@
|
|||
#ifndef __ASM_AVR32_KMAP_TYPES_H
|
||||
#define __ASM_AVR32_KMAP_TYPES_H
|
||||
|
||||
#ifdef CONFIG_DEBUG_HIGHMEM
|
||||
# define KM_TYPE_NR 29
|
||||
#else
|
||||
# define KM_TYPE_NR 14
|
||||
#endif
|
||||
|
||||
#endif /* __ASM_AVR32_KMAP_TYPES_H */
|
|
@ -0,0 +1,49 @@
|
|||
/*
|
||||
* Kernel Probes (KProbes)
|
||||
*
|
||||
* Copyright (C) 2005-2006 Atmel Corporation
|
||||
* Copyright (C) IBM Corporation, 2002, 2004
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
#ifndef __ASM_AVR32_KPROBES_H
|
||||
#define __ASM_AVR32_KPROBES_H
|
||||
|
||||
#include <linux/types.h>
|
||||
|
||||
typedef u16 kprobe_opcode_t;
|
||||
#define BREAKPOINT_INSTRUCTION 0xd673 /* breakpoint */
|
||||
#define MAX_INSN_SIZE 2
|
||||
#define MAX_STACK_SIZE 64 /* 32 would probably be OK */
|
||||
|
||||
#define kretprobe_blacklist_size 0
|
||||
|
||||
#define arch_remove_kprobe(p) do { } while (0)
|
||||
|
||||
/* Architecture specific copy of original instruction */
|
||||
struct arch_specific_insn {
|
||||
kprobe_opcode_t insn[MAX_INSN_SIZE];
|
||||
};
|
||||
|
||||
struct prev_kprobe {
|
||||
struct kprobe *kp;
|
||||
unsigned int status;
|
||||
};
|
||||
|
||||
/* per-cpu kprobe control block */
|
||||
struct kprobe_ctlblk {
|
||||
unsigned int kprobe_status;
|
||||
struct prev_kprobe prev_kprobe;
|
||||
struct pt_regs jprobe_saved_regs;
|
||||
char jprobes_stack[MAX_STACK_SIZE];
|
||||
};
|
||||
|
||||
extern int kprobe_fault_handler(struct pt_regs *regs, int trapnr);
|
||||
extern int kprobe_exceptions_notify(struct notifier_block *self,
|
||||
unsigned long val, void *data);
|
||||
|
||||
#define flush_insn_slot(p) do { } while (0)
|
||||
|
||||
#endif /* __ASM_AVR32_KPROBES_H */
|
|
@ -0,0 +1,7 @@
|
|||
#ifndef __ASM_LINKAGE_H
|
||||
#define __ASM_LINKAGE_H
|
||||
|
||||
#define __ALIGN .balign 2
|
||||
#define __ALIGN_STR ".balign 2"
|
||||
|
||||
#endif /* __ASM_LINKAGE_H */
|
|
@ -0,0 +1,10 @@
|
|||
#ifndef __ASM_AVR32_MMU_H
|
||||
#define __ASM_AVR32_MMU_H
|
||||
|
||||
/* Default "unsigned long" context */
|
||||
typedef unsigned long mm_context_t;
|
||||
|
||||
#define MMU_ITLB_ENTRIES 64
|
||||
#define MMU_DTLB_ENTRIES 64
|
||||
|
||||
#endif /* __ASM_AVR32_MMU_H */
|
|
@ -0,0 +1,148 @@
|
|||
/*
|
||||
* Copyright (C) 2004-2006 Atmel Corporation
|
||||
*
|
||||
* ASID handling taken from SH implementation.
|
||||
* Copyright (C) 1999 Niibe Yutaka
|
||||
* Copyright (C) 2003 Paul Mundt
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
#ifndef __ASM_AVR32_MMU_CONTEXT_H
|
||||
#define __ASM_AVR32_MMU_CONTEXT_H
|
||||
|
||||
#include <asm/tlbflush.h>
|
||||
#include <asm/sysreg.h>
|
||||
#include <asm-generic/mm_hooks.h>
|
||||
|
||||
/*
|
||||
* The MMU "context" consists of two things:
|
||||
* (a) TLB cache version
|
||||
* (b) ASID (Address Space IDentifier)
|
||||
*/
|
||||
#define MMU_CONTEXT_ASID_MASK 0x000000ff
|
||||
#define MMU_CONTEXT_VERSION_MASK 0xffffff00
|
||||
#define MMU_CONTEXT_FIRST_VERSION 0x00000100
|
||||
#define NO_CONTEXT 0
|
||||
|
||||
#define MMU_NO_ASID 0x100
|
||||
|
||||
/* Virtual Page Number mask */
|
||||
#define MMU_VPN_MASK 0xfffff000
|
||||
|
||||
/* Cache of MMU context last used */
|
||||
extern unsigned long mmu_context_cache;
|
||||
|
||||
/*
|
||||
* Get MMU context if needed
|
||||
*/
|
||||
static inline void
|
||||
get_mmu_context(struct mm_struct *mm)
|
||||
{
|
||||
unsigned long mc = mmu_context_cache;
|
||||
|
||||
if (((mm->context ^ mc) & MMU_CONTEXT_VERSION_MASK) == 0)
|
||||
/* It's up to date, do nothing */
|
||||
return;
|
||||
|
||||
/* It's old, we need to get new context with new version */
|
||||
mc = ++mmu_context_cache;
|
||||
if (!(mc & MMU_CONTEXT_ASID_MASK)) {
|
||||
/*
|
||||
* We have exhausted all ASIDs of this version.
|
||||
* Flush the TLB and start new cycle.
|
||||
*/
|
||||
flush_tlb_all();
|
||||
/*
|
||||
* Fix version. Note that we avoid version #0
|
||||
* to distinguish NO_CONTEXT.
|
||||
*/
|
||||
if (!mc)
|
||||
mmu_context_cache = mc = MMU_CONTEXT_FIRST_VERSION;
|
||||
}
|
||||
mm->context = mc;
|
||||
}
|
||||
|
||||
/*
|
||||
* Initialize the context related info for a new mm_struct
|
||||
* instance.
|
||||
*/
|
||||
static inline int init_new_context(struct task_struct *tsk,
|
||||
struct mm_struct *mm)
|
||||
{
|
||||
mm->context = NO_CONTEXT;
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* Destroy context related info for an mm_struct that is about
|
||||
* to be put to rest.
|
||||
*/
|
||||
static inline void destroy_context(struct mm_struct *mm)
|
||||
{
|
||||
/* Do nothing */
|
||||
}
|
||||
|
||||
static inline void set_asid(unsigned long asid)
|
||||
{
|
||||
/* XXX: We're destroying TLBEHI[8:31] */
|
||||
sysreg_write(TLBEHI, asid & MMU_CONTEXT_ASID_MASK);
|
||||
cpu_sync_pipeline();
|
||||
}
|
||||
|
||||
static inline unsigned long get_asid(void)
|
||||
{
|
||||
unsigned long asid;
|
||||
|
||||
asid = sysreg_read(TLBEHI);
|
||||
return asid & MMU_CONTEXT_ASID_MASK;
|
||||
}
|
||||
|
||||
static inline void activate_context(struct mm_struct *mm)
|
||||
{
|
||||
get_mmu_context(mm);
|
||||
set_asid(mm->context & MMU_CONTEXT_ASID_MASK);
|
||||
}
|
||||
|
||||
static inline void switch_mm(struct mm_struct *prev,
|
||||
struct mm_struct *next,
|
||||
struct task_struct *tsk)
|
||||
{
|
||||
if (likely(prev != next)) {
|
||||
unsigned long __pgdir = (unsigned long)next->pgd;
|
||||
|
||||
sysreg_write(PTBR, __pgdir);
|
||||
activate_context(next);
|
||||
}
|
||||
}
|
||||
|
||||
#define deactivate_mm(tsk,mm) do { } while(0)
|
||||
|
||||
#define activate_mm(prev, next) switch_mm((prev), (next), NULL)
|
||||
|
||||
static inline void
|
||||
enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
|
||||
{
|
||||
}
|
||||
|
||||
|
||||
static inline void enable_mmu(void)
|
||||
{
|
||||
sysreg_write(MMUCR, (SYSREG_BIT(MMUCR_S)
|
||||
| SYSREG_BIT(E)
|
||||
| SYSREG_BIT(MMUCR_I)));
|
||||
nop(); nop(); nop(); nop(); nop(); nop(); nop(); nop();
|
||||
|
||||
if (mmu_context_cache == NO_CONTEXT)
|
||||
mmu_context_cache = MMU_CONTEXT_FIRST_VERSION;
|
||||
|
||||
set_asid(mmu_context_cache & MMU_CONTEXT_ASID_MASK);
|
||||
}
|
||||
|
||||
static inline void disable_mmu(void)
|
||||
{
|
||||
sysreg_write(MMUCR, SYSREG_BIT(MMUCR_S));
|
||||
}
|
||||
|
||||
#endif /* __ASM_AVR32_MMU_CONTEXT_H */
|
|
@ -0,0 +1,26 @@
|
|||
#ifndef __ASM_AVR32_MODULE_H
|
||||
#define __ASM_AVR32_MODULE_H
|
||||
|
||||
#include <asm-generic/module.h>
|
||||
|
||||
struct mod_arch_syminfo {
|
||||
unsigned long got_offset;
|
||||
int got_initialized;
|
||||
};
|
||||
|
||||
struct mod_arch_specific {
|
||||
/* Starting offset of got in the module core memory. */
|
||||
unsigned long got_offset;
|
||||
/* Size of the got. */
|
||||
unsigned long got_size;
|
||||
/* Number of symbols in syminfo. */
|
||||
int nsyms;
|
||||
/* Additional symbol information (got offsets). */
|
||||
struct mod_arch_syminfo *syminfo;
|
||||
};
|
||||
|
||||
#define MODULE_PROC_FAMILY "AVR32v1"
|
||||
|
||||
#define MODULE_ARCH_VERMAGIC MODULE_PROC_FAMILY
|
||||
|
||||
#endif /* __ASM_AVR32_MODULE_H */
|
|
@ -0,0 +1,9 @@
|
|||
/*
|
||||
* Pull in the generic implementation for the mutex fastpath.
|
||||
*
|
||||
* TODO: implement optimized primitives instead, or leave the generic
|
||||
* implementation in place, or pick the atomic_xchg() based generic
|
||||
* implementation. (see asm-generic/mutex-xchg.h for details)
|
||||
*/
|
||||
|
||||
#include <asm-generic/mutex-dec.h>
|
|
@ -0,0 +1,543 @@
|
|||
/*
|
||||
* AVR32 OCD Interface and register definitions
|
||||
*
|
||||
* Copyright (C) 2004-2007 Atmel Corporation
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
#ifndef __ASM_AVR32_OCD_H
|
||||
#define __ASM_AVR32_OCD_H
|
||||
|
||||
/* OCD Register offsets. Abbreviations used below:
|
||||
*
|
||||
* BP Breakpoint
|
||||
* Comm Communication
|
||||
* DT Data Trace
|
||||
* PC Program Counter
|
||||
* PID Process ID
|
||||
* R/W Read/Write
|
||||
* WP Watchpoint
|
||||
*/
|
||||
#define OCD_DID 0x0000 /* Device ID */
|
||||
#define OCD_DC 0x0008 /* Development Control */
|
||||
#define OCD_DS 0x0010 /* Development Status */
|
||||
#define OCD_RWCS 0x001c /* R/W Access Control */
|
||||
#define OCD_RWA 0x0024 /* R/W Access Address */
|
||||
#define OCD_RWD 0x0028 /* R/W Access Data */
|
||||
#define OCD_WT 0x002c /* Watchpoint Trigger */
|
||||
#define OCD_DTC 0x0034 /* Data Trace Control */
|
||||
#define OCD_DTSA0 0x0038 /* DT Start Addr Channel 0 */
|
||||
#define OCD_DTSA1 0x003c /* DT Start Addr Channel 1 */
|
||||
#define OCD_DTEA0 0x0048 /* DT End Addr Channel 0 */
|
||||
#define OCD_DTEA1 0x004c /* DT End Addr Channel 1 */
|
||||
#define OCD_BWC0A 0x0058 /* PC BP/WP Control 0A */
|
||||
#define OCD_BWC0B 0x005c /* PC BP/WP Control 0B */
|
||||
#define OCD_BWC1A 0x0060 /* PC BP/WP Control 1A */
|
||||
#define OCD_BWC1B 0x0064 /* PC BP/WP Control 1B */
|
||||
#define OCD_BWC2A 0x0068 /* PC BP/WP Control 2A */
|
||||
#define OCD_BWC2B 0x006c /* PC BP/WP Control 2B */
|
||||
#define OCD_BWC3A 0x0070 /* Data BP/WP Control 3A */
|
||||
#define OCD_BWC3B 0x0074 /* Data BP/WP Control 3B */
|
||||
#define OCD_BWA0A 0x0078 /* PC BP/WP Address 0A */
|
||||
#define OCD_BWA0B 0x007c /* PC BP/WP Address 0B */
|
||||
#define OCD_BWA1A 0x0080 /* PC BP/WP Address 1A */
|
||||
#define OCD_BWA1B 0x0084 /* PC BP/WP Address 1B */
|
||||
#define OCD_BWA2A 0x0088 /* PC BP/WP Address 2A */
|
||||
#define OCD_BWA2B 0x008c /* PC BP/WP Address 2B */
|
||||
#define OCD_BWA3A 0x0090 /* Data BP/WP Address 3A */
|
||||
#define OCD_BWA3B 0x0094 /* Data BP/WP Address 3B */
|
||||
#define OCD_NXCFG 0x0100 /* Nexus Configuration */
|
||||
#define OCD_DINST 0x0104 /* Debug Instruction */
|
||||
#define OCD_DPC 0x0108 /* Debug Program Counter */
|
||||
#define OCD_CPUCM 0x010c /* CPU Control Mask */
|
||||
#define OCD_DCCPU 0x0110 /* Debug Comm CPU */
|
||||
#define OCD_DCEMU 0x0114 /* Debug Comm Emulator */
|
||||
#define OCD_DCSR 0x0118 /* Debug Comm Status */
|
||||
#define OCD_PID 0x011c /* Ownership Trace PID */
|
||||
#define OCD_EPC0 0x0120 /* Event Pair Control 0 */
|
||||
#define OCD_EPC1 0x0124 /* Event Pair Control 1 */
|
||||
#define OCD_EPC2 0x0128 /* Event Pair Control 2 */
|
||||
#define OCD_EPC3 0x012c /* Event Pair Control 3 */
|
||||
#define OCD_AXC 0x0130 /* AUX port Control */
|
||||
|
||||
/* Bits in DID */
|
||||
#define OCD_DID_MID_START 1
|
||||
#define OCD_DID_MID_SIZE 11
|
||||
#define OCD_DID_PN_START 12
|
||||
#define OCD_DID_PN_SIZE 16
|
||||
#define OCD_DID_RN_START 28
|
||||
#define OCD_DID_RN_SIZE 4
|
||||
|
||||
/* Bits in DC */
|
||||
#define OCD_DC_TM_START 0
|
||||
#define OCD_DC_TM_SIZE 2
|
||||
#define OCD_DC_EIC_START 3
|
||||
#define OCD_DC_EIC_SIZE 2
|
||||
#define OCD_DC_OVC_START 5
|
||||
#define OCD_DC_OVC_SIZE 3
|
||||
#define OCD_DC_SS_BIT 8
|
||||
#define OCD_DC_DBR_BIT 12
|
||||
#define OCD_DC_DBE_BIT 13
|
||||
#define OCD_DC_EOS_START 20
|
||||
#define OCD_DC_EOS_SIZE 2
|
||||
#define OCD_DC_SQA_BIT 22
|
||||
#define OCD_DC_IRP_BIT 23
|
||||
#define OCD_DC_IFM_BIT 24
|
||||
#define OCD_DC_TOZ_BIT 25
|
||||
#define OCD_DC_TSR_BIT 26
|
||||
#define OCD_DC_RID_BIT 27
|
||||
#define OCD_DC_ORP_BIT 28
|
||||
#define OCD_DC_MM_BIT 29
|
||||
#define OCD_DC_RES_BIT 30
|
||||
#define OCD_DC_ABORT_BIT 31
|
||||
|
||||
/* Bits in DS */
|
||||
#define OCD_DS_SSS_BIT 0
|
||||
#define OCD_DS_SWB_BIT 1
|
||||
#define OCD_DS_HWB_BIT 2
|
||||
#define OCD_DS_HWE_BIT 3
|
||||
#define OCD_DS_STP_BIT 4
|
||||
#define OCD_DS_DBS_BIT 5
|
||||
#define OCD_DS_BP_START 8
|
||||
#define OCD_DS_BP_SIZE 8
|
||||
#define OCD_DS_INC_BIT 24
|
||||
#define OCD_DS_BOZ_BIT 25
|
||||
#define OCD_DS_DBA_BIT 26
|
||||
#define OCD_DS_EXB_BIT 27
|
||||
#define OCD_DS_NTBF_BIT 28
|
||||
|
||||
/* Bits in RWCS */
|
||||
#define OCD_RWCS_DV_BIT 0
|
||||
#define OCD_RWCS_ERR_BIT 1
|
||||
#define OCD_RWCS_CNT_START 2
|
||||
#define OCD_RWCS_CNT_SIZE 14
|
||||
#define OCD_RWCS_CRC_BIT 19
|
||||
#define OCD_RWCS_NTBC_START 20
|
||||
#define OCD_RWCS_NTBC_SIZE 2
|
||||
#define OCD_RWCS_NTE_BIT 22
|
||||
#define OCD_RWCS_NTAP_BIT 23
|
||||
#define OCD_RWCS_WRAPPED_BIT 24
|
||||
#define OCD_RWCS_CCTRL_START 25
|
||||
#define OCD_RWCS_CCTRL_SIZE 2
|
||||
#define OCD_RWCS_SZ_START 27
|
||||
#define OCD_RWCS_SZ_SIZE 3
|
||||
#define OCD_RWCS_RW_BIT 30
|
||||
#define OCD_RWCS_AC_BIT 31
|
||||
|
||||
/* Bits in RWA */
|
||||
#define OCD_RWA_RWA_START 0
|
||||
#define OCD_RWA_RWA_SIZE 32
|
||||
|
||||
/* Bits in RWD */
|
||||
#define OCD_RWD_RWD_START 0
|
||||
#define OCD_RWD_RWD_SIZE 32
|
||||
|
||||
/* Bits in WT */
|
||||
#define OCD_WT_DTE_START 20
|
||||
#define OCD_WT_DTE_SIZE 3
|
||||
#define OCD_WT_DTS_START 23
|
||||
#define OCD_WT_DTS_SIZE 3
|
||||
#define OCD_WT_PTE_START 26
|
||||
#define OCD_WT_PTE_SIZE 3
|
||||
#define OCD_WT_PTS_START 29
|
||||
#define OCD_WT_PTS_SIZE 3
|
||||
|
||||
/* Bits in DTC */
|
||||
#define OCD_DTC_T0WP_BIT 0
|
||||
#define OCD_DTC_T1WP_BIT 1
|
||||
#define OCD_DTC_ASID0EN_BIT 2
|
||||
#define OCD_DTC_ASID0_START 3
|
||||
#define OCD_DTC_ASID0_SIZE 8
|
||||
#define OCD_DTC_ASID1EN_BIT 11
|
||||
#define OCD_DTC_ASID1_START 12
|
||||
#define OCD_DTC_ASID1_SIZE 8
|
||||
#define OCD_DTC_RWT1_START 28
|
||||
#define OCD_DTC_RWT1_SIZE 2
|
||||
#define OCD_DTC_RWT0_START 30
|
||||
#define OCD_DTC_RWT0_SIZE 2
|
||||
|
||||
/* Bits in DTSA0 */
|
||||
#define OCD_DTSA0_DTSA_START 0
|
||||
#define OCD_DTSA0_DTSA_SIZE 32
|
||||
|
||||
/* Bits in DTSA1 */
|
||||
#define OCD_DTSA1_DTSA_START 0
|
||||
#define OCD_DTSA1_DTSA_SIZE 32
|
||||
|
||||
/* Bits in DTEA0 */
|
||||
#define OCD_DTEA0_DTEA_START 0
|
||||
#define OCD_DTEA0_DTEA_SIZE 32
|
||||
|
||||
/* Bits in DTEA1 */
|
||||
#define OCD_DTEA1_DTEA_START 0
|
||||
#define OCD_DTEA1_DTEA_SIZE 32
|
||||
|
||||
/* Bits in BWC0A */
|
||||
#define OCD_BWC0A_ASIDEN_BIT 0
|
||||
#define OCD_BWC0A_ASID_START 1
|
||||
#define OCD_BWC0A_ASID_SIZE 8
|
||||
#define OCD_BWC0A_EOC_BIT 14
|
||||
#define OCD_BWC0A_AME_BIT 25
|
||||
#define OCD_BWC0A_BWE_START 30
|
||||
#define OCD_BWC0A_BWE_SIZE 2
|
||||
|
||||
/* Bits in BWC0B */
|
||||
#define OCD_BWC0B_ASIDEN_BIT 0
|
||||
#define OCD_BWC0B_ASID_START 1
|
||||
#define OCD_BWC0B_ASID_SIZE 8
|
||||
#define OCD_BWC0B_EOC_BIT 14
|
||||
#define OCD_BWC0B_AME_BIT 25
|
||||
#define OCD_BWC0B_BWE_START 30
|
||||
#define OCD_BWC0B_BWE_SIZE 2
|
||||
|
||||
/* Bits in BWC1A */
|
||||
#define OCD_BWC1A_ASIDEN_BIT 0
|
||||
#define OCD_BWC1A_ASID_START 1
|
||||
#define OCD_BWC1A_ASID_SIZE 8
|
||||
#define OCD_BWC1A_EOC_BIT 14
|
||||
#define OCD_BWC1A_AME_BIT 25
|
||||
#define OCD_BWC1A_BWE_START 30
|
||||
#define OCD_BWC1A_BWE_SIZE 2
|
||||
|
||||
/* Bits in BWC1B */
|
||||
#define OCD_BWC1B_ASIDEN_BIT 0
|
||||
#define OCD_BWC1B_ASID_START 1
|
||||
#define OCD_BWC1B_ASID_SIZE 8
|
||||
#define OCD_BWC1B_EOC_BIT 14
|
||||
#define OCD_BWC1B_AME_BIT 25
|
||||
#define OCD_BWC1B_BWE_START 30
|
||||
#define OCD_BWC1B_BWE_SIZE 2
|
||||
|
||||
/* Bits in BWC2A */
|
||||
#define OCD_BWC2A_ASIDEN_BIT 0
|
||||
#define OCD_BWC2A_ASID_START 1
|
||||
#define OCD_BWC2A_ASID_SIZE 8
|
||||
#define OCD_BWC2A_EOC_BIT 14
|
||||
#define OCD_BWC2A_AMB_START 20
|
||||
#define OCD_BWC2A_AMB_SIZE 5
|
||||
#define OCD_BWC2A_AME_BIT 25
|
||||
#define OCD_BWC2A_BWE_START 30
|
||||
#define OCD_BWC2A_BWE_SIZE 2
|
||||
|
||||
/* Bits in BWC2B */
|
||||
#define OCD_BWC2B_ASIDEN_BIT 0
|
||||
#define OCD_BWC2B_ASID_START 1
|
||||
#define OCD_BWC2B_ASID_SIZE 8
|
||||
#define OCD_BWC2B_EOC_BIT 14
|
||||
#define OCD_BWC2B_AME_BIT 25
|
||||
#define OCD_BWC2B_BWE_START 30
|
||||
#define OCD_BWC2B_BWE_SIZE 2
|
||||
|
||||
/* Bits in BWC3A */
|
||||
#define OCD_BWC3A_ASIDEN_BIT 0
|
||||
#define OCD_BWC3A_ASID_START 1
|
||||
#define OCD_BWC3A_ASID_SIZE 8
|
||||
#define OCD_BWC3A_SIZE_START 9
|
||||
#define OCD_BWC3A_SIZE_SIZE 3
|
||||
#define OCD_BWC3A_EOC_BIT 14
|
||||
#define OCD_BWC3A_BWO_START 16
|
||||
#define OCD_BWC3A_BWO_SIZE 2
|
||||
#define OCD_BWC3A_BME_START 20
|
||||
#define OCD_BWC3A_BME_SIZE 4
|
||||
#define OCD_BWC3A_BRW_START 28
|
||||
#define OCD_BWC3A_BRW_SIZE 2
|
||||
#define OCD_BWC3A_BWE_START 30
|
||||
#define OCD_BWC3A_BWE_SIZE 2
|
||||
|
||||
/* Bits in BWC3B */
|
||||
#define OCD_BWC3B_ASIDEN_BIT 0
|
||||
#define OCD_BWC3B_ASID_START 1
|
||||
#define OCD_BWC3B_ASID_SIZE 8
|
||||
#define OCD_BWC3B_SIZE_START 9
|
||||
#define OCD_BWC3B_SIZE_SIZE 3
|
||||
#define OCD_BWC3B_EOC_BIT 14
|
||||
#define OCD_BWC3B_BWO_START 16
|
||||
#define OCD_BWC3B_BWO_SIZE 2
|
||||
#define OCD_BWC3B_BME_START 20
|
||||
#define OCD_BWC3B_BME_SIZE 4
|
||||
#define OCD_BWC3B_BRW_START 28
|
||||
#define OCD_BWC3B_BRW_SIZE 2
|
||||
#define OCD_BWC3B_BWE_START 30
|
||||
#define OCD_BWC3B_BWE_SIZE 2
|
||||
|
||||
/* Bits in BWA0A */
|
||||
#define OCD_BWA0A_BWA_START 0
|
||||
#define OCD_BWA0A_BWA_SIZE 32
|
||||
|
||||
/* Bits in BWA0B */
|
||||
#define OCD_BWA0B_BWA_START 0
|
||||
#define OCD_BWA0B_BWA_SIZE 32
|
||||
|
||||
/* Bits in BWA1A */
|
||||
#define OCD_BWA1A_BWA_START 0
|
||||
#define OCD_BWA1A_BWA_SIZE 32
|
||||
|
||||
/* Bits in BWA1B */
|
||||
#define OCD_BWA1B_BWA_START 0
|
||||
#define OCD_BWA1B_BWA_SIZE 32
|
||||
|
||||
/* Bits in BWA2A */
|
||||
#define OCD_BWA2A_BWA_START 0
|
||||
#define OCD_BWA2A_BWA_SIZE 32
|
||||
|
||||
/* Bits in BWA2B */
|
||||
#define OCD_BWA2B_BWA_START 0
|
||||
#define OCD_BWA2B_BWA_SIZE 32
|
||||
|
||||
/* Bits in BWA3A */
|
||||
#define OCD_BWA3A_BWA_START 0
|
||||
#define OCD_BWA3A_BWA_SIZE 32
|
||||
|
||||
/* Bits in BWA3B */
|
||||
#define OCD_BWA3B_BWA_START 0
|
||||
#define OCD_BWA3B_BWA_SIZE 32
|
||||
|
||||
/* Bits in NXCFG */
|
||||
#define OCD_NXCFG_NXARCH_START 0
|
||||
#define OCD_NXCFG_NXARCH_SIZE 4
|
||||
#define OCD_NXCFG_NXOCD_START 4
|
||||
#define OCD_NXCFG_NXOCD_SIZE 4
|
||||
#define OCD_NXCFG_NXPCB_START 8
|
||||
#define OCD_NXCFG_NXPCB_SIZE 4
|
||||
#define OCD_NXCFG_NXDB_START 12
|
||||
#define OCD_NXCFG_NXDB_SIZE 4
|
||||
#define OCD_NXCFG_MXMSEO_BIT 16
|
||||
#define OCD_NXCFG_NXMDO_START 17
|
||||
#define OCD_NXCFG_NXMDO_SIZE 4
|
||||
#define OCD_NXCFG_NXPT_BIT 21
|
||||
#define OCD_NXCFG_NXOT_BIT 22
|
||||
#define OCD_NXCFG_NXDWT_BIT 23
|
||||
#define OCD_NXCFG_NXDRT_BIT 24
|
||||
#define OCD_NXCFG_NXDTC_START 25
|
||||
#define OCD_NXCFG_NXDTC_SIZE 3
|
||||
#define OCD_NXCFG_NXDMA_BIT 28
|
||||
|
||||
/* Bits in DINST */
|
||||
#define OCD_DINST_DINST_START 0
|
||||
#define OCD_DINST_DINST_SIZE 32
|
||||
|
||||
/* Bits in CPUCM */
|
||||
#define OCD_CPUCM_BEM_BIT 1
|
||||
#define OCD_CPUCM_FEM_BIT 2
|
||||
#define OCD_CPUCM_REM_BIT 3
|
||||
#define OCD_CPUCM_IBEM_BIT 4
|
||||
#define OCD_CPUCM_IEEM_BIT 5
|
||||
|
||||
/* Bits in DCCPU */
|
||||
#define OCD_DCCPU_DATA_START 0
|
||||
#define OCD_DCCPU_DATA_SIZE 32
|
||||
|
||||
/* Bits in DCEMU */
|
||||
#define OCD_DCEMU_DATA_START 0
|
||||
#define OCD_DCEMU_DATA_SIZE 32
|
||||
|
||||
/* Bits in DCSR */
|
||||
#define OCD_DCSR_CPUD_BIT 0
|
||||
#define OCD_DCSR_EMUD_BIT 1
|
||||
|
||||
/* Bits in PID */
|
||||
#define OCD_PID_PROCESS_START 0
|
||||
#define OCD_PID_PROCESS_SIZE 32
|
||||
|
||||
/* Bits in EPC0 */
|
||||
#define OCD_EPC0_RNG_START 0
|
||||
#define OCD_EPC0_RNG_SIZE 2
|
||||
#define OCD_EPC0_CE_BIT 4
|
||||
#define OCD_EPC0_ECNT_START 16
|
||||
#define OCD_EPC0_ECNT_SIZE 16
|
||||
|
||||
/* Bits in EPC1 */
|
||||
#define OCD_EPC1_RNG_START 0
|
||||
#define OCD_EPC1_RNG_SIZE 2
|
||||
#define OCD_EPC1_ATB_BIT 5
|
||||
#define OCD_EPC1_AM_BIT 6
|
||||
|
||||
/* Bits in EPC2 */
|
||||
#define OCD_EPC2_RNG_START 0
|
||||
#define OCD_EPC2_RNG_SIZE 2
|
||||
#define OCD_EPC2_DB_START 2
|
||||
#define OCD_EPC2_DB_SIZE 2
|
||||
|
||||
/* Bits in EPC3 */
|
||||
#define OCD_EPC3_RNG_START 0
|
||||
#define OCD_EPC3_RNG_SIZE 2
|
||||
#define OCD_EPC3_DWE_BIT 2
|
||||
|
||||
/* Bits in AXC */
|
||||
#define OCD_AXC_DIV_START 0
|
||||
#define OCD_AXC_DIV_SIZE 4
|
||||
#define OCD_AXC_AXE_BIT 8
|
||||
#define OCD_AXC_AXS_BIT 9
|
||||
#define OCD_AXC_DDR_BIT 10
|
||||
#define OCD_AXC_LS_BIT 11
|
||||
#define OCD_AXC_REX_BIT 12
|
||||
#define OCD_AXC_REXTEN_BIT 13
|
||||
|
||||
/* Constants for DC:EIC */
|
||||
#define OCD_EIC_PROGRAM_AND_DATA_TRACE 0
|
||||
#define OCD_EIC_BREAKPOINT 1
|
||||
#define OCD_EIC_NOP 2
|
||||
|
||||
/* Constants for DC:OVC */
|
||||
#define OCD_OVC_OVERRUN 0
|
||||
#define OCD_OVC_DELAY_CPU_BTM 1
|
||||
#define OCD_OVC_DELAY_CPU_DTM 2
|
||||
#define OCD_OVC_DELAY_CPU_BTM_DTM 3
|
||||
|
||||
/* Constants for DC:EOS */
|
||||
#define OCD_EOS_NOP 0
|
||||
#define OCD_EOS_DEBUG_MODE 1
|
||||
#define OCD_EOS_BREAKPOINT_WATCHPOINT 2
|
||||
#define OCD_EOS_THQ 3
|
||||
|
||||
/* Constants for RWCS:NTBC */
|
||||
#define OCD_NTBC_OVERWRITE 0
|
||||
#define OCD_NTBC_DISABLE 1
|
||||
#define OCD_NTBC_BREAKPOINT 2
|
||||
|
||||
/* Constants for RWCS:CCTRL */
|
||||
#define OCD_CCTRL_AUTO 0
|
||||
#define OCD_CCTRL_CACHED 1
|
||||
#define OCD_CCTRL_UNCACHED 2
|
||||
|
||||
/* Constants for RWCS:SZ */
|
||||
#define OCD_SZ_BYTE 0
|
||||
#define OCD_SZ_HALFWORD 1
|
||||
#define OCD_SZ_WORD 2
|
||||
|
||||
/* Constants for WT:PTS */
|
||||
#define OCD_PTS_DISABLED 0
|
||||
#define OCD_PTS_PROGRAM_0B 1
|
||||
#define OCD_PTS_PROGRAM_1A 2
|
||||
#define OCD_PTS_PROGRAM_1B 3
|
||||
#define OCD_PTS_PROGRAM_2A 4
|
||||
#define OCD_PTS_PROGRAM_2B 5
|
||||
#define OCD_PTS_DATA_3A 6
|
||||
#define OCD_PTS_DATA_3B 7
|
||||
|
||||
/* Constants for DTC:RWT1 */
|
||||
#define OCD_RWT1_NO_TRACE 0
|
||||
#define OCD_RWT1_DATA_READ 1
|
||||
#define OCD_RWT1_DATA_WRITE 2
|
||||
#define OCD_RWT1_DATA_READ_WRITE 3
|
||||
|
||||
/* Constants for DTC:RWT0 */
|
||||
#define OCD_RWT0_NO_TRACE 0
|
||||
#define OCD_RWT0_DATA_READ 1
|
||||
#define OCD_RWT0_DATA_WRITE 2
|
||||
#define OCD_RWT0_DATA_READ_WRITE 3
|
||||
|
||||
/* Constants for BWC0A:BWE */
|
||||
#define OCD_BWE_DISABLED 0
|
||||
#define OCD_BWE_BREAKPOINT_ENABLED 1
|
||||
#define OCD_BWE_WATCHPOINT_ENABLED 3
|
||||
|
||||
/* Constants for BWC0B:BWE */
|
||||
#define OCD_BWE_DISABLED 0
|
||||
#define OCD_BWE_BREAKPOINT_ENABLED 1
|
||||
#define OCD_BWE_WATCHPOINT_ENABLED 3
|
||||
|
||||
/* Constants for BWC1A:BWE */
|
||||
#define OCD_BWE_DISABLED 0
|
||||
#define OCD_BWE_BREAKPOINT_ENABLED 1
|
||||
#define OCD_BWE_WATCHPOINT_ENABLED 3
|
||||
|
||||
/* Constants for BWC1B:BWE */
|
||||
#define OCD_BWE_DISABLED 0
|
||||
#define OCD_BWE_BREAKPOINT_ENABLED 1
|
||||
#define OCD_BWE_WATCHPOINT_ENABLED 3
|
||||
|
||||
/* Constants for BWC2A:BWE */
|
||||
#define OCD_BWE_DISABLED 0
|
||||
#define OCD_BWE_BREAKPOINT_ENABLED 1
|
||||
#define OCD_BWE_WATCHPOINT_ENABLED 3
|
||||
|
||||
/* Constants for BWC2B:BWE */
|
||||
#define OCD_BWE_DISABLED 0
|
||||
#define OCD_BWE_BREAKPOINT_ENABLED 1
|
||||
#define OCD_BWE_WATCHPOINT_ENABLED 3
|
||||
|
||||
/* Constants for BWC3A:SIZE */
|
||||
#define OCD_SIZE_BYTE_ACCESS 4
|
||||
#define OCD_SIZE_HALFWORD_ACCESS 5
|
||||
#define OCD_SIZE_WORD_ACCESS 6
|
||||
#define OCD_SIZE_DOUBLE_WORD_ACCESS 7
|
||||
|
||||
/* Constants for BWC3A:BRW */
|
||||
#define OCD_BRW_READ_BREAK 0
|
||||
#define OCD_BRW_WRITE_BREAK 1
|
||||
#define OCD_BRW_ANY_ACCES_BREAK 2
|
||||
|
||||
/* Constants for BWC3A:BWE */
|
||||
#define OCD_BWE_DISABLED 0
|
||||
#define OCD_BWE_BREAKPOINT_ENABLED 1
|
||||
#define OCD_BWE_WATCHPOINT_ENABLED 3
|
||||
|
||||
/* Constants for BWC3B:SIZE */
|
||||
#define OCD_SIZE_BYTE_ACCESS 4
|
||||
#define OCD_SIZE_HALFWORD_ACCESS 5
|
||||
#define OCD_SIZE_WORD_ACCESS 6
|
||||
#define OCD_SIZE_DOUBLE_WORD_ACCESS 7
|
||||
|
||||
/* Constants for BWC3B:BRW */
|
||||
#define OCD_BRW_READ_BREAK 0
|
||||
#define OCD_BRW_WRITE_BREAK 1
|
||||
#define OCD_BRW_ANY_ACCES_BREAK 2
|
||||
|
||||
/* Constants for BWC3B:BWE */
|
||||
#define OCD_BWE_DISABLED 0
|
||||
#define OCD_BWE_BREAKPOINT_ENABLED 1
|
||||
#define OCD_BWE_WATCHPOINT_ENABLED 3
|
||||
|
||||
/* Constants for EPC0:RNG */
|
||||
#define OCD_RNG_DISABLED 0
|
||||
#define OCD_RNG_EXCLUSIVE 1
|
||||
#define OCD_RNG_INCLUSIVE 2
|
||||
|
||||
/* Constants for EPC1:RNG */
|
||||
#define OCD_RNG_DISABLED 0
|
||||
#define OCD_RNG_EXCLUSIVE 1
|
||||
#define OCD_RNG_INCLUSIVE 2
|
||||
|
||||
/* Constants for EPC2:RNG */
|
||||
#define OCD_RNG_DISABLED 0
|
||||
#define OCD_RNG_EXCLUSIVE 1
|
||||
#define OCD_RNG_INCLUSIVE 2
|
||||
|
||||
/* Constants for EPC2:DB */
|
||||
#define OCD_DB_DISABLED 0
|
||||
#define OCD_DB_CHAINED_B 1
|
||||
#define OCD_DB_CHAINED_A 2
|
||||
#define OCD_DB_AHAINED_A_AND_B 3
|
||||
|
||||
/* Constants for EPC3:RNG */
|
||||
#define OCD_RNG_DISABLED 0
|
||||
#define OCD_RNG_EXCLUSIVE 1
|
||||
#define OCD_RNG_INCLUSIVE 2
|
||||
|
||||
#ifndef __ASSEMBLER__
|
||||
|
||||
/* Register access macros */
|
||||
static inline unsigned long __ocd_read(unsigned int reg)
|
||||
{
|
||||
return __builtin_mfdr(reg);
|
||||
}
|
||||
|
||||
static inline void __ocd_write(unsigned int reg, unsigned long value)
|
||||
{
|
||||
__builtin_mtdr(reg, value);
|
||||
}
|
||||
|
||||
#define ocd_read(reg) __ocd_read(OCD_##reg)
|
||||
#define ocd_write(reg, value) __ocd_write(OCD_##reg, value)
|
||||
|
||||
struct task_struct;
|
||||
|
||||
void ocd_enable(struct task_struct *child);
|
||||
void ocd_disable(struct task_struct *child);
|
||||
|
||||
#endif /* !__ASSEMBLER__ */
|
||||
|
||||
#endif /* __ASM_AVR32_OCD_H */
|
|
@ -0,0 +1,104 @@
|
|||
/*
|
||||
* Copyright (C) 2004-2006 Atmel Corporation
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
#ifndef __ASM_AVR32_PAGE_H
|
||||
#define __ASM_AVR32_PAGE_H
|
||||
|
||||
#include <linux/const.h>
|
||||
|
||||
/* PAGE_SHIFT determines the page size */
|
||||
#define PAGE_SHIFT 12
|
||||
#define PAGE_SIZE (_AC(1, UL) << PAGE_SHIFT)
|
||||
#define PAGE_MASK (~(PAGE_SIZE-1))
|
||||
#define PTE_MASK PAGE_MASK
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
#include <asm/addrspace.h>
|
||||
|
||||
extern void clear_page(void *to);
|
||||
extern void copy_page(void *to, void *from);
|
||||
|
||||
#define clear_user_page(page, vaddr, pg) clear_page(page)
|
||||
#define copy_user_page(to, from, vaddr, pg) copy_page(to, from)
|
||||
|
||||
/*
|
||||
* These are used to make use of C type-checking..
|
||||
*/
|
||||
typedef struct { unsigned long pte; } pte_t;
|
||||
typedef struct { unsigned long pgd; } pgd_t;
|
||||
typedef struct { unsigned long pgprot; } pgprot_t;
|
||||
typedef struct page *pgtable_t;
|
||||
|
||||
#define pte_val(x) ((x).pte)
|
||||
#define pgd_val(x) ((x).pgd)
|
||||
#define pgprot_val(x) ((x).pgprot)
|
||||
|
||||
#define __pte(x) ((pte_t) { (x) })
|
||||
#define __pgd(x) ((pgd_t) { (x) })
|
||||
#define __pgprot(x) ((pgprot_t) { (x) })
|
||||
|
||||
/* FIXME: These should be removed soon */
|
||||
extern unsigned long memory_start, memory_end;
|
||||
|
||||
/* Pure 2^n version of get_order */
|
||||
static inline int get_order(unsigned long size)
|
||||
{
|
||||
unsigned lz;
|
||||
|
||||
size = (size - 1) >> PAGE_SHIFT;
|
||||
asm("clz %0, %1" : "=r"(lz) : "r"(size));
|
||||
return 32 - lz;
|
||||
}
|
||||
|
||||
#endif /* !__ASSEMBLY__ */
|
||||
|
||||
/*
|
||||
* The hardware maps the virtual addresses 0x80000000 -> 0x9fffffff
|
||||
* permanently to the physical addresses 0x00000000 -> 0x1fffffff when
|
||||
* segmentation is enabled. We want to make use of this in order to
|
||||
* minimize TLB pressure.
|
||||
*/
|
||||
#define PAGE_OFFSET (0x80000000UL)
|
||||
|
||||
/*
|
||||
* ALSA uses virt_to_page() on DMA pages, which I'm not entirely sure
|
||||
* is a good idea. Anyway, we can't simply subtract PAGE_OFFSET here
|
||||
* in that case, so we'll have to mask out the three most significant
|
||||
* bits of the address instead...
|
||||
*
|
||||
* What's the difference between __pa() and virt_to_phys() anyway?
|
||||
*/
|
||||
#define __pa(x) PHYSADDR(x)
|
||||
#define __va(x) ((void *)(P1SEGADDR(x)))
|
||||
|
||||
#define MAP_NR(addr) (((unsigned long)(addr) - PAGE_OFFSET) >> PAGE_SHIFT)
|
||||
|
||||
#define phys_to_page(phys) (pfn_to_page(phys >> PAGE_SHIFT))
|
||||
#define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT)
|
||||
|
||||
#ifndef CONFIG_NEED_MULTIPLE_NODES
|
||||
|
||||
#define PHYS_PFN_OFFSET (CONFIG_PHYS_OFFSET >> PAGE_SHIFT)
|
||||
|
||||
#define pfn_to_page(pfn) (mem_map + ((pfn) - PHYS_PFN_OFFSET))
|
||||
#define page_to_pfn(page) ((unsigned long)((page) - mem_map) + PHYS_PFN_OFFSET)
|
||||
#define pfn_valid(pfn) ((pfn) >= PHYS_PFN_OFFSET && (pfn) < (PHYS_PFN_OFFSET + max_mapnr))
|
||||
#endif /* CONFIG_NEED_MULTIPLE_NODES */
|
||||
|
||||
#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)
|
||||
#define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT)
|
||||
|
||||
#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | \
|
||||
VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
|
||||
|
||||
/*
|
||||
* Memory above this physical address will be considered highmem.
|
||||
*/
|
||||
#define HIGHMEM_START 0x20000000UL
|
||||
|
||||
#endif /* __ASM_AVR32_PAGE_H */
|
|
@ -0,0 +1,10 @@
|
|||
#ifndef __ASM_AVR32_PCI_H__
|
||||
#define __ASM_AVR32_PCI_H__
|
||||
|
||||
/* We don't support PCI yet, but some drivers require this file anyway */
|
||||
|
||||
#define PCI_DMA_BUS_IS_PHYS (1)
|
||||
|
||||
#include <asm-generic/pci-dma-compat.h>
|
||||
|
||||
#endif /* __ASM_AVR32_PCI_H__ */
|
|
@ -0,0 +1,102 @@
|
|||
/*
|
||||
* Copyright (C) 2004-2006 Atmel Corporation
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
#ifndef __ASM_AVR32_PGALLOC_H
|
||||
#define __ASM_AVR32_PGALLOC_H
|
||||
|
||||
#include <linux/mm.h>
|
||||
#include <linux/quicklist.h>
|
||||
#include <asm/page.h>
|
||||
#include <asm/pgtable.h>
|
||||
|
||||
#define QUICK_PGD 0 /* Preserve kernel mappings over free */
|
||||
#define QUICK_PT 1 /* Zero on free */
|
||||
|
||||
static inline void pmd_populate_kernel(struct mm_struct *mm,
|
||||
pmd_t *pmd, pte_t *pte)
|
||||
{
|
||||
set_pmd(pmd, __pmd((unsigned long)pte));
|
||||
}
|
||||
|
||||
static inline void pmd_populate(struct mm_struct *mm, pmd_t *pmd,
|
||||
pgtable_t pte)
|
||||
{
|
||||
set_pmd(pmd, __pmd((unsigned long)page_address(pte)));
|
||||
}
|
||||
#define pmd_pgtable(pmd) pmd_page(pmd)
|
||||
|
||||
static inline void pgd_ctor(void *x)
|
||||
{
|
||||
pgd_t *pgd = x;
|
||||
|
||||
memcpy(pgd + USER_PTRS_PER_PGD,
|
||||
swapper_pg_dir + USER_PTRS_PER_PGD,
|
||||
(PTRS_PER_PGD - USER_PTRS_PER_PGD) * sizeof(pgd_t));
|
||||
}
|
||||
|
||||
/*
|
||||
* Allocate and free page tables
|
||||
*/
|
||||
static inline pgd_t *pgd_alloc(struct mm_struct *mm)
|
||||
{
|
||||
return quicklist_alloc(QUICK_PGD, GFP_KERNEL | __GFP_REPEAT, pgd_ctor);
|
||||
}
|
||||
|
||||
static inline void pgd_free(struct mm_struct *mm, pgd_t *pgd)
|
||||
{
|
||||
quicklist_free(QUICK_PGD, NULL, pgd);
|
||||
}
|
||||
|
||||
static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm,
|
||||
unsigned long address)
|
||||
{
|
||||
return quicklist_alloc(QUICK_PT, GFP_KERNEL | __GFP_REPEAT, NULL);
|
||||
}
|
||||
|
||||
static inline pgtable_t pte_alloc_one(struct mm_struct *mm,
|
||||
unsigned long address)
|
||||
{
|
||||
struct page *page;
|
||||
void *pg;
|
||||
|
||||
pg = quicklist_alloc(QUICK_PT, GFP_KERNEL | __GFP_REPEAT, NULL);
|
||||
if (!pg)
|
||||
return NULL;
|
||||
|
||||
page = virt_to_page(pg);
|
||||
if (!pgtable_page_ctor(page)) {
|
||||
quicklist_free(QUICK_PT, NULL, pg);
|
||||
return NULL;
|
||||
}
|
||||
|
||||
return page;
|
||||
}
|
||||
|
||||
static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte)
|
||||
{
|
||||
quicklist_free(QUICK_PT, NULL, pte);
|
||||
}
|
||||
|
||||
static inline void pte_free(struct mm_struct *mm, pgtable_t pte)
|
||||
{
|
||||
pgtable_page_dtor(pte);
|
||||
quicklist_free_page(QUICK_PT, NULL, pte);
|
||||
}
|
||||
|
||||
#define __pte_free_tlb(tlb,pte,addr) \
|
||||
do { \
|
||||
pgtable_page_dtor(pte); \
|
||||
tlb_remove_page((tlb), pte); \
|
||||
} while (0)
|
||||
|
||||
static inline void check_pgt_cache(void)
|
||||
{
|
||||
quicklist_trim(QUICK_PGD, NULL, 25, 16);
|
||||
quicklist_trim(QUICK_PT, NULL, 25, 16);
|
||||
}
|
||||
|
||||
#endif /* __ASM_AVR32_PGALLOC_H */
|
|
@ -0,0 +1,47 @@
|
|||
/*
|
||||
* Copyright (C) 2004-2006 Atmel Corporation
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
#ifndef __ASM_AVR32_PGTABLE_2LEVEL_H
|
||||
#define __ASM_AVR32_PGTABLE_2LEVEL_H
|
||||
|
||||
#include <asm-generic/pgtable-nopmd.h>
|
||||
|
||||
/*
|
||||
* Traditional 2-level paging structure
|
||||
*/
|
||||
#define PGDIR_SHIFT 22
|
||||
#define PTRS_PER_PGD 1024
|
||||
|
||||
#define PTRS_PER_PTE 1024
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
#define pte_ERROR(e) \
|
||||
printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e))
|
||||
#define pgd_ERROR(e) \
|
||||
printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e))
|
||||
|
||||
/*
|
||||
* Certain architectures need to do special things when PTEs
|
||||
* within a page table are directly modified. Thus, the following
|
||||
* hook is made available.
|
||||
*/
|
||||
#define set_pte(pteptr, pteval) (*(pteptr) = pteval)
|
||||
#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep, pteval)
|
||||
|
||||
/*
|
||||
* (pmds are folded into pgds so this doesn't get actually called,
|
||||
* but the define is needed for a generic inline function.)
|
||||
*/
|
||||
#define set_pmd(pmdptr, pmdval) (*(pmdptr) = pmdval)
|
||||
|
||||
#define pte_pfn(x) ((unsigned long)(((x).pte >> PAGE_SHIFT)))
|
||||
#define pfn_pte(pfn, prot) __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
|
||||
#define pfn_pmd(pfn, prot) __pmd(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
|
||||
|
||||
#endif /* !__ASSEMBLY__ */
|
||||
|
||||
#endif /* __ASM_AVR32_PGTABLE_2LEVEL_H */
|
|
@ -0,0 +1,347 @@
|
|||
/*
|
||||
* Copyright (C) 2004-2006 Atmel Corporation
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
#ifndef __ASM_AVR32_PGTABLE_H
|
||||
#define __ASM_AVR32_PGTABLE_H
|
||||
|
||||
#include <asm/addrspace.h>
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
#include <linux/sched.h>
|
||||
|
||||
#endif /* !__ASSEMBLY__ */
|
||||
|
||||
/*
|
||||
* Use two-level page tables just as the i386 (without PAE)
|
||||
*/
|
||||
#include <asm/pgtable-2level.h>
|
||||
|
||||
/*
|
||||
* The following code might need some cleanup when the values are
|
||||
* final...
|
||||
*/
|
||||
#define PMD_SIZE (1UL << PMD_SHIFT)
|
||||
#define PMD_MASK (~(PMD_SIZE-1))
|
||||
#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
|
||||
#define PGDIR_MASK (~(PGDIR_SIZE-1))
|
||||
|
||||
#define USER_PTRS_PER_PGD (TASK_SIZE / PGDIR_SIZE)
|
||||
#define FIRST_USER_ADDRESS 0UL
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
|
||||
extern void paging_init(void);
|
||||
|
||||
/*
|
||||
* ZERO_PAGE is a global shared page that is always zero: used for
|
||||
* zero-mapped memory areas etc.
|
||||
*/
|
||||
extern struct page *empty_zero_page;
|
||||
#define ZERO_PAGE(vaddr) (empty_zero_page)
|
||||
|
||||
/*
|
||||
* Just any arbitrary offset to the start of the vmalloc VM area: the
|
||||
* current 8 MiB value just means that there will be a 8 MiB "hole"
|
||||
* after the uncached physical memory (P2 segment) until the vmalloc
|
||||
* area starts. That means that any out-of-bounds memory accesses will
|
||||
* hopefully be caught; we don't know if the end of the P1/P2 segments
|
||||
* are actually used for anything, but it is anyway safer to let the
|
||||
* MMU catch these kinds of errors than to rely on the memory bus.
|
||||
*
|
||||
* A "hole" of the same size is added to the end of the P3 segment as
|
||||
* well. It might seem wasteful to use 16 MiB of virtual address space
|
||||
* on this, but we do have 512 MiB of it...
|
||||
*
|
||||
* The vmalloc() routines leave a hole of 4 KiB between each vmalloced
|
||||
* area for the same reason.
|
||||
*/
|
||||
#define VMALLOC_OFFSET (8 * 1024 * 1024)
|
||||
#define VMALLOC_START (P3SEG + VMALLOC_OFFSET)
|
||||
#define VMALLOC_END (P4SEG - VMALLOC_OFFSET)
|
||||
#endif /* !__ASSEMBLY__ */
|
||||
|
||||
/*
|
||||
* Page flags. Some of these flags are not directly supported by
|
||||
* hardware, so we have to emulate them.
|
||||
*/
|
||||
#define _TLBEHI_BIT_VALID 9
|
||||
#define _TLBEHI_VALID (1 << _TLBEHI_BIT_VALID)
|
||||
|
||||
#define _PAGE_BIT_WT 0 /* W-bit : write-through */
|
||||
#define _PAGE_BIT_DIRTY 1 /* D-bit : page changed */
|
||||
#define _PAGE_BIT_SZ0 2 /* SZ0-bit : Size of page */
|
||||
#define _PAGE_BIT_SZ1 3 /* SZ1-bit : Size of page */
|
||||
#define _PAGE_BIT_EXECUTE 4 /* X-bit : execute access allowed */
|
||||
#define _PAGE_BIT_RW 5 /* AP0-bit : write access allowed */
|
||||
#define _PAGE_BIT_USER 6 /* AP1-bit : user space access allowed */
|
||||
#define _PAGE_BIT_BUFFER 7 /* B-bit : bufferable */
|
||||
#define _PAGE_BIT_GLOBAL 8 /* G-bit : global (ignore ASID) */
|
||||
#define _PAGE_BIT_CACHABLE 9 /* C-bit : cachable */
|
||||
|
||||
/* If we drop support for 1K pages, we get two extra bits */
|
||||
#define _PAGE_BIT_PRESENT 10
|
||||
#define _PAGE_BIT_ACCESSED 11 /* software: page was accessed */
|
||||
|
||||
#define _PAGE_WT (1 << _PAGE_BIT_WT)
|
||||
#define _PAGE_DIRTY (1 << _PAGE_BIT_DIRTY)
|
||||
#define _PAGE_EXECUTE (1 << _PAGE_BIT_EXECUTE)
|
||||
#define _PAGE_RW (1 << _PAGE_BIT_RW)
|
||||
#define _PAGE_USER (1 << _PAGE_BIT_USER)
|
||||
#define _PAGE_BUFFER (1 << _PAGE_BIT_BUFFER)
|
||||
#define _PAGE_GLOBAL (1 << _PAGE_BIT_GLOBAL)
|
||||
#define _PAGE_CACHABLE (1 << _PAGE_BIT_CACHABLE)
|
||||
|
||||
/* Software flags */
|
||||
#define _PAGE_ACCESSED (1 << _PAGE_BIT_ACCESSED)
|
||||
#define _PAGE_PRESENT (1 << _PAGE_BIT_PRESENT)
|
||||
|
||||
/*
|
||||
* Page types, i.e. sizes. _PAGE_TYPE_NONE corresponds to what is
|
||||
* usually called _PAGE_PROTNONE on other architectures.
|
||||
*
|
||||
* XXX: Find out if _PAGE_PROTNONE is equivalent with !_PAGE_USER. If
|
||||
* so, we can encode all possible page sizes (although we can't really
|
||||
* support 1K pages anyway due to the _PAGE_PRESENT and _PAGE_ACCESSED
|
||||
* bits)
|
||||
*
|
||||
*/
|
||||
#define _PAGE_TYPE_MASK ((1 << _PAGE_BIT_SZ0) | (1 << _PAGE_BIT_SZ1))
|
||||
#define _PAGE_TYPE_NONE (0 << _PAGE_BIT_SZ0)
|
||||
#define _PAGE_TYPE_SMALL (1 << _PAGE_BIT_SZ0)
|
||||
#define _PAGE_TYPE_MEDIUM (2 << _PAGE_BIT_SZ0)
|
||||
#define _PAGE_TYPE_LARGE (3 << _PAGE_BIT_SZ0)
|
||||
|
||||
/*
|
||||
* Mask which drop software flags. We currently can't handle more than
|
||||
* 512 MiB of physical memory, so we can use bits 29-31 for other
|
||||
* stuff. With a fixed 4K page size, we can use bits 10-11 as well as
|
||||
* bits 2-3 (SZ)
|
||||
*/
|
||||
#define _PAGE_FLAGS_HARDWARE_MASK 0xfffff3ff
|
||||
|
||||
#define _PAGE_FLAGS_CACHE_MASK (_PAGE_CACHABLE | _PAGE_BUFFER | _PAGE_WT)
|
||||
|
||||
/* Flags that may be modified by software */
|
||||
#define _PAGE_CHG_MASK (PTE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY \
|
||||
| _PAGE_FLAGS_CACHE_MASK)
|
||||
|
||||
#define _PAGE_FLAGS_READ (_PAGE_CACHABLE | _PAGE_BUFFER)
|
||||
#define _PAGE_FLAGS_WRITE (_PAGE_FLAGS_READ | _PAGE_RW | _PAGE_DIRTY)
|
||||
|
||||
#define _PAGE_NORMAL(x) __pgprot((x) | _PAGE_PRESENT | _PAGE_TYPE_SMALL \
|
||||
| _PAGE_ACCESSED)
|
||||
|
||||
#define PAGE_NONE (_PAGE_ACCESSED | _PAGE_TYPE_NONE)
|
||||
#define PAGE_READ (_PAGE_FLAGS_READ | _PAGE_USER)
|
||||
#define PAGE_EXEC (_PAGE_FLAGS_READ | _PAGE_EXECUTE | _PAGE_USER)
|
||||
#define PAGE_WRITE (_PAGE_FLAGS_WRITE | _PAGE_USER)
|
||||
#define PAGE_KERNEL _PAGE_NORMAL(_PAGE_FLAGS_WRITE | _PAGE_EXECUTE | _PAGE_GLOBAL)
|
||||
#define PAGE_KERNEL_RO _PAGE_NORMAL(_PAGE_FLAGS_READ | _PAGE_EXECUTE | _PAGE_GLOBAL)
|
||||
|
||||
#define _PAGE_P(x) _PAGE_NORMAL((x) & ~(_PAGE_RW | _PAGE_DIRTY))
|
||||
#define _PAGE_S(x) _PAGE_NORMAL(x)
|
||||
|
||||
#define PAGE_COPY _PAGE_P(PAGE_WRITE | PAGE_READ)
|
||||
#define PAGE_SHARED _PAGE_S(PAGE_WRITE | PAGE_READ)
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
/*
|
||||
* The hardware supports flags for write- and execute access. Read is
|
||||
* always allowed if the page is loaded into the TLB, so the "-w-",
|
||||
* "--x" and "-wx" mappings are implemented as "rw-", "r-x" and "rwx",
|
||||
* respectively.
|
||||
*
|
||||
* The "---" case is handled by software; the page will simply not be
|
||||
* loaded into the TLB if the page type is _PAGE_TYPE_NONE.
|
||||
*/
|
||||
|
||||
#define __P000 __pgprot(PAGE_NONE)
|
||||
#define __P001 _PAGE_P(PAGE_READ)
|
||||
#define __P010 _PAGE_P(PAGE_WRITE)
|
||||
#define __P011 _PAGE_P(PAGE_WRITE | PAGE_READ)
|
||||
#define __P100 _PAGE_P(PAGE_EXEC)
|
||||
#define __P101 _PAGE_P(PAGE_EXEC | PAGE_READ)
|
||||
#define __P110 _PAGE_P(PAGE_EXEC | PAGE_WRITE)
|
||||
#define __P111 _PAGE_P(PAGE_EXEC | PAGE_WRITE | PAGE_READ)
|
||||
|
||||
#define __S000 __pgprot(PAGE_NONE)
|
||||
#define __S001 _PAGE_S(PAGE_READ)
|
||||
#define __S010 _PAGE_S(PAGE_WRITE)
|
||||
#define __S011 _PAGE_S(PAGE_WRITE | PAGE_READ)
|
||||
#define __S100 _PAGE_S(PAGE_EXEC)
|
||||
#define __S101 _PAGE_S(PAGE_EXEC | PAGE_READ)
|
||||
#define __S110 _PAGE_S(PAGE_EXEC | PAGE_WRITE)
|
||||
#define __S111 _PAGE_S(PAGE_EXEC | PAGE_WRITE | PAGE_READ)
|
||||
|
||||
#define pte_none(x) (!pte_val(x))
|
||||
#define pte_present(x) (pte_val(x) & _PAGE_PRESENT)
|
||||
|
||||
#define pte_clear(mm,addr,xp) \
|
||||
do { \
|
||||
set_pte_at(mm, addr, xp, __pte(0)); \
|
||||
} while (0)
|
||||
|
||||
/*
|
||||
* The following only work if pte_present() is true.
|
||||
* Undefined behaviour if not..
|
||||
*/
|
||||
static inline int pte_write(pte_t pte)
|
||||
{
|
||||
return pte_val(pte) & _PAGE_RW;
|
||||
}
|
||||
static inline int pte_dirty(pte_t pte)
|
||||
{
|
||||
return pte_val(pte) & _PAGE_DIRTY;
|
||||
}
|
||||
static inline int pte_young(pte_t pte)
|
||||
{
|
||||
return pte_val(pte) & _PAGE_ACCESSED;
|
||||
}
|
||||
static inline int pte_special(pte_t pte)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* Mutator functions for PTE bits */
|
||||
static inline pte_t pte_wrprotect(pte_t pte)
|
||||
{
|
||||
set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_RW));
|
||||
return pte;
|
||||
}
|
||||
static inline pte_t pte_mkclean(pte_t pte)
|
||||
{
|
||||
set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_DIRTY));
|
||||
return pte;
|
||||
}
|
||||
static inline pte_t pte_mkold(pte_t pte)
|
||||
{
|
||||
set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_ACCESSED));
|
||||
return pte;
|
||||
}
|
||||
static inline pte_t pte_mkwrite(pte_t pte)
|
||||
{
|
||||
set_pte(&pte, __pte(pte_val(pte) | _PAGE_RW));
|
||||
return pte;
|
||||
}
|
||||
static inline pte_t pte_mkdirty(pte_t pte)
|
||||
{
|
||||
set_pte(&pte, __pte(pte_val(pte) | _PAGE_DIRTY));
|
||||
return pte;
|
||||
}
|
||||
static inline pte_t pte_mkyoung(pte_t pte)
|
||||
{
|
||||
set_pte(&pte, __pte(pte_val(pte) | _PAGE_ACCESSED));
|
||||
return pte;
|
||||
}
|
||||
static inline pte_t pte_mkspecial(pte_t pte)
|
||||
{
|
||||
return pte;
|
||||
}
|
||||
|
||||
#define pmd_none(x) (!pmd_val(x))
|
||||
#define pmd_present(x) (pmd_val(x))
|
||||
|
||||
static inline void pmd_clear(pmd_t *pmdp)
|
||||
{
|
||||
set_pmd(pmdp, __pmd(0));
|
||||
}
|
||||
|
||||
#define pmd_bad(x) (pmd_val(x) & ~PAGE_MASK)
|
||||
|
||||
/*
|
||||
* Permanent address of a page. We don't support highmem, so this is
|
||||
* trivial.
|
||||
*/
|
||||
#define pages_to_mb(x) ((x) >> (20-PAGE_SHIFT))
|
||||
#define pte_page(x) (pfn_to_page(pte_pfn(x)))
|
||||
|
||||
/*
|
||||
* Mark the prot value as uncacheable and unbufferable
|
||||
*/
|
||||
#define pgprot_noncached(prot) \
|
||||
__pgprot(pgprot_val(prot) & ~(_PAGE_BUFFER | _PAGE_CACHABLE))
|
||||
|
||||
/*
|
||||
* Mark the prot value as uncacheable but bufferable
|
||||
*/
|
||||
#define pgprot_writecombine(prot) \
|
||||
__pgprot((pgprot_val(prot) & ~_PAGE_CACHABLE) | _PAGE_BUFFER)
|
||||
|
||||
/*
|
||||
* Conversion functions: convert a page and protection to a page entry,
|
||||
* and a page entry and page directory to the page they refer to.
|
||||
*
|
||||
* extern pte_t mk_pte(struct page *page, pgprot_t pgprot)
|
||||
*/
|
||||
#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
|
||||
|
||||
static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
|
||||
{
|
||||
set_pte(&pte, __pte((pte_val(pte) & _PAGE_CHG_MASK)
|
||||
| pgprot_val(newprot)));
|
||||
return pte;
|
||||
}
|
||||
|
||||
#define page_pte(page) page_pte_prot(page, __pgprot(0))
|
||||
|
||||
#define pmd_page_vaddr(pmd) pmd_val(pmd)
|
||||
#define pmd_page(pmd) (virt_to_page(pmd_val(pmd)))
|
||||
|
||||
/* to find an entry in a page-table-directory. */
|
||||
#define pgd_index(address) (((address) >> PGDIR_SHIFT) \
|
||||
& (PTRS_PER_PGD - 1))
|
||||
#define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address))
|
||||
|
||||
/* to find an entry in a kernel page-table-directory */
|
||||
#define pgd_offset_k(address) pgd_offset(&init_mm, address)
|
||||
|
||||
/* Find an entry in the third-level page table.. */
|
||||
#define pte_index(address) \
|
||||
((address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
|
||||
#define pte_offset(dir, address) \
|
||||
((pte_t *) pmd_page_vaddr(*(dir)) + pte_index(address))
|
||||
#define pte_offset_kernel(dir, address) \
|
||||
((pte_t *) pmd_page_vaddr(*(dir)) + pte_index(address))
|
||||
#define pte_offset_map(dir, address) pte_offset_kernel(dir, address)
|
||||
#define pte_unmap(pte) do { } while (0)
|
||||
|
||||
struct vm_area_struct;
|
||||
extern void update_mmu_cache(struct vm_area_struct * vma,
|
||||
unsigned long address, pte_t *ptep);
|
||||
|
||||
/*
|
||||
* Encode and decode a swap entry
|
||||
*
|
||||
* Constraints:
|
||||
* _PAGE_TYPE_* at bits 2-3 (for emulating _PAGE_PROTNONE)
|
||||
* _PAGE_PRESENT at bit 10
|
||||
*
|
||||
* We encode the type into bits 4-9 and offset into bits 11-31. This
|
||||
* gives us a 21 bits offset, or 2**21 * 4K = 8G usable swap space per
|
||||
* device, and 64 possible types.
|
||||
*
|
||||
* NOTE: We should set ZEROs at the position of _PAGE_PRESENT
|
||||
* and _PAGE_PROTNONE bits
|
||||
*/
|
||||
#define __swp_type(x) (((x).val >> 4) & 0x3f)
|
||||
#define __swp_offset(x) ((x).val >> 11)
|
||||
#define __swp_entry(type, offset) ((swp_entry_t) { ((type) << 4) | ((offset) << 11) })
|
||||
#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
|
||||
#define __swp_entry_to_pte(x) ((pte_t) { (x).val })
|
||||
|
||||
typedef pte_t *pte_addr_t;
|
||||
|
||||
#define kern_addr_valid(addr) (1)
|
||||
|
||||
/* No page table caches to initialize (?) */
|
||||
#define pgtable_cache_init() do { } while(0)
|
||||
|
||||
#include <asm-generic/pgtable.h>
|
||||
|
||||
#endif /* !__ASSEMBLY__ */
|
||||
|
||||
#endif /* __ASM_AVR32_PGTABLE_H */
|
|
@ -0,0 +1,167 @@
|
|||
/*
|
||||
* Copyright (C) 2004-2006 Atmel Corporation
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
#ifndef __ASM_AVR32_PROCESSOR_H
|
||||
#define __ASM_AVR32_PROCESSOR_H
|
||||
|
||||
#include <asm/page.h>
|
||||
#include <asm/cache.h>
|
||||
|
||||
#define TASK_SIZE 0x80000000
|
||||
|
||||
#ifdef __KERNEL__
|
||||
#define STACK_TOP TASK_SIZE
|
||||
#define STACK_TOP_MAX STACK_TOP
|
||||
#endif
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
static inline void *current_text_addr(void)
|
||||
{
|
||||
register void *pc asm("pc");
|
||||
return pc;
|
||||
}
|
||||
|
||||
enum arch_type {
|
||||
ARCH_AVR32A,
|
||||
ARCH_AVR32B,
|
||||
ARCH_MAX
|
||||
};
|
||||
|
||||
enum cpu_type {
|
||||
CPU_MORGAN,
|
||||
CPU_AT32AP,
|
||||
CPU_MAX
|
||||
};
|
||||
|
||||
enum tlb_config {
|
||||
TLB_NONE,
|
||||
TLB_SPLIT,
|
||||
TLB_UNIFIED,
|
||||
TLB_INVALID
|
||||
};
|
||||
|
||||
#define AVR32_FEATURE_RMW (1 << 0)
|
||||
#define AVR32_FEATURE_DSP (1 << 1)
|
||||
#define AVR32_FEATURE_SIMD (1 << 2)
|
||||
#define AVR32_FEATURE_OCD (1 << 3)
|
||||
#define AVR32_FEATURE_PCTR (1 << 4)
|
||||
#define AVR32_FEATURE_JAVA (1 << 5)
|
||||
#define AVR32_FEATURE_FPU (1 << 6)
|
||||
|
||||
struct avr32_cpuinfo {
|
||||
struct clk *clk;
|
||||
unsigned long loops_per_jiffy;
|
||||
enum arch_type arch_type;
|
||||
enum cpu_type cpu_type;
|
||||
unsigned short arch_revision;
|
||||
unsigned short cpu_revision;
|
||||
enum tlb_config tlb_config;
|
||||
unsigned long features;
|
||||
u32 device_id;
|
||||
|
||||
struct cache_info icache;
|
||||
struct cache_info dcache;
|
||||
};
|
||||
|
||||
static inline unsigned int avr32_get_manufacturer_id(struct avr32_cpuinfo *cpu)
|
||||
{
|
||||
return (cpu->device_id >> 1) & 0x7f;
|
||||
}
|
||||
static inline unsigned int avr32_get_product_number(struct avr32_cpuinfo *cpu)
|
||||
{
|
||||
return (cpu->device_id >> 12) & 0xffff;
|
||||
}
|
||||
static inline unsigned int avr32_get_chip_revision(struct avr32_cpuinfo *cpu)
|
||||
{
|
||||
return (cpu->device_id >> 28) & 0x0f;
|
||||
}
|
||||
|
||||
extern struct avr32_cpuinfo boot_cpu_data;
|
||||
|
||||
/* No SMP support so far */
|
||||
#define current_cpu_data boot_cpu_data
|
||||
|
||||
/* This decides where the kernel will search for a free chunk of vm
|
||||
* space during mmap's
|
||||
*/
|
||||
#define TASK_UNMAPPED_BASE (PAGE_ALIGN(TASK_SIZE / 3))
|
||||
|
||||
#define cpu_relax() barrier()
|
||||
#define cpu_relax_lowlatency() cpu_relax()
|
||||
#define cpu_sync_pipeline() asm volatile("sub pc, -2" : : : "memory")
|
||||
|
||||
struct cpu_context {
|
||||
unsigned long sr;
|
||||
unsigned long pc;
|
||||
unsigned long ksp; /* Kernel stack pointer */
|
||||
unsigned long r7;
|
||||
unsigned long r6;
|
||||
unsigned long r5;
|
||||
unsigned long r4;
|
||||
unsigned long r3;
|
||||
unsigned long r2;
|
||||
unsigned long r1;
|
||||
unsigned long r0;
|
||||
};
|
||||
|
||||
/* This struct contains the CPU context as stored by switch_to() */
|
||||
struct thread_struct {
|
||||
struct cpu_context cpu_context;
|
||||
unsigned long single_step_addr;
|
||||
u16 single_step_insn;
|
||||
};
|
||||
|
||||
#define INIT_THREAD { \
|
||||
.cpu_context = { \
|
||||
.ksp = sizeof(init_stack) + (long)&init_stack, \
|
||||
}, \
|
||||
}
|
||||
|
||||
/*
|
||||
* Do necessary setup to start up a newly executed thread.
|
||||
*/
|
||||
#define start_thread(regs, new_pc, new_sp) \
|
||||
do { \
|
||||
memset(regs, 0, sizeof(*regs)); \
|
||||
regs->sr = MODE_USER; \
|
||||
regs->pc = new_pc & ~1; \
|
||||
regs->sp = new_sp; \
|
||||
} while(0)
|
||||
|
||||
struct task_struct;
|
||||
|
||||
/* Free all resources held by a thread */
|
||||
extern void release_thread(struct task_struct *);
|
||||
|
||||
/* Return saved PC of a blocked thread */
|
||||
#define thread_saved_pc(tsk) ((tsk)->thread.cpu_context.pc)
|
||||
|
||||
struct pt_regs;
|
||||
extern unsigned long get_wchan(struct task_struct *p);
|
||||
extern void show_regs_log_lvl(struct pt_regs *regs, const char *log_lvl);
|
||||
extern void show_stack_log_lvl(struct task_struct *tsk, unsigned long sp,
|
||||
struct pt_regs *regs, const char *log_lvl);
|
||||
|
||||
#define task_pt_regs(p) \
|
||||
((struct pt_regs *)(THREAD_SIZE + task_stack_page(p)) - 1)
|
||||
|
||||
#define KSTK_EIP(tsk) ((tsk)->thread.cpu_context.pc)
|
||||
#define KSTK_ESP(tsk) ((tsk)->thread.cpu_context.ksp)
|
||||
|
||||
#define ARCH_HAS_PREFETCH
|
||||
|
||||
static inline void prefetch(const void *x)
|
||||
{
|
||||
const char *c = x;
|
||||
asm volatile("pref %0" : : "r"(c));
|
||||
}
|
||||
#define PREFETCH_STRIDE L1_CACHE_BYTES
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
|
||||
#endif /* __ASM_AVR32_PROCESSOR_H */
|
|
@ -0,0 +1,45 @@
|
|||
/*
|
||||
* Copyright (C) 2004-2006 Atmel Corporation
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
#ifndef __ASM_AVR32_PTRACE_H
|
||||
#define __ASM_AVR32_PTRACE_H
|
||||
|
||||
#include <uapi/asm/ptrace.h>
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
#include <asm/ocd.h>
|
||||
|
||||
#define arch_has_single_step() (1)
|
||||
|
||||
#define arch_ptrace_attach(child) ocd_enable(child)
|
||||
|
||||
#define user_mode(regs) (((regs)->sr & MODE_MASK) == MODE_USER)
|
||||
#define instruction_pointer(regs) ((regs)->pc)
|
||||
#define profile_pc(regs) instruction_pointer(regs)
|
||||
#define user_stack_pointer(regs) ((regs)->sp)
|
||||
|
||||
static __inline__ int valid_user_regs(struct pt_regs *regs)
|
||||
{
|
||||
/*
|
||||
* Some of the Java bits might be acceptable if/when we
|
||||
* implement some support for that stuff...
|
||||
*/
|
||||
if ((regs->sr & 0xffff0000) == 0)
|
||||
return 1;
|
||||
|
||||
/*
|
||||
* Force status register flags to be sane and report this
|
||||
* illegal behaviour...
|
||||
*/
|
||||
regs->sr &= 0x0000ffff;
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
#endif /* ! __ASSEMBLY__ */
|
||||
#endif /* __ASM_AVR32_PTRACE_H */
|
|
@ -0,0 +1,13 @@
|
|||
#ifndef _ASM_SERIAL_H
|
||||
#define _ASM_SERIAL_H
|
||||
|
||||
/*
|
||||
* This assumes you have a 1.8432 MHz clock for your UART.
|
||||
*
|
||||
* It'd be nice if someone built a serial card with a 24.576 MHz
|
||||
* clock, since the 16550A is capable of handling a top speed of 1.5
|
||||
* megabits/second; but this requires the faster clock.
|
||||
*/
|
||||
#define BASE_BAUD (1843200 / 16)
|
||||
|
||||
#endif /* _ASM_SERIAL_H */
|
|
@ -0,0 +1,144 @@
|
|||
/*
|
||||
* Copyright (C) 2004-2006 Atmel Corporation
|
||||
*
|
||||
* Based on linux/include/asm-arm/setup.h
|
||||
* Copyright (C) 1997-1999 Russell King
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
#ifndef __ASM_AVR32_SETUP_H__
|
||||
#define __ASM_AVR32_SETUP_H__
|
||||
|
||||
#include <uapi/asm/setup.h>
|
||||
|
||||
|
||||
/* Magic number indicating that a tag table is present */
|
||||
#define ATAG_MAGIC 0xa2a25441
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
/*
|
||||
* Generic memory range, used by several tags.
|
||||
*
|
||||
* addr is always physical.
|
||||
* size is measured in bytes.
|
||||
* next is for use by the OS, e.g. for grouping regions into
|
||||
* linked lists.
|
||||
*/
|
||||
struct tag_mem_range {
|
||||
u32 addr;
|
||||
u32 size;
|
||||
struct tag_mem_range * next;
|
||||
};
|
||||
|
||||
/* The list ends with an ATAG_NONE node. */
|
||||
#define ATAG_NONE 0x00000000
|
||||
|
||||
struct tag_header {
|
||||
u32 size;
|
||||
u32 tag;
|
||||
};
|
||||
|
||||
/* The list must start with an ATAG_CORE node */
|
||||
#define ATAG_CORE 0x54410001
|
||||
|
||||
struct tag_core {
|
||||
u32 flags;
|
||||
u32 pagesize;
|
||||
u32 rootdev;
|
||||
};
|
||||
|
||||
/* it is allowed to have multiple ATAG_MEM nodes */
|
||||
#define ATAG_MEM 0x54410002
|
||||
/* ATAG_MEM uses tag_mem_range */
|
||||
|
||||
/* command line: \0 terminated string */
|
||||
#define ATAG_CMDLINE 0x54410003
|
||||
|
||||
struct tag_cmdline {
|
||||
char cmdline[1]; /* this is the minimum size */
|
||||
};
|
||||
|
||||
/* Ramdisk image (may be compressed) */
|
||||
#define ATAG_RDIMG 0x54410004
|
||||
/* ATAG_RDIMG uses tag_mem_range */
|
||||
|
||||
/* Information about various clocks present in the system */
|
||||
#define ATAG_CLOCK 0x54410005
|
||||
|
||||
struct tag_clock {
|
||||
u32 clock_id; /* Which clock are we talking about? */
|
||||
u32 clock_flags; /* Special features */
|
||||
u64 clock_hz; /* Clock speed in Hz */
|
||||
};
|
||||
|
||||
/* The clock types we know about */
|
||||
#define CLOCK_BOOTCPU 0
|
||||
|
||||
/* Memory reserved for the system (e.g. the bootloader) */
|
||||
#define ATAG_RSVD_MEM 0x54410006
|
||||
/* ATAG_RSVD_MEM uses tag_mem_range */
|
||||
|
||||
/* Ethernet information */
|
||||
|
||||
#define ATAG_ETHERNET 0x54410007
|
||||
|
||||
struct tag_ethernet {
|
||||
u8 mac_index;
|
||||
u8 mii_phy_addr;
|
||||
u8 hw_address[6];
|
||||
};
|
||||
|
||||
#define ETH_INVALID_PHY 0xff
|
||||
|
||||
/* board information */
|
||||
#define ATAG_BOARDINFO 0x54410008
|
||||
|
||||
struct tag_boardinfo {
|
||||
u32 board_number;
|
||||
};
|
||||
|
||||
struct tag {
|
||||
struct tag_header hdr;
|
||||
union {
|
||||
struct tag_core core;
|
||||
struct tag_mem_range mem_range;
|
||||
struct tag_cmdline cmdline;
|
||||
struct tag_clock clock;
|
||||
struct tag_ethernet ethernet;
|
||||
struct tag_boardinfo boardinfo;
|
||||
} u;
|
||||
};
|
||||
|
||||
struct tagtable {
|
||||
u32 tag;
|
||||
int (*parse)(struct tag *);
|
||||
};
|
||||
|
||||
#define __tag __used __attribute__((__section__(".taglist.init")))
|
||||
#define __tagtable(tag, fn) \
|
||||
static struct tagtable __tagtable_##fn __tag = { tag, fn }
|
||||
|
||||
#define tag_member_present(tag,member) \
|
||||
((unsigned long)(&((struct tag *)0L)->member + 1) \
|
||||
<= (tag)->hdr.size * 4)
|
||||
|
||||
#define tag_next(t) ((struct tag *)((u32 *)(t) + (t)->hdr.size))
|
||||
#define tag_size(type) ((sizeof(struct tag_header) + sizeof(struct type)) >> 2)
|
||||
|
||||
#define for_each_tag(t,base) \
|
||||
for (t = base; t->hdr.size; t = tag_next(t))
|
||||
|
||||
extern struct tag *bootloader_tags;
|
||||
|
||||
extern resource_size_t fbmem_start;
|
||||
extern resource_size_t fbmem_size;
|
||||
extern u32 board_number;
|
||||
|
||||
void setup_processor(void);
|
||||
|
||||
#endif /* !__ASSEMBLY__ */
|
||||
|
||||
#endif /* __ASM_AVR32_SETUP_H__ */
|
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Reference in New Issue