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Merge branch 'master' of git.disroot.org:Vovanium/stm32-ada

This commit is contained in:
Vovanium 2024-02-14 19:46:51 +03:00
parent c0ba4e818c 789214bc4c
commit 0700017033
4 changed files with 359 additions and 55 deletions
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30
library/source/f4/stm32-usb_otg-device.ads
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@ -32,8 +32,7 @@ package STM32.USB_OTG.Device is
-- DAINTMSK IEPM IEP
-- DAINTMSK OEPM OEP
-- DIEPEMPMSK INEPTXFEM IEP
type Device_Address is range 0 .. 127;
-- DSTS DEVLNSTS DEVLNSTS_DP, DEVLNSTS_DM
-- DCFG
@ -93,22 +92,6 @@ package STM32.USB_OTG.Device is
-- DCTL
type Test_Mode is (
No_Test,
Test_J,
Test_K,
Test_SE0_NAK,
Test_Packet,
Test_Force_Enable)
with Size => 3;
for Test_Mode use (
No_Test => 2#000#,
Test_J => 2#001#,
Test_K => 2#010#,
Test_SE0_NAK => 2#011#,
Test_Packet => 2#100#,
Test_Force_Enable => 2#101#);
type Device_Control_Register is record
RWUSIG : Boolean := False; -- Remote wakeup signaling
SDIS : Boolean := False; -- Soft disconnect
@ -241,8 +224,6 @@ package STM32.USB_OTG.Device is
-- DAINT, DAINTMSK, DIEPEMPMSK
type Channel_Set is array (Channel_Number) of Boolean with Pack, Default_Component_Value => False;
type Device_Endpoint_Set_Register is record
IEP : Channel_Set; -- IN endpoints
OEP : Channel_Set; -- OUT endpoints
@ -291,13 +272,6 @@ package STM32.USB_OTG.Device is
Max_16_Bytes : constant Endpoint_0_Maximum_Packet_Size := 2;
Max_8_Bytes : constant Endpoint_0_Maximum_Packet_Size := 3;
type Endpoint_Type is (
Control_Endpoint,
Isochronous_Endpoint,
Bulk_Endpoint,
Interrupt_Endpoint)
with Size => 2;
type Device_In_Endpoint_Control_Register is record
MPSIZ : Packet_Byte_Count := 0; -- Maximum packet size (Special meaning in EP 0!)
Unused_11 : Unused_4_Bits := 0;
@ -472,7 +446,7 @@ package STM32.USB_OTG.Device is
DIEPEACHMSK1 : Device_In_Endpoint_Interrupt_Register;
DOEPEACHMSK1 : Device_Out_Endpoint_Interrupt_Register;
DIEP : Device_In_Endpoint_Register_Array;
DOEP : Device_In_Endpoint_Register_Array;
DOEP : Device_Out_Endpoint_Register_Array;
end record;
for DEVICE_Registers use record
DCFG at 16#00# range 0 .. 31;

291
library/source/f4/stm32-usb_otg-host.ads Normal file
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@ -0,0 +1,291 @@
--
-- Host-mode-related registers of USB OTG (HS / FS) controller
--
package STM32.USB_OTG.Host is
-- Registers renamed
-- Orig. register Register name here
--
-- HCCHARx HC (x).CHAR
-- HCSPLTx HC (x).SPLT
-- HCINTx HC (x).INT
-- HCINTMSKx HC (x).INTMSK
-- HCTSIZx HC (x).TSIZ
-- HCDMA HC (x).DMA
-- Fields renamed
-- Register Orig. field Field name here
--
-- HAINTMSK HAINTM HAINT (array)
-- HCINTMSK * corresponding fields in HCINT
-- HCFG
type PHY_Clock_Select is (
PHY_Clock_Reserved_0,
PHY_Clock_48_MHz,
PHY_Clock_6_MHz,
PHY_Clock_Reserved_3) with Size => 2;
type Configuration_Register is record
FSLSPCS : PHY_Clock_Select; -- FS/LS PHY clock select
FSLSS : Boolean := False; -- FS- and LS-only support
Unused_3 : Unused_29_Bits := 0;
end record with Size => 32;
for Configuration_Register use record
FSLSPCS at 0 range 0 .. 1;
FSLSS at 0 range 2 .. 2;
Unused_3 at 0 range 3 .. 31;
end record;
-- HFIR
type Frame_Interval_Register is record
FRIVL : Integer range 0 .. 2**16 - 1 := 16#EA60#; -- Frame interval
RLDCTRL : Boolean := False;
Unused_17 : Unused_15_Bits := 0;
end record with Size => 32;
for Frame_Interval_Register use record
FRIVL at 0 range 0 .. 15;
RLDCTRL at 0 range 16 .. 16;
Unused_17 at 0 range 17 .. 31;
end record;
-- HFNUM
type Frame_Number_Register is record
FRNUM : Integer range 0 .. 2**16 - 1 := 16#3FFF#; -- Frame number
FTREM : Integer range 0 .. 2**16 - 1 := 0; -- Frame time remaining
end record with Size => 32;
for Frame_Number_Register use record
FRNUM at 0 range 0 .. 15;
FTREM at 0 range 16 .. 31;
end record;
-- HPTXSTS
type Periodic_Transmit_Status_Register is record
PTXFSAVL : Integer range 0 .. 2**16 - 1 := 16#100#; -- Periodic tx data FIFO space available
PTXQSAV : Integer range 0 .. 2**8 - 1 := 8; -- Periodic tx request queue space available
PTXQTOP : Integer range 0 .. 2**8 - 1 := 0; -- Top of the periodic transmit request queue
end record with Size => 32;
for Periodic_Transmit_Status_Register use record
PTXFSAVL at 0 range 0 .. 15;
PTXQSAV at 0 range 16 .. 23;
PTXQTOP at 0 range 24 .. 31;
end record;
-- HAINT, HAINTMSK
type All_Channels_Interrupt_Register is record
HAINT : Channel_Set; -- Channel interrupts
Unused_16 : Unused_16_Bits;
end record with Size => 32;
for All_Channels_Interrupt_Register use record
HAINT at 0 range 0 .. 15;
Unused_16 at 0 range 16 .. 31;
end record;
-- HPRT
type Port_Speed is (
High_Speed,
Full_Speed,
Low_Speed)
with Size => 2;
for Port_Speed use (
High_Speed => 2#00#,
Full_Speed => 2#01#,
Low_Speed => 2#10#);
type Port_Control_Status_Register is record
PCSTS : Boolean := False; -- Port connect status
PCDET : Boolean := False; -- Port connect detected
PENA : Boolean := False; -- Port enable
PENCHNG : Boolean := False; -- Port enable/disable change
POCA : Boolean := False; -- Port overcurrent active
POCCHNG : Boolean := False; -- Port overcurrent change
PRES : Boolean := False; -- Port resume
PSUSP : Boolean := False; -- Port suspend
PRST : Boolean := False; -- Port reset
Unused_9 : Unused_1_Bit := 0;
PLSTS_DP : Integer range 0 .. 1 := 0; -- Port line DP status
PLSTS_DM : Integer range 0 .. 1 := 0; -- Port line DM status
PPWR : Boolean := False; -- Port power
PTCTL : Test_Mode := No_Test; -- Port test control
PSPD : Port_Speed := High_Speed; -- Port speed
Unused_19 : Unused_13_Bits := 0;
end record with Size => 32;
for Port_Control_Status_Register use record
PCSTS at 0 range 0 .. 0;
PCDET at 0 range 1 .. 1;
PENA at 0 range 2 .. 2;
PENCHNG at 0 range 3 .. 3;
POCA at 0 range 4 .. 4;
POCCHNG at 0 range 5 .. 5;
PRES at 0 range 6 .. 6;
PSUSP at 0 range 7 .. 7;
PRST at 0 range 8 .. 8;
Unused_9 at 0 range 9 .. 9;
PLSTS_DP at 0 range 10 .. 10;
PLSTS_DM at 0 range 11 .. 11;
PPWR at 0 range 12 .. 12;
PTCTL at 0 range 13 .. 16;
PSPD at 0 range 17 .. 18;
Unused_19 at 0 range 19 .. 31;
end record;
-- HCCHARx
type Endpoint_Direction is (
Out_Endpoint,
In_Endpoint)
with Size => 1;
type Channel_Characteristics_Register is record
MPSIZ : Packet_Byte_Count := 0; -- Maximum packet size
EPNUM : Integer range 0 .. 15 := 0; -- Endpoint number
EPDIR : Endpoint_Direction := Out_Endpoint; -- Endpoint direction
Unused_16 : Unused_1_Bit := 0;
LSDEV : Boolean := False; -- Low-speed device
EPTYP : Endpoint_Type := Control_Endpoint; -- Endpoint type
MCNT : Integer range 0 .. 3 := 0; -- Multicount
DAD : Device_Address := 0; -- Device address
ODDFRM : Boolean := False; -- Odd frame
CHDIS : Boolean := False; -- Channel disable
CHENA : Boolean := False; -- Channel enable
end record with Size => 32;
for Channel_Characteristics_Register use record
MPSIZ at 0 range 0 .. 10;
EPNUM at 0 range 11 .. 14;
EPDIR at 0 range 15 .. 15;
Unused_16 at 0 range 16 .. 16;
LSDEV at 0 range 17 .. 17;
EPTYP at 0 range 18 .. 19;
MCNT at 0 range 20 .. 21;
DAD at 0 range 22 .. 28;
ODDFRM at 0 range 29 .. 29;
CHDIS at 0 range 30 .. 30;
CHENA at 0 range 31 .. 31;
end record;
-- HCSPLTx
type Transaction_Part is (
Payload_Middle,
Payload_End,
Payload_Begin,
Payload_All)
with Size => 2;
type Channel_Split_Control_Register is record
PRTADDR : Device_Address := 0; -- Port address
HUBADDR : Device_Address := 0; -- Hub address
XACTPOS : Transaction_Part := Payload_Middle; -- Transaction position
COMPLSPLT : Boolean := False; -- Do complete split
Unused_17 : Unused_14_Bits := 0;
SPLITEN : Boolean := False; -- Split enable
end record with Size => 32;
for Channel_Split_Control_Register use record
PRTADDR at 0 range 0 .. 6;
HUBADDR at 0 range 7 .. 13;
XACTPOS at 0 range 14 .. 15;
COMPLSPLT at 0 range 16 .. 16;
Unused_17 at 0 range 17 .. 30;
SPLITEN at 0 range 31 .. 31;
end record;
-- HCINTx, HCINTMSKx
type Channel_Interrupt_Register is record
XFRC : Boolean := False; -- Transfer completed
CHH : Boolean := False; -- Channel halted
AHBERR : Boolean := False; -- AHB error (HS only)
STALL : Boolean := False; -- STALL response received
NAK : Boolean := False; -- NAK response received
ACK : Boolean := False; -- ACK response received/transmitted
NYET : Boolean := False; -- Not yet ready response received (HS only)
TXERR : Boolean := False; -- Transaction error
BBERR : Boolean := False; -- Babble error
FRMOR : Boolean := False; -- Frame overrun
DTERR : Boolean := False; -- Data toggle error
Unused_11 : Unused_21_Bits := 0;
end record with Size => 32;
for Channel_Interrupt_Register use record
XFRC at 0 range 0 .. 0;
CHH at 0 range 1 .. 1;
AHBERR at 0 range 2 .. 2;
STALL at 0 range 3 .. 3;
NAK at 0 range 4 .. 4;
ACK at 0 range 5 .. 5;
NYET at 0 range 6 .. 6;
TXERR at 0 range 7 .. 7;
BBERR at 0 range 8 .. 8;
FRMOR at 0 range 9 .. 9;
DTERR at 0 range 10 .. 10;
Unused_11 at 0 range 11 .. 31;
end record;
-- HCTSIZx
subtype Transfer_Byte_Count is Storage_Count range 0 .. 2**19 - 1;
subtype Packet_Count is Integer range 0 .. 2**10 - 1;
type Channel_Transfer_Size_Register is record
XFRSIZ : Transfer_Byte_Count := 0; -- Transfer size
PKTCNT : Packet_Count := 0; -- Packet count
DPID : Data_PID := DATA0; -- Data PID
Unused_31 : Unused_1_Bit := 0;
end record with Size => 32;
for Channel_Transfer_Size_Register use record
XFRSIZ at 0 range 0 .. 18;
PKTCNT at 0 range 19 .. 28;
DPID at 0 range 29 .. 30;
Unused_31 at 0 range 31 .. 31;
end record;
type Channel_Registers is record
CHAR : Channel_Characteristics_Register;
SPLT : Channel_Split_Control_Register;
INT : Channel_Interrupt_Register;
INTMSK : Channel_Interrupt_Register;
TSIZ : Channel_Transfer_Size_Register;
DMA : Address_Register;
end record with Size => 8 * 32;
for Channel_Registers use record
CHAR at 16#00# range 0 .. 31;
SPLT at 16#04# range 0 .. 31;
INT at 16#08# range 0 .. 31;
INTMSK at 16#0C# range 0 .. 31;
TSIZ at 16#10# range 0 .. 31;
DMA at 16#14# range 0 .. 31;
end record;
type Channel_Register_Array is array (Channel_Number) of Channel_Registers;
--
type USB_OTG_Host_Registers is record
HCFG : Configuration_Register;
HPTXSTS : Periodic_Transmit_Status_Register;
HAINT : All_Channels_Interrupt_Register;
HAINTMSK : All_Channels_Interrupt_Register;
HFIR : Frame_Interval_Register;
HPRT : Port_Control_Status_Register;
HFNUM : Frame_Number_Register;
HC : Channel_Register_Array;
end record;
for USB_OTG_Host_Registers use record
HCFG at 16#0000# range 0 .. 31;
HFIR at 16#0004# range 0 .. 31;
HFNUM at 16#0008# range 0 .. 31;
HPTXSTS at 16#0010# range 0 .. 31;
HAINT at 16#0014# range 0 .. 31;
HAINTMSK at 16#0018# range 0 .. 31;
HPRT at 16#0040# range 0 .. 31;
HC at 16#0100# range 0 .. 16 * 8 * 32 - 1;
end record;
end STM32.USB_OTG.Host;

90
library/source/f4/stm32-usb_otg.ads
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@ -1,4 +1,3 @@
with System.Storage_Elements;
use System.Storage_Elements;
@ -10,6 +9,10 @@ package STM32.USB_OTG is
type OTG_Role is (USB_Device, USB_Host) with Size => 1;
type Device_Address is range 0 .. 127; -- USB device address
-- Channels
type Extended_Channel_Number is range 0 .. 31; -- Channel / Tx FIFO / Endpoint numbers
Non_Periodic_Tx_FIFO : constant Extended_Channel_Number := 2#00000#; -- Non-periodic Tx FIFO in host mode
Periodic_Tx_FIFO : constant Extended_Channel_Number := 2#00001#; -- Periodic Tx FIFO in host mode
@ -17,6 +20,35 @@ package STM32.USB_OTG is
subtype Channel_Number is Extended_Channel_Number range 0 .. 15;
type Channel_Set is array (Channel_Number) of Boolean with Pack, Default_Component_Value => False;
-- Used in DCTL and HPRT registers
type Test_Mode is (
No_Test,
Test_J,
Test_K,
Test_SE0_NAK,
Test_Packet,
Test_Force_Enable)
with Size => 3;
for Test_Mode use (
No_Test => 2#000#,
Test_J => 2#001#,
Test_K => 2#010#,
Test_SE0_NAK => 2#011#,
Test_Packet => 2#100#,
Test_Force_Enable => 2#101#);
-- Used in DIEPCTLx, HCCHARx
type Endpoint_Type is (
Control_Endpoint,
Isochronous_Endpoint,
Bulk_Endpoint,
Interrupt_Endpoint)
with Size => 2;
-- GOTGCTL
type Connector_Status is (
@ -289,6 +321,7 @@ package STM32.USB_OTG is
subtype Packet_Byte_Count is Storage_Count range 0 .. 2**11 - 1;
type Data_PID is (DATA0, DATA1, DATA2, MDATA) with Size => 2;
SETUP : constant Data_PID := MDATA;
type Packet_Status is (
No_Packet_Status,
@ -528,33 +561,36 @@ package STM32.USB_OTG is
DIEPTXF at 16#104# range 0 .. 32 * 7 - 1;
end record;
type Power_and_Clock_Gating_Register is record
STPPCLK : Boolean := False; -- Stop PHY clock
GATEHCLK : Boolean := False; -- Gate HCLK
Unused_2 : Unused_2_Bits := 0;
PHYSUSP : Boolean := False; -- PHY suspended
ENL1GTG : Boolean := False; -- Enable sleep clock gating
PHYSLEEP : Boolean := False; -- PHY in sleep mode
SUSP : Boolean := False; -- Deep sleep
Unused_8 : Unused_24_Bits := 16#200B_80#;
package Power_and_Clock is
end record with Size => 32;
for Power_and_Clock_Gating_Register use record
STPPCLK at 0 range 0 .. 0;
GATEHCLK at 0 range 1 .. 1;
Unused_2 at 0 range 2 .. 3;
PHYSUSP at 0 range 4 .. 4;
ENL1GTG at 0 range 5 .. 5;
PHYSLEEP at 0 range 6 .. 6;
SUSP at 0 range 7 .. 7;
Unused_8 at 0 range 8 .. 31;
end record;
type Power_and_Clock_Gating_Register is record
STPPCLK : Boolean := False; -- Stop PHY clock
GATEHCLK : Boolean := False; -- Gate HCLK
Unused_2 : Unused_2_Bits := 0;
PHYSUSP : Boolean := False; -- PHY suspended
ENL1GTG : Boolean := False; -- Enable sleep clock gating
PHYSLEEP : Boolean := False; -- PHY in sleep mode
SUSP : Boolean := False; -- Deep sleep
Unused_8 : Unused_24_Bits := 16#200B_80#;
end record with Size => 32;
for Power_and_Clock_Gating_Register use record
STPPCLK at 0 range 0 .. 0;
GATEHCLK at 0 range 1 .. 1;
Unused_2 at 0 range 2 .. 3;
PHYSUSP at 0 range 4 .. 4;
ENL1GTG at 0 range 5 .. 5;
PHYSLEEP at 0 range 6 .. 6;
SUSP at 0 range 7 .. 7;
Unused_8 at 0 range 8 .. 31;
end record;
type OTG_PWRCLK_Registers is record
PCGCR : Power_and_Clock_Gating_Register;
end record;
for OTG_PWRCLK_Registers use record
PCGCR at 16#00# range 0 .. 31;
end record;
type OTG_PWRCLK_Registers is record
PCGCR : Power_and_Clock_Gating_Register;
end record;
for OTG_PWRCLK_Registers use record
PCGCR at 16#00# range 0 .. 31;
end record;
end Power_and_Clock;
end STM32.USB_OTG;

3
library/source/stm32.ads
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@ -19,11 +19,14 @@ package STM32 is
type Unused_10_Bits is mod 2**10 with Size => 10;
type Unused_12_Bits is mod 2**12 with Size => 12;
type Unused_13_Bits is mod 2**13 with Size => 13;
type Unused_14_Bits is mod 2**14 with Size => 14;
type Unused_15_Bits is mod 2**15 with Size => 15;
type Unused_16_Bits is mod 2**16 with Size => 16;
type Unused_17_Bits is mod 2**17 with Size => 17;
type Unused_18_Bits is mod 2**18 with Size => 18;
type Unused_19_Bits is mod 2**19 with Size => 19;
type Unused_20_Bits is mod 2**20 with Size => 20;
type Unused_21_Bits is mod 2**21 with Size => 21;
type Unused_22_Bits is mod 2**22 with Size => 22;
type Unused_23_Bits is mod 2**23 with Size => 23;
type Unused_24_Bits is mod 2**24 with Size => 24;