Vovanium
|
10633ac67e
|
+ Commons for graphics
|
2021-08-04 19:52:01 +03:00 |
|
Vovanium
|
5a7e565ed4
|
* clear library variants: there is single library for a family (F4) now
|
2021-07-29 19:23:11 +03:00 |
|
Vovanium
|
ba399f3912
|
* simplification: no partial function module currently
|
2021-07-29 18:56:30 +03:00 |
|
Vovanium
|
4add768408
|
+DMA2D registers
|
2021-07-29 18:52:48 +03:00 |
|
Vovanium
|
4dafd79dae
|
Do not need separate type for address register
|
2021-07-29 17:32:46 +03:00 |
|
Vovanium
|
d9e1041703
|
+ CRC, DMA and FLASH register definitions
|
2021-07-29 01:27:05 +03:00 |
|
Vovanium
|
8426549db3
|
RCC for F42xxx F43xxx
|
2021-07-28 19:54:11 +03:00 |
|
Vovanium
|
0dc9c6b003
|
Eliminating name hiding between RCC indices and Units
|
2021-07-27 19:50:57 +03:00 |
|
Vovanium
|
79e32efc47
|
* new reorganizing of library: make specific chip accessible via `renames`
|
2021-07-27 19:28:39 +03:00 |
|
Vovanium
|
d47f9e8777
|
* changed RCC control registers to arrays
|
2021-07-27 18:41:07 +03:00 |
|
Vovanium
|
1284b384df
|
Convert RCC.AHB1 control to boolean arrays
|
2021-07-22 19:41:10 +03:00 |
|
Vovanium
|
ff41791260
|
Split RCC for 407 etc and 42x etc
|
2021-07-22 19:06:11 +03:00 |
|
Vovanium
|
052bb772bb
|
* GPIO Example modularity
|
2021-07-22 16:26:32 +03:00 |
|
Vovanium
|
0db7e0a14c
|
* Structure of files to make it portable (identical units in all chips get same package names)
|
2021-07-21 19:17:10 +03:00 |
|
Vovanium
|
9b6a1abd1e
|
* Make a distinct library for every chip. This could make user code portable across chips.
|
2021-07-20 19:36:51 +03:00 |
|
Vovanium
|
9bc2570d00
|
+ Baud rate calculation function
|
2021-07-15 19:39:51 +03:00 |
|
Vovanium
|
37f1174946
|
* Changed Volatile_Full_Access attribute to pragma to mantain portability.
|
2021-07-15 18:26:58 +03:00 |
|
Vovanium
|
3085366ca0
|
* added GNAT's Volatile_Full_Access attributes -- this is because of APB bridge quirk
|
2021-05-03 22:57:26 +03:00 |
|
Vovanium
|
0691fd254f
|
+ bus annotations
|
2021-05-03 22:56:37 +03:00 |
|
Vovanium
|
4c7c6ace60
|
+ PWR module added
|
2021-05-03 16:02:24 +03:00 |
|
Vovanium
|
fc7db2cd4d
|
+ HSITRIM default constant (it's found in depths of HAL)
|
2021-05-03 16:01:19 +03:00 |
|
Vovanium
|
4252d3273d
|
(fix) Scaling factors mistake
|
2019-07-17 21:26:34 +03:00 |
|
Vovanium
|
5f97ee58ef
|
(+) USART, support additions
|
2019-05-04 22:39:46 +03:00 |
|
Vovanium
|
fd5ccafc3c
|
Shorten package names: there's no need in name repetitions
|
2019-05-04 14:28:38 +03:00 |
|
Vovanium
|
acc5dd48eb
|
Small reorganizing
|
2019-04-18 00:38:38 +03:00 |
|
Vovanium
|
2aad05bca5
|
(+) Example for STM32F429DISCO
|
2019-02-05 19:33:30 +03:00 |
|
Vovanium
|
e73f93cd43
|
Initial, enough to flash a led
|
2019-01-16 01:46:42 +03:00 |