freebsd-ports/emulators/riscv-isa-sim/files/patch-riscv_riscv.mk.in
Li-Wen Hsu db3dfea2ca - Update to 20181005 snapshot
Sponsored by:	The FreeBSD Foundation
2018-10-05 11:07:12 +00:00

20 lines
398 B
Makefile

--- riscv/riscv.mk.in.orig 2018-10-05 10:52:11 UTC
+++ riscv/riscv.mk.in
@@ -23,7 +23,7 @@ riscv_hdrs = \
tracer.h \
extension.h \
rocc.h \
- insn_template.h \
+ insn_template.hpp \
mulhi.h \
debug_module.h \
debug_rom_defines.h \
@@ -31,7 +31,7 @@ riscv_hdrs = \
jtag_dtm.h \
riscv_precompiled_hdrs = \
- insn_template.h \
+ insn_template.hpp \
riscv_srcs = \
processor.cc \