pkgsrc/cad/verilog-current
ryoon f8e628f818 * .include "../../devel/readline/buildlink3.mk" with USE_GNU_READLINE=yes
are replaced with .include "../../devel/readline/buildlink3.mk", and
  USE_GNU_READLINE are removed,

* .include "../../devel/readline/buildlink3.mk" without USE_GNU_READLINE
  are replaced with .include "../../mk/readline.buildlink3.mk".
2013-07-15 02:02:17 +00:00
..
patches Casting 0 to an iterator is not portable. Just use end() in that case. 2013-05-23 15:00:00 +00:00
buildlink3.mk Set BUILDLINK_ABI_DEPENDS correctly (with +=, not ?=) 2012-05-07 01:53:12 +00:00
DESCR
distinfo Casting 0 to an iterator is not portable. Just use end() in that case. 2013-05-23 15:00:00 +00:00
Makefile * .include "../../devel/readline/buildlink3.mk" with USE_GNU_READLINE=yes 2013-07-15 02:02:17 +00:00
PLIST Update to the 20090923 snapshot. 2010-02-28 15:59:18 +00:00