pkgsrc/cad/verilog-current
2013-11-29 12:53:45 +00:00
..
patches Casting 0 to an iterator is not portable. Just use end() in that case. 2013-05-23 15:00:00 +00:00
buildlink3.mk
DESCR
distinfo Casting 0 to an iterator is not portable. Just use end() in that case. 2013-05-23 15:00:00 +00:00
Makefile Has race conditions during build. 2013-11-29 12:53:45 +00:00
PLIST